Abstract:
An array substrate and a display device. The array substrate comprises a common electrode line, a plurality of gate lines and a plurality of data lines which intersect with each other, and pixel units defined by neighboring in gate lines. A storage electrode line is provided, so that storage capacitance between the storage electrode line and the pixel electrode can compensate storage capacitance formed between the common electrode and the pixel electrode. The ability of charge retention of the pixel electrode can be increased, so that voltage of the pixel electrode is constant during display period of a frame, and the display effect of a picture is ensured.
Abstract:
An organic light emitting diode (OLED) display device and a preparation method thereof, and a display apparatus are disclosed. The OLED display device includes a base substrate (21), an anode (23), a cathode (26) and an organic functional layer (25), the anode (23), the cathode (26) and the organic functional layer (25) formed on the base substrate (21), and the organic functional layer (25) located between the cathode (26) and the anode (23), the anode (23) and/or the cathode (26) being a topological insulator with a two-dimensional nanostructure, and the topological insulator with the two-dimensional nanostructure being adhered on the base substrate (21) by an adhesive layer. The OLED display device overcomes the problem of non-uniform display lightness which is caused by the high transmission resistance and high IR drop of metal electrodes of OLED display devices.
Abstract:
A pixel structure, an array substrate and a display device. The pixel substrate comprises a first pixel electrode and a second pixel electrode arranged in a first direction, and a thin film transistor (TFT) disposed between the first pixel electrode and the second pixel electrode. The TFT includes a comb-shaped source, a comb-shaped first drain and a comb-shaped second drain; and a channel region of the TFT is defined by the comb-shaped source respectively and the comb-shaped first drain and the comb-shaped second drain. The channel region has a greater ratio of width to length, thus improving the driving capability of the TFT for driving the first pixel electrode and the second pixel electrode.
Abstract:
A display substrate includes a first base substrate; a gate line, a data line and a common electrode line arranged on the first base substrate; a plurality of pixel units each including a first sub-pixel electrode, a second sub-pixel electrode, a first thin film transistor, a second thin film transistor and a third thin film transistor; and a charge adjustment-control line arranged on the first base substrate, where the charge adjustment-control line and the gate line are between the first sub-pixel electrode and the second sub-pixel electrode. The first thin film transistor is connected to the gate line, the data line and the first sub-pixel electrode; the second thin film transistor is connected to the gate line, the data line and the second sub-pixel electrode; the third thin film transistor is connected to the charge adjustment control line, the first sub-pixel electrode and the common electrode line.
Abstract:
A pixel structure, an array substrate, a display panel and a display apparatus are disclosed. The pixel structure includes: a first pixel electrode and a second pixel electrode which are arranged along a first direction, and a TFT between the first pixel electrode and the second pixel electrode. The first pixel electrode includes a first extension electrode extending toward the second pixel electrode, and the second pixel electrode includes a second extension electrode extending toward the first pixel electrode; the TFT includes a gate electrode, a source electrode, a first drain electrode and a second drain electrode which are insulated from each other; the source electrode includes a first opening and a second opening, the first drain electrode is connected with the first extension electrode and extends into the first opening, and the second drain electrode is connected with the second extension electrode and extends into the second opening.
Abstract:
A data driving integrated circuit includes a digital-to-analog converter configured to receive a respective digital data signal from a timing controller and convert the respective digital data signal to a respective analog data signal, which is output to a display panel through a respective data line; an analog-to-digital converter configured to receive a respective analog sensing signal from a respective sensing line in the display panel and convert respective analog sensing signal to a respective digital sensing signal, which is output to the timing controller; a first sensing switch configured to control a connection between a first reference voltage line and the respective sensing line; a second sensing switch configured to control a connection between a second reference voltage line and the respective sensing line; and a third sensing switch configured to control the connection between the analog-to-digital converter and the respective sensing line.
Abstract:
An array substrate and a display device are disclosed. The array substrate includes a base substrate, a plurality of gate lines and a plurality of data lines arranged to intersect each other on the base substrate, a pixel electrode arranged in a region defined by an adjacent gate line and an adjacent data line, and a thin film transistor arranged at an intersection of the gate lines and the data lines. A drain of the thin film transistor is connected with the pixel electrode through a via hole. The gate lines further include a widening portion between adjacent data lines. The widening portion comprises a recess structure. An orthogonal projection of the recess structure on the base substrate at least partly overlaps that of the drain of the thin film transistor on the base substrate.
Abstract:
At least one embodiment of the present disclosure provides a display panel, and the display panel includes: a first substrate and a second substrate oppositely combined with each other, the first substrate includes a base substrate, and a gate line, a first electrode, a first interlayer insulating layer, and second electrode on the base substrate; the first interlayer insulating layer includes a first via hole penetrating through the first interlayer insulating layer, the second electrode is electrically connected to the first electrode the first via hole, first support structure is provided in a region corresponding to the first via hole and on a side of the second electrode away from the base substrate; at least a part of the first support structure is located in the first via hole, an orthographic projection of the first via hole overlaps with an orthographic projection of the gate line on the base substrate.
Abstract:
The disclosure relates to the technical field of display, and discloses an electrode structure, a capacitor, a GOA circuit, an array substrate, a display panel and a display device, wherein the electrode structure includes a body and a first opening formed in the body, the first opening has a half-enclosed shape, and a part, enclosed by the first opening, of the body has a tip structure. Each of the capacitor, the GOA circuit, the array substrate, the display panel and the display device includes the above-mentioned electrode structure.
Abstract:
A shift register unit can include a storage circuit and an output circuit respectively connected to a pull-up node, a gate electrode driving signal output terminal, and an output voltage signal input terminal, and can connect or disconnect the gate electrode driving signal output terminal and the output voltage signal input terminal under the control of electric potential of the pull-up node; the storage circuit can be respectively connected to the pull-up node and the gate electrode driving signal output terminal and can control the electric potential of the pull-up node during the gate electrode driving signal output stage, such that the output circuit can connect the gate electrode driving signal output terminal and the output voltage signal input terminal. During a gate electrode driving signal output stage, the electric potential of the pull-up node can be maintained, such that gate electrode driving signals can be outputted normally.