公开(公告)号：US20170200749A1

公开(公告)日：2017-07-13

申请号：US15106052

申请日：2016-01-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.

Inventor： Zheng LIU ,  Tsung Chieh KUO ,  Xi CHEN ,  Xiaoxiang ZHANG ,  Zhichao ZHANG ,  Mingxuan LIU

IPC: H01L27/12 ,  H01L29/66

CPC classification number: H01L27/1288 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2201/121 ,  G02F2201/123 ,  H01L21/77 ,  H01L27/12 ,  H01L29/66765

Abstract: A method for manufacturing an array substrate comprises: forming a pixel electrode and a gate of a thin film transistor on a substrate; forming a gate insulating layer; forming an active layer and a source and a drain, which are provided on the active layer, of the thin film transistor by a patterning process; forming a passivation layer; forming a main via penetrating through the gate insulating layer and the passivation layer and a main-via extension portion under a portion of the drain by a patterning process, wherein the main via is connected to the main-via extension portion; removing a portion of the drain which protrudes above the main-via extension portion so as to form a final via; and forming a connection electrode and a common electrode, wherein the connection electrode electrically connects the drain to the pixel electrode through the final via.

公开(公告)号：US20160307978A1

公开(公告)日：2016-10-20

申请号：US14785777

申请日：2015-03-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zheng LIU ,  Xiaoyong LU ,  Xiaolong LI ,  Chien Hung LIU ,  Chunping LONG

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52

CPC classification number: H01L27/3262 ,  H01L27/1248 ,  H01L27/1274 ,  H01L27/1285 ,  H01L27/3246 ,  H01L51/5206 ,  H01L51/5221 ,  H01L51/56 ,  H01L2227/323 ,  H01L2251/558

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are provided. The manufacturing method of the array substrate comprises: forming a first conductive thin film (100) on a base substrate (1); and patterning the first conductive thin film (100), to form a pattern of a cathode (11) on a first region (11) of the base substrate (1), and form a pattern of a gate electrode (4) on a second region (12) of the base substrate (1). Complexity and process time of a fabrication process of an array substrate can be reduced, a fabrication process of an organic electroluminescent panel can be simplified, and production cost can be reduced, by forming a cathode layer of a light-emitting diode and a gate electrode layer of a thin film transistor in different regions of the base substrate at the same time by one patterning process.

Abstract translation: 提供阵列基板，阵列基板和显示装置的制造方法。 阵列基板的制造方法包括：在基底（1）上形成第一导电薄膜（100）; 以及图案化所述第一导电薄膜（100），以在所述基底基板（1）的第一区域（11）上形成阴极（11）的图案，并在第二导电薄膜（1）上形成栅电极（4）的图案 基底（1）的区域（12）。 可以减少阵列基板的制造工艺的复杂性和处理时间，通过形成发光二极管和栅电极的阴极层，可以简化有机电致发光面板的制造工艺，并且可以降低生产成本 通过一个图案化工艺同时在基底基板的不同区域中的薄膜晶体管层。

公开(公告)号：US20160254389A1

公开(公告)日：2016-09-01

申请号：US14768349

申请日：2015-03-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaoyong LU ,  Zheng LIU ,  Liang SUN ,  Xiaolong LI ,  Chunping LONG

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/285 ,  H01L27/12

CPC classification number: H01L29/78618 ,  H01L21/28518 ,  H01L21/28568 ,  H01L27/1222 ,  H01L27/1274 ,  H01L29/458 ,  H01L29/665 ,  H01L29/66757 ,  H01L29/78675 ,  H01L29/78696

Abstract: A low temperature poly-silicon thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The method comprises: S1: sequentially forming an active layer (3), a gate insulation layer (4), a gate electrode (5) and an interlayer insulation layer (6) on a base substrate (1); S2: forming a first metal thin film layer (8); S3: performing a hydrogenation treatment on the active layer (3) and the gate insulation layer (6); S4: forming a second metal thin film layer (7), the second metal thin film layer (7) being used for forming a source electrode and a drain electrode.

Abstract translation: 提供一种低温多晶硅薄膜晶体管及其制造方法，阵列基板和显示装置。 该方法包括：S1：在基底（1）上依次形成有源层（3），栅极绝缘层（4），栅电极（5）和层间绝缘层（6）; S2：形成第一金属薄膜层（8）; S3：在有源层（3）和栅极绝缘层（6）上进行氢化处理; S4：形成第二金属薄膜层（7），第二金属薄膜层（7）用于形成源电极和漏电极。

公开(公告)号：US20150340389A1

公开(公告)日：2015-11-26

申请号：US14402532

申请日：2013-12-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zheng LIU ,  Jangsoon IM ,  Zuqiang WANG

IPC: H01L27/12

CPC classification number: H01L27/1274 ,  H01L27/1255 ,  H01L27/1262

Abstract: The present invention provides a method for manufacturing an array substrate, an array substrate, and a display device. The method for manufacturing an array substrate, including a step of forming a thin film transistor and a storage capacitor on a substrate, the thin film transistor including a gate, a source, and a drain, and the storage capacitor including a first pole plate and a second pole plate, wherein, arranging the source, the drain, and the first pole plate in a single layer through implanting dopant ions into an amorphous silicon layer formed on the substrate by one ion-implantation process, and through crystallizing an amorphous silicon material forming the amorphous silicon layer and activating the dopant ions by a laser irradiation process. Accordingly, process steps are simplified and a process cost is reduced greatly, and the performances of the array substrate and the display device are increased.

Abstract translation: 本发明提供一种阵列基板，阵列基板和显示装置的制造方法。 制造阵列基板的方法，包括在基板上形成薄膜晶体管和存储电容的步骤，所述薄膜晶体管包括栅极，源极和漏极，所述存储电容器包括第一极板和 第二极板，其中，通过一个离子注入工艺将源极，漏极和第一极板设置在单层中，通过将掺杂剂离子注入到形成在衬底上的非晶硅层中，并且通过使非晶硅材料结晶 形成非晶硅层并通过激光照射工艺激活掺杂剂离子。 因此，简化了处理步骤，并且大大降低了处理成本，并且增加了阵列基板和显示装置的性能。

公开(公告)号：US20230363220A1

公开(公告)日：2023-11-09

申请号：US18221420

申请日：2023-07-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongwei TIAN ,  Yanan NIU ,  Zheng LIU ,  Liangjian LI ,  Dong LI ,  Meng ZHAO ,  Long HAN ,  Can ZHENG

IPC: H10K59/131 ,  G09G3/3266 ,  G09G3/3275 ,  H10K59/124 ,  H10K59/121 ,  H10K77/10

CPC classification number: H10K59/131 ,  G09G3/3266 ,  G09G3/3275 ,  H10K59/124 ,  H10K59/1213 ,  H10K77/111 ,  H01L27/1218

Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.

公开(公告)号：US20230054532A1

公开(公告)日：2023-02-23

申请号：US17797318

申请日：2021-10-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Caiyu QU ,  Yanjun HAO ,  Hao LIU ,  Hejin WANG ,  Huijuan ZHANG ,  Zheng LIU

IPC: G06V40/13 ,  H01L51/52 ,  H01L27/32 ,  G06V40/12

Abstract: The present application relates to the technical field of display, and discloses a display panel, a preparation method therefor, and a display apparatus. The material of a filter film layer in the display panel comprises a conductive material, so the filter film layer may be used as a detection plate of a fingerprint identification circuit. Moreover, since the filter film layer is located on the side of a display function film layer away from a base substrate, the filter film layer is far away from a signal line in the display function film layer, and is not easily affected by the signal line. When the filter film layer is used as the detection plate, the signal-to-noise ratio of a fingerprint signal detected by the fingerprint identification circuit may be larger, and the fingerprint identification effect may be better. Moreover, when the filter film layer is used as the detection plate, the distance between the filter film layer and an obstacle relative to the display function film layer is relatively short. Therefore, the signal detected by the fingerprint identification circuit may be made larger, thereby ensuring the fingerprint identification effect.

公开(公告)号：US20210407353A1

公开(公告)日：2021-12-30

申请号：US17280826

申请日：2020-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongwei TIAN ,  Yanan NIU ,  Dong LI ,  Ming LIU ,  Zheng LIU

IPC: G09G3/00 ,  G09G3/3208 ,  H01L27/32 ,  H01L51/00 ,  H01L51/56

Abstract: The present invention provides a stretchable display substrate, a method for manufacturing the same, a display device and an operating method thereof, and belongs to the field of display technologies. The stretchable display substrate includes a plurality of islands on a base substrate, and a plurality of connection bridges corresponding to each of the plurality of islands. The plurality of islands are distributed in array and separated from each other; the plurality of connection bridges corresponding to each island are configured to connect the island with islands adjacent to the island. An electrical detection structure is provided between each island and the plurality of connection bridges corresponding to the island, and the electrical detection structure is configured to have an electrical parameter changed when the stretchable display substrate is stretched.

公开(公告)号：US20210225968A1

公开(公告)日：2021-07-22

申请号：US16632210

申请日：2018-11-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lujiang HUANGFU ,  Xing FAN ,  Zheng LIU ,  Yan FAN ,  Liangjian LI

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/56

Abstract: A pixel structure. The pixel structure includes a base substrate; an insulating island on the base substrate; a light emitting element on a side of the insulating island away from the base substrate; an insulating layer on the base substrate and surrounding the insulating island, the insulating layer spaced apart from the insulating island by a groove; and a reflective layer on a lateral side of the insulating layer surrounding a periphery of the light emitting element, and configured to reflect light laterally emitted from the light emitting element to exit from a light emitting surface of the pixel structure. The insulating layer has a height relative to a main surface of the base substrate greater than a height of the insulating island relative to the main surface of the base substrate.

公开(公告)号：US20210202591A1

公开(公告)日：2021-07-01

申请号：US16765220

申请日：2019-12-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hongwei TIAN ,  Yanan NIU ,  Zheng LIU

IPC: H01L27/32 ,  G06F3/147 ,  G06F3/041 ,  H01L51/52 ,  H01L51/56

Abstract: Provided is an array substrate and a preparation method thereof and a display device, to improve performance and yield of display products. An embodiment of the present disclosure provides an array substrate, where the array substrate is divided into a display area and a surrounding area arranged outside the display area; the array substrate includes: a substrate, electroluminescent devices and an encapsulation layer disposed on the substrate in the display area, the encapsulation layer configured to encapsulate the electroluminescent device, and a touch function layer disposed on the encapsulation layer; the touch function layer includes a touch lead extending from the display area to the surrounding area; and the array substrate further includes: a thickness compensation layer located in the surrounding area and disposed between the substrate and the touch lead layer.

公开(公告)号：US20210175312A1

公开(公告)日：2021-06-10

申请号：US15779658

申请日：2017-11-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Benlian WANG ,  Li WANG ,  Yipeng CHEN ,  Yueping ZUO ,  Zheng LIU

IPC: H01L27/32 ,  H01L51/00

Abstract: The application discloses a wiring structure, a display substrate and a display device. The wiring structure provided includes a plurality of hollowed pattern strings, each hollowed pattern string including a plurality of hollowed patterns arranged sequentially in a length extension direction of the wiring structure, each hollowed pattern including a hollowed region and a non-hollowed region. The non-hollowed region of any hollowed pattern in a hollowed pattern string at least partially overlaps the non-hollowed region of a hollowed pattern in a further hollowed pattern string adjacent to the hollowed pattern string, and the hollowed regions of the hollowed patterns in the plurality of hollowed pattern strings do not overlap each other. The wiring structure is particularly adapted for flexible display.