公开(公告)号：US10735154B2

公开(公告)日：2020-08-04

申请号：US15901238

申请日：2018-02-21

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Louis-Philippe Hamelin ,  Yiqun Ge ,  Wuxian Shi ,  Ran Zhang ,  Nan Cheng

IPC: H04L5/00 ,  H04L1/00 ,  H03M13/13 ,  H03M13/03

Abstract: Coding sub-channel selection involves, in an embodiment, determining, from sub-channels that are defined by a code and that have associated reliabilities for input bits at input bit positions, a first number of the sub-channels to carry bits that are to be encoded. A second number of the sub-channels, greater than the first number, are selected. The second number of sub-channels are selected to provide exactly the first number sub-channels to be available to carry the bits that are to be encoded.

公开(公告)号：US10666392B2

公开(公告)日：2020-05-26

申请号：US15939750

申请日：2018-03-29

Applicant: HUAWEI TECHNOLOGIES Co., LTD.

Inventor： Yiqun Ge ,  Hamid Saber

IPC: H04L1/00

Abstract: Disabled input bit positions of an input bit vector that is to be encoded are determined based on non-contiguous subsets of consecutive coded bit positions that are to be punctured from a codeword of a polar code. The input bit vector is encoded according to the polar code to generate a codeword, by applying information bits to input bit positions of the input bit vector other than the disabled input bit positions. The non-contiguous subsets of consecutive coded bit positions are punctured from the codeword to generate a punctured codeword, and the punctured codeword is transmitted. In some embodiments, the non-contiguous subsets include a first subset that includes a first coded bit position and a second subset that includes a last coded bit position. The polar code could be a chained polar code, for example.

公开(公告)号：US10560221B2

公开(公告)日：2020-02-11

申请号：US15852174

申请日：2017-12-22

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Hamid Saber ,  Yiqun Ge

IPC: H04L1/00 ,  H04J13/10

Abstract: One or more codewords are generated by encoding input bits at input bit positions onto sub-channels that are provided by a code. Each of the sub-channels has an associated reliability of correct decoding of an input bit at an input bit position. Each codeword is transmitted to a decoder, and a word based on each transmitted codeword is received at the decoder. Each received word is decoded, and the reliabilities of the sub-channels are determined based on decoded bits and known input bits from which each codeword was generated. An indication that is based on the determined reliabilities of the sub-channels, such as an indication of the determined reliabilities, is transmitted to the encoder, and may be used by the encoder in selecting the sub-channels for encoding subsequent input bits, for example.

公开(公告)号：US10560218B2

公开(公告)日：2020-02-11

申请号：US15852537

申请日：2017-12-22

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yiqun Ge ,  Hamid Saber

IPC: H04L1/00 ,  H03M13/13

Abstract: An assistant sub-channel to carry a decoding assistant bit, in input bits that are to be encoded, is selected from each of a plurality of non-adjacent segments. Each segment includes a subset of sub-channels with associated reliabilities. Some embodiments also involve grouping the sub-channels into the segments. After a target number of assistant sub-channels have been selected, the input bits are encoded to generate a codeword, and the codeword is transmitted. Assistant sub-channel selection could involve iterations to select assistant sub-channels at each iteration, until at least the target number of assistant sub-channels have been selected.

公开(公告)号：US20190372704A1

公开(公告)日：2019-12-05

申请号：US16540086

申请日：2019-08-14

Applicant: Huawei Technologies Co.,Ltd.

Inventor： Jian Wang ,  Huangping Jin ,  Shengchen Dai ,  Rong Li ,  Yinggang Du ,  Jun Wang ,  Yiqun Ge

IPC: H04L1/00 ,  H04B7/06

Abstract: The application provides manner for communicating channel state information (CSI) in a communication network. A preset length is used for equalizing lengths of CSI to be reported. The preset length is determined based on a quantity of CSI-reference signal (RS) ports. A communication device determines whether a total length of one or more indication information items to be included in the CSI is less than the preset length. If the total length of the one or more indication information items to be included in the CSI is less than the preset length, the communication device adds one or more padding bits, to obtain a CSI bit sequence including the one or more indication information items and the one or more padding bits. A total length of the CSI bit sequence is consistent with the preset length. The communication device then outputs the CSI bit sequence.

公开(公告)号：US10318297B2

公开(公告)日：2019-06-11

申请号：US14611140

申请日：2015-01-30

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yiqun Ge ,  Wuxian Shi ,  Lan Hu

IPC: G06F9/30 ,  G06F1/20 ,  G06F9/38 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/329 ,  G06F1/32

Abstract: A self-timed parallelized multi-core processor has an instruction decoder unit for receiving a program code instruction, determining an operating code and latency for the instruction, and assigning a loop index to the instruction. An instruction decomposer creates a primitive by decomposing the instruction, replacing the loop index with a core index, and broadcasting the primitive. Self-timed processing cores each having a unique core index compare the core index to their unique processing core index. The processing cores act on the primitive when their processing core index is within a threshold of the core index.

公开(公告)号：US20180115393A1

公开(公告)日：2018-04-26

申请号：US15784836

申请日：2017-10-16

Applicant: Huawei Technologies Co., Ltd.

Inventor： Gongzheng Zhang ,  Huazi Zhang ,  Rong Li ,  Jun Wang ,  Yiqun Ge ,  Wen Tong

IPC: H04L1/18 ,  H04L1/00

Abstract: Aspects of this disclosure provide a technique for implementing polar encoding with incremental redundancy HARQ re-transmission. In particular, a transmitter may encode a message using different polar codes to obtain a first codeword and a second codeword that is twice the length of the first codeword, and transmit the first codeword as an original transmission, and the second half of the second codeword as a re-transmission without transmitting the first half of the second codeword. Information bits that are common to both the first codeword and the second half of the second codeword may be mapped to more-reliable bit-locations in the second half of the second codeword. Decoded bit values for the common information in the original transmission and retransmission may be compared by the receiver to perform a parity check.

公开(公告)号：US09740487B2

公开(公告)日：2017-08-22

申请号：US14480522

申请日：2014-09-08

Applicant: Huawei Technologies Co., Ltd.

Inventor： Tao Huang ,  Qifan Zhang ,  Wuxian Shi ,  Yiqun Ge ,  Wen Tong

IPC: G06F9/30 ,  G06F15/76 ,  G06F1/08 ,  G06F1/10 ,  G06F9/38 ,  G06F9/50

CPC classification number: G06F9/30145 ,  G06F1/08 ,  G06F1/10 ,  G06F9/30036 ,  G06F9/30189 ,  G06F9/3826 ,  G06F9/3828 ,  G06F9/3836 ,  G06F9/3851 ,  G06F9/3853 ,  G06F9/3871 ,  G06F9/3877 ,  G06F9/3885 ,  G06F9/3889 ,  G06F9/3891 ,  G06F9/5011 ,  G06F15/8007 ,  G06F15/8053 ,  G06F15/8092 ,  G06F2009/3883

Abstract: A clock-less asynchronous processing circuit or system having a plurality of pipelined processing stages utilizes self-clocked generators to tune the delay needed in each of the processing stages to complete the processing cycle. Because different processing stages may require different amounts of time to complete processing or may require different delays depending on the processing required in a particular stage, the self-clocked generators may be tuned to each stage's necessary delay(s) or may be programmably configured.

公开(公告)号：US09325520B2

公开(公告)日：2016-04-26

申请号：US14325117

申请日：2014-07-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wuxian Shi ,  Yiqun Ge ,  Qifan Zhang ,  Tao Huang ,  Wen Tong

IPC: G06F9/48 ,  H04L12/433 ,  G06F15/16

CPC classification number: H04L12/433 ,  G06F9/3871 ,  G06F15/16

Abstract: Embodiments are provided for adding a token jump logic to an asynchronous processor with token passing. The token jump logic allows token forward jumps and token backward jumps over a cascade of token processing logics in the processor. An embodiment method includes determining, using a token jump logic coupled to a cascade of token processing logics, whether to administer a token forward jump or a token backward jump of a token signal passing through the token processing logics. The token forward jump and token backward jump allow the token signal to skip one or more token processing logics in the cascade. The method further includes monitoring, for each of the token processing logics, a polarity status of a token sense logic, and inverting the polarity status according to the determination at the token jump logic.

Abstract translation: 提供了实施例，用令牌传递将令牌跳转逻辑添加到异步处理器。 令牌跳转逻辑允许在处理器中的令牌处理逻辑级联的令牌向前跳跃和令牌向后跳转。 实施例方法包括使用耦合到令牌处理逻辑的级联的令牌跳转逻辑来确定是否管理通过令牌处理逻辑的令牌信号的令牌前向跳转或令牌反向跳转。 令牌向前跳转和令牌反向跳转允许令牌信号跳过级联中的一个或多个令牌处理逻辑。 该方法还包括针对令牌处理逻辑中的每一个监视令牌检测逻辑的极性状态，以及根据令牌跳转逻辑处的确定来反转极性状态。