公开(公告)号：US20230185037A1

公开(公告)日：2023-06-15

申请号：US17548167

申请日：2021-12-10

Applicant: Intel Corporation

Inventor： Eric J. M. Moret ,  Pooya Tadayon ,  Karumbu Meyyappan ,  Paul J. Diglio

IPC: G02B6/42

CPC classification number: G02B6/428 ,  G02B6/4269 ,  G02B6/4284

Abstract: An electronic device comprises an electro-optical circuit package including at least photonic integrated circuit (PIC) having at least one light source and a package substrate; a printed circuit (PCB) including at least one optical connector to receive light from the at least one light source; and multiple liquid metal electrical contacts disposed between the package substrate and the PCB.

公开(公告)号：US20230087567A1

公开(公告)日：2023-03-23

申请号：US17480420

申请日：2021-09-21

Applicant: Intel Corporation

Inventor： Eric J.M. Moret ,  Pooya Tadayon

IPC: G02B6/30

Abstract: In an optical circuit, a substrate can have a substrate top surface, a substrate bottom surface, and a substrate edge surface that extends around at least a portion of a perimeter of the substrate. A photonic integrated circuit (PIC) can be attached to the substrate. The PIC can have a PIC optical port that is configured to accept or emit an optical beam along a PIC optical axis. A lens can be located at the substrate edge surface. The substrate can include an optical path that extends through the substrate from a first substrate optical port that is aligned with the PIC optical axis to a second substrate optical port that faces the lens, such that an optical beam emergent from the PIC optical port can traverse the optical path and pass through the lens to emerge substantially parallel to the substrate top surface.

公开(公告)号：US11543454B2

公开(公告)日：2023-01-03

申请号：US16141422

申请日：2018-09-25

Applicant: Intel Corporation

Inventor： Paul J. Diglio ,  Pooya Tadayon ,  Karumbu Meyyappan

IPC: G01R31/319 ,  G01R1/073

Abstract: Embodiments herein relate to a test probe. The test probe may have a first plurality of beams and a second plurality of beams. An intermediate substrate may be positioned between the first plurality of beams and the second plurality of beams. In embodiments, both the first and second plurality of beams may be angled. Other embodiments may be described or claimed.

公开(公告)号：US20220413210A1

公开(公告)日：2022-12-29

申请号：US17359178

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Changhua Liu ,  Pooya Tadayon ,  Zhichao Zhang ,  Liang Zhang

IPC: G02B6/122 ,  G02B6/30

Abstract: Techniques and mechanisms for optically coupling a photonic integrated circuit (PIC) chip to an optical fiber via a planar optical waveguide structure. In an embodiment, a PIC chip comprises integrated circuitry, photonic waveguides, and integrated edge-oriented couplers (IECs) which are coupled to the integrated circuitry via the photonic waveguides. The PIC chip forms respective divergent lens surfaces of the IECs, which are each at a respective terminus of a corresponding one of the photonic waveguides. A planar optical waveguide structure, which is adjacent to the IECs, comprises a core which is optically coupled between the PIC chip and an array of optical fibers. In another embodiment, an edge of the PIC forms a stepped structure, wherein an upper portion of the stepped structure comprises the plurality of coplanar IECs, and a lower portion of the stepped structure extends past the plurality of coplanar IECs.

公开(公告)号：US20220404551A1

公开(公告)日：2022-12-22

申请号：US17349305

申请日：2021-06-16

Applicant: Intel Corporation

Inventor： Pooya Tadayon ,  Zhichao Zhang ,  Brandon Marin ,  Tarek Ibrahim ,  Kemal Aygun ,  Stephen Smith

IPC: G02B6/12 ,  G02B6/122

Abstract: Integrated circuit packages may be formed having at least one optical via extending from a first surface of a package substrate to an opposing second surface of the package substrate. The at least one optical via creates an optical link between the opposing surfaces of the package substrate that enables the fabrication of a dual-sided optical multiple chip package, wherein integrated circuit devices can be attached to both surfaces of the package substrate for increased package density.

公开(公告)号：US11515232B2

公开(公告)日：2022-11-29

申请号：US16379619

申请日：2019-04-09

Applicant: Intel Corporation

Inventor： Chia-Pin Chiu ,  Robert Sankman ,  Pooya Tadayon

IPC: H01L23/473 ,  H05K7/20 ,  H01L23/373 ,  H01L23/367 ,  H01L23/00

Abstract: Embodiments include semiconductor packages and cooling semiconductor packaging systems. A semiconductor package includes a second die on a package substrate, first dies on the second die, conductive bumps between the first dies and the second die, a cold plate and a manifold over the first dies, second die, and package substrate, and first openings in the manifold. The first openings are fluidly coupled through the conductive bumps. The semiconductor package may include a first fluid path through the first openings of the manifold, where a first fluid flows through the first fluid path. The semiconductor package may further include a second fluid path through second openings of the cold plate, where a second fluid flows through the second fluid path, and where the first and second fluids of the first and second fluid paths cool heat providing surfaces of the first dies, the second die, or the package substrate.

公开(公告)号：US11372023B2

公开(公告)日：2022-06-28

申请号：US17174191

申请日：2021-02-11

Applicant: Intel Corporation

Inventor： Joe Walczyk ,  Pooya Tadayon

IPC: G01R1/06 ,  G01R1/067 ,  G01R3/00 ,  B81B7/02 ,  H01L23/00 ,  G01R31/26

Abstract: A device probe includes a primary probe arm and a subsequent probe arm with a slip plane spacing between the primary probe arm and subsequent probe arm. Each probe arm is integrally part of a probe base that is attachable to a probe card. During probe use on a semiconductive device or a semiconductor device package substrate, overtravel of the probe tip allows the primary and subsequent probe arms to deflect, while sufficient resistance to deflection creates a useful contact with an electrical structure such as an electrical bump or a bond pad.

公开(公告)号：US20220178966A1

公开(公告)日：2022-06-09

申请号：US17677847

申请日：2022-02-22

Applicant: Intel Corporation

Inventor： Pooya Tadayon

IPC: G01R1/067 ,  G01R31/28 ,  G01R1/073

Abstract: An apparatus an apparatus comprising: a substrate having a plane; and an array of at least one conductive probe having a base affixed to the substrate, the at least one conductive probe having a major axis extending from the plane of the substrate and terminating at a tip, wherein the one or more conductive probes comprise at least three points that are non-collinear.

公开(公告)号：US11204555B2

公开(公告)日：2021-12-21

申请号：US15857308

申请日：2017-12-28

Applicant: Intel Corporation

Inventor： Pooya Tadayon

IPC: G03F7/20 ,  H01L27/00 ,  G03F7/30 ,  B05C3/04

Abstract: An apparatus, comprising at least one vessel having a bottom and at least one sidewall extending from the bottom, wherein the at least one sidewall encloses an interior of the at least one vessel, a shaft has a proximal end and a distal end, wherein the distal end of the shaft extends into the interior of the at least one vessel, wherein the proximal end of the shaft is coupled to a motor, at least one support structure which extends laterally from the shaft; and a substrate attachment fixture on a distal end of the at least one support structure, wherein the at least one support structure and the substrate attachment fixture are within the interior of the at least one vessel.

公开(公告)号：US20210351108A1

公开(公告)日：2021-11-11

申请号：US17030137

申请日：2020-09-23

Applicant: Intel Corporation

Inventor： Paul Diglio ,  Pooya Tadayon ,  David Shia

IPC: H01L23/473

Abstract: Embodiments disclosed herein include a temperature control system. In an embodiment, the temperature control system comprises a fluid reservoir for holding a fluid, and a spray chamber fluidically coupled to the fluid reservoir. In an embodiment, a pump is between the spray chamber and the fluid reservoir, where the pump provides the fluid to the spray chamber. In an embodiment, the temperature control system further comprises, a plurality of fluid lines between the pump and the spray chamber, where individual ones of the plurality of fluid lines are configured to provide the fluid to the spray chamber. In an embodiment, the temperature control system further comprises, a vacuum source fluidically coupled to the spray chamber, where the vacuum source controls a pressure within the spray chamber.