Mobile terminal for digital broadcasting reception and method for storing digital broadcasting data
    62.
    发明授权
    Mobile terminal for digital broadcasting reception and method for storing digital broadcasting data 有权
    用于数字广播接收的移动终端和用于存储数字广播数据的方法

    公开(公告)号:US07603079B2

    公开(公告)日:2009-10-13

    申请号:US11249648

    申请日:2005-10-13

    IPC分类号: H04H40/00

    摘要: A digital broadcasting data reception unit receives digital broadcasting data. A multimedia module parses the digital broadcasting data into video and audio data to output the video and audio data. A terminal control unit receives the digital broadcasting data from the digital broadcasting data reception unit when it is transmitted to the multimedia module, and parses the received digital broadcasting data into the video and audio data. A memory unit stores the video and audio data into which the digital broadcasting data is parsed by the terminal control unit according to a control operation of the terminal control unit.

    摘要翻译: 数字广播数据接收单元接收数字广播数据。 多媒体模块将数字广播数据解析为视频和音频数据,以输出视频和音频数据。 当数字广播数据接收单元被发送到多媒体模块时,终端控制单元从数字广播数据接收单元接收数字广播数据,并将所接收的数字广播数据解析成视频和音频数据。 存储单元根据终端控制单元的控制操作存储由终端控制单元解析数字广播数据的视频和音频数据。

    Data transfer in multiprocessor system
    63.
    发明申请
    Data transfer in multiprocessor system 审中-公开
    多处理器系统中的数据传输

    公开(公告)号:US20070156937A1

    公开(公告)日:2007-07-05

    申请号:US11480707

    申请日:2006-07-03

    IPC分类号: G06F13/00

    CPC分类号: G06F13/362

    摘要: A multiprocessor system includes a plurality of masters, at least one first type of slave operating with a first clock frequency, and at least one second type of slave operating with a second clock frequency higher than the first clock frequency. An arbitrator coordinates access between the masters and the slaves via a single read/write bus path between the arbitrator and the first type of slave, and via a plurality of read bus paths and/or a plurality of write bus paths between the arbitrator and the second type of slave.

    摘要翻译: 多处理器系统包括多个主器件,至少一个第一类型的从动器以第一时钟频率工作的第一类型,以及至少一个第二类型的从动器,其工作于第二时钟频率高于第一时钟频率。 仲裁者通过仲裁器和第一类型的从机之间的单个读/写总线路径,以及经由仲裁器和第二类型从机之间的多条读总线路径和/或多条写总线路径来协调主机和从机之间的接入 第二类奴隶。

    Washing-drying machine
    64.
    发明申请
    Washing-drying machine 审中-公开
    洗衣机

    公开(公告)号:US20070033970A1

    公开(公告)日:2007-02-15

    申请号:US11502465

    申请日:2006-08-11

    IPC分类号: D06F29/00

    CPC分类号: D06F25/00 D06F58/24

    摘要: A washing-drying machine comprises a cabinet; a tub installed in the cabinet; a washing tub rotatably arranged in the tub; a water supplying pipe connected to the tub for supplying water in order that wet air can be condensed inside the tub; and a circulation duct arranged outside the tub and having both ends connected to the tub, for circulating air inside the tub therethrough. Accordingly, a drying efficiency is enhanced without increasing a size of the cabinet, and a drying time is shortened.

    摘要翻译: 洗衣机包括柜体; 一个安装在橱柜中的浴缸; 可旋转地布置在所述桶中的洗涤桶; 供水管,其连接到所述桶以供水,以使湿空气能够在所述桶内冷凝; 以及布置在所述桶的外部并且两端连接到所述桶的循环管道,用于使所述桶内的空气循环通过。 因此,不增加机壳的尺寸而提高干燥效率,缩短干燥时间。

    Arbiter capable of improving access efficiency of multi-bank memory device, memory access arbitration system including the same, and arbitration method thereof
    65.
    发明申请
    Arbiter capable of improving access efficiency of multi-bank memory device, memory access arbitration system including the same, and arbitration method thereof 有权
    具有提高多存储存储器件的存取效率的仲裁器,包括其的存储器访问仲裁系统及其仲裁方法

    公开(公告)号:US20050132146A1

    公开(公告)日:2005-06-16

    申请号:US10995820

    申请日:2004-11-23

    IPC分类号: G06F12/00 G06F13/16

    CPC分类号: G06F13/1647

    摘要: Provided are an arbiter capable of improving memory access efficiency in a multi-bank memory, a memory access arbitration system including the arbiter, and an arbitration method thereof, where the arbiter detects requests that are not included in a busy bank, and allows the requests corresponding to a bank receiving the largest number of pending requests priorities; and write request information generated by masters is stored in a predetermined buffer to be output as additional master request information, and provides the corresponding master with an opportunity to generate new request information.

    摘要翻译: 提供了一种能够提高多存储体存储器中的存储器访问效率的仲裁器,包括仲裁器的存储器访问仲裁系统及其仲裁方法,其中仲裁器检测到不包括在繁忙存储体中的请求,并且允许请求 对应于接收最多待处理请求优先级的银行; 并且由主器件生成的写入请求信息被存储在预定的缓冲器中作为附加的主请求信息被输出,并且向对应的主机提供产生新的请求信息的机会。

    High-voltage and high-power stabilized DC power supply using modified
sine wave output 3-phase inverter
    66.
    发明授权
    High-voltage and high-power stabilized DC power supply using modified sine wave output 3-phase inverter 失效
    高压大功率稳压直流电源采用修正正弦波输出三相逆变器

    公开(公告)号:US5652699A

    公开(公告)日:1997-07-29

    申请号:US514505

    申请日:1995-08-11

    CPC分类号: H02M7/217

    摘要: A stable DC power system of high-voltage and good-output performance is provided by adding a 3-phase inverter, whereby modified waveform for an output control is produced and a filter to a conventional DC power system and by bridge-rectifying. The modified sinusoidal wave such as a varied wave whose upper portion ranging from 30.degree. to 150.degree. is flat of a 1/2 cycle of the sinusoidal wave, a modified wave whose portions ranging from 30.degree. to 90.degree. and from 90.degree. to 150.degree. are linear in a 1/2 cycle of the sinusoidal wave and a modified wave whose portions ranging from 30.degree. to 90.degree. and from 210.degree. to 270.degree. are recessed so as to be symmetrical with respect to a line in the whole cycle of the sinusoidal wave are used for reducing ripples of the output voltage after the 3-phase rectification.

    摘要翻译: 通过添加三相逆变器提供高电压和良好输出性能的稳定的直流电力系统,由此产生用于输出控制的修改波形和对常规直流电力系统的滤波器并通过桥式整流。 改正的正弦波,如30°至150°的上部变化的波,为+ E的平面,正弦波的1/2 + EE周期,部分范围为30°至90°的修正波 90°至150°在正弦波的+ E,fra 1/2 + EE循环中线性化,部分范围为30°至90°和210°至270°的改性波凹入,以便 相对于正弦波整个周期的线对称,用于在三相整流之后减小输出电压的波纹。