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    METHODS FOR FABRICATING A STRESS ENHANCED MOS TRANSISTOR
    62.
    发明申请
    METHODS FOR FABRICATING A STRESS ENHANCED MOS TRANSISTOR 有权
    制造应力增强MOS晶体管的方法

    公开(公告)号：US20080102571A1

    公开(公告)日：2008-05-01

    申请号：US11552582

    申请日：2006-10-25

    申请人： James Pan

    发明人： James Pan

    IPC分类号： H01L21/8234 ,  H01L21/336

    CPC分类号： H01L29/66545 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7843 ,  H01L29/7848

    摘要： Methods are provided for fabricating a stress enhanced MOS transistor. One such method comprises the steps of depositing and patterning a layer of sacrificial material to form a dummy gate electrode and replacing the dummy gate electrode with a stressed gate electrode. After the stressed gate electrode has been formed by a replacement process, a stress liner is deposited overlying the stressed gate electrode.

    摘要翻译： 提供了制造应力增强型MOS晶体管的方法。 一种这样的方法包括以下步骤：沉积和图案化牺牲材料层以形成伪栅电极，并用应力栅电极代替伪栅电极。 在通过更换工艺形成应力栅电极之后，将应力衬垫沉积在应力栅极上。

    Dual-level stacked flash memory cell with a MOSFET storage transistor
    63.
    发明授权
    Dual-level stacked flash memory cell with a MOSFET storage transistor 有权
    具有MOSFET存储晶体管的双电平堆叠闪存单元

    公开(公告)号：US07339226B2

    公开(公告)日：2008-03-04

    申请号：US11154070

    申请日：2005-06-16

    申请人： James Pan ,  Ning Cheng ,  Christy Mein Chu Woo

    发明人： James Pan ,  Ning Cheng ,  Christy Mein Chu Woo

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28273 ,  G11C16/0475 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/7923

    摘要： The present invention is a dual-level flash memory cell design that stores 3 or more bits of information per transistor. The dual-level memory cell stores two lower bits in a first level and stores an upper bit in a second level. The lower bits are programmed, erased and read by alternate modes of operation wherein active regions operate as source and drain, and then drain and source. The upper bit is programmed and erased independent of the lower bits. However, reading of the upper bit depends upon read values of the lower bits. Additional levels are employed to store more than 3 bits of information.

    摘要翻译： 本发明是一种双电平闪存单元设计，其存储每个晶体管3个或更多位的信息。 双级存储器单元存储第一级中的两个较低位，并将高位存储在第二级。 低位通过可选的工作模式进行编程，擦除和读取，其中有源区域作为源极和漏极，然后漏极和源极工作。 高位被编程和擦除，独立于低位。 然而，读取较高位取决于较低位的读取值。 采用附加级别来存储超过3位的信息。

    Low resistivity compound refractory metal silicides with high temperature stability
    67.
    发明申请
    Low resistivity compound refractory metal silicides with high temperature stability 审中-公开
    低电阻复合难熔金属硅化物，具有高温稳定性

    公开(公告)号：US20070120199A1

    公开(公告)日：2007-05-31

    申请号：US11289680

    申请日：2005-11-30

    申请人： James Pan ,  David Brown

    发明人： James Pan ,  David Brown

    IPC分类号： H01L29/76

    CPC分类号： H01L29/0847 ,  H01L21/28518 ,  H01L29/456 ,  H01L29/66545 ,  H01L29/66628

    摘要： Compound refractory metal suicides are formulated to exhibit low resistivity and high temperature stability. Embodiments include various types of semiconductor devices comprising source/drain regions with a compound refractory metal silicide layer thereon, having a resistivity of 1 ohm.μ to 10 ohm.μ and stable at temperatures up to 1100° C.

    摘要翻译： 配制复合难熔金属硅化物以显示低电阻率和高温稳定性。 实施例包括各种类型的半导体器件，其包括源极/漏极区域，其上具有复合难熔金属硅化物层，电阻率为1欧姆至10欧姆·米，在高达1100℃的温度下稳定。

    NS4 NUCLEIC ACIDS AND POLYPEPTIDES AND METHODS OF USE FOR THE TREATMENT OF BODY WEIGHT DISORDERS
    68.
    发明申请
    NS4 NUCLEIC ACIDS AND POLYPEPTIDES AND METHODS OF USE FOR THE TREATMENT OF BODY WEIGHT DISORDERS 审中-公开
    NS4核酸和多肽及其用于治疗体重减轻症的方法

    公开(公告)号：US20070041970A1

    公开(公告)日：2007-02-22

    申请号：US11548405

    申请日：2006-10-11

    申请人： James Pan ,  Audrey Goddard ,  William Wood

    发明人： James Pan ,  Audrey Goddard ,  William Wood

    IPC分类号： C12Q1/68 ,  G01N33/567 ,  A61K39/395 ,  C07H21/04 ,  C12P21/06 ,  C07K14/705 ,  C07K16/28

    CPC分类号： C07K14/47 ,  G01N33/6893 ,  G01N2800/02

    摘要： The present invention is directed to novel polypeptides NS4 and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention. Furthermore, methods of treating body weight disorders (e.g., obesity, cachexia or anorexia) are provided.

    摘要翻译： 本发明涉及新型多肽NS4和编码那些多肽的核酸分子。 本文还提供了包含那些核酸序列的载体和宿主细胞，包含与异源多肽序列融合的本发明的多肽的嵌合多肽分子，与本发明的多肽结合的抗体以及本发明的多肽的制备方法 发明。 此外，提供了治疗体重紊乱（例如肥胖症，恶病质或厌食症）的方法。

    FORMING INTEGRATED CIRCUITS USING SELECTIVE DEPOSITION OF UNDOPED SILICON FILM SEEDED IN CHLORINE AND HYDRIDE GAS
    69.
    发明申请
    FORMING INTEGRATED CIRCUITS USING SELECTIVE DEPOSITION OF UNDOPED SILICON FILM SEEDED IN CHLORINE AND HYDRIDE GAS 失效
    使用选择性沉积在氯化物和氢气中的无机硅膜形成集成电路

    公开(公告)号：US20060246679A1

    公开(公告)日：2006-11-02

    申请号：US11425607

    申请日：2006-06-21

    申请人： Randhir Thakur ,  James Pan

    发明人： Randhir Thakur ,  James Pan

    IPC分类号： H01L21/20

    CPC分类号： H01L28/84 ,  C23C16/045 ,  C23C16/24 ,  C23C16/56 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02664 ,  H01L27/10852 ,  H01L28/90 ,  H01L28/91 ,  Y10S438/964

    摘要： A polysilicon film is formed with enhanced selectivity by flowing chlorine during the formation of the film. The chlorine acts as an etchant to insulative areas adjacent polysilicon structures on which the film is desired to be formed. Bottom electrodes for capacitors are formed using this process, followed by an anneal to create hemishperical grain (HSG) polysilicon. Multilayer capacitor containers are formed in a non-oxidizing ambient so that no oxide is formed between the layers. The structure formed is planarized to form separate containers made from doped and undoped amorphous silicon layers. Selected ones of undoped layers are seeded in a chlorine containing environment and annealed to form HSG. A dielectric layer and second electrode are formed to complete the cell capacitor.

    摘要翻译： 通过在膜的形成期间流动氯，形成具有增强的选择性的多晶硅膜。 氯作为蚀刻剂，其邻近多晶硅结构的绝缘区域需要形成薄膜。 使用该工艺形成用于电容器的底部电极，随后进行退火以产生半球形晶粒（HSG）多晶硅。 多层电容器容器形成在非氧化环境中，使得在层之间不形成氧化物。 所形成的结构被平坦化以形成由掺杂和未掺杂的非晶硅层制成的分离的容器。 将选定的未掺杂层接种在含氯环境中并退火以形成HSG。 形成电介质层和第二电极以完成电池电容器。