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114 records (took 0.022 seconds)

    Charge compensation control circuit and method for use with output driver
    61.
    发明授权
    Charge compensation control circuit and method for use with output driver 失效
    充电补偿控制电路及其与输出驱动器的配合使用

    公开(公告)号：US06342800B1

    公开(公告)日：2002-01-29

    申请号：US09698997

    申请日：2000-10-26

    Applicant: Donald C. Stark ,  Jun Kim ,  Kurt T. Knorpp ,  Michael Tak-Kei Ching ,  Natsuki Kushiyama

    Inventor： Donald C. Stark ,  Jun Kim ,  Kurt T. Knorpp ,  Michael Tak-Kei Ching ,  Natsuki Kushiyama

    IPC: H03K512

    CPC classification number: H03K17/164 ,  G11C7/1051 ,  H03K19/00384

    Abstract: An output driver has an output multiplexor and an output current driver. The output multiplexor receives a data signal and outputs a q-node signal. The output current driver receives the q-node signal and drives a bus based on the q-node signal. The output multiplexor processes the data signal in various ways to generate the q-node signal. The output current driver is responsive to current control bits to select a amount of output drive current. In addition, the output multiplexor is controlled such that the output impedance of the output current driver is maintained within a predetermined range.

    Abstract translation: 输出驱动器具有输出多路复用器和输出电流驱动器。 输出多路复用器接收数据信号并输出​​q-节点信号。 输出电流驱动器接收q-节点信号并根据q-节点信号驱动总线。 输出多路复用器以各种方式处理数据信号以产生q-结点信号。 输出电流驱动器响应于当前控制位以选择输出驱动电流的量。 此外，控制输出多路复用器，使得输出电流驱动器的输出阻抗保持在预定范围内。

    Method of prevention of dangling transaction occurrence using a terminated transaction process technique at redo step
    62.
    发明授权
    Method of prevention of dangling transaction occurrence using a terminated transaction process technique at redo step 失效
    使用终止的交易处理技术在重做步骤中预防悬挂交易发生的方法

    公开(公告)号：US5983361A

    公开(公告)日：1999-11-09

    申请号：US974330

    申请日：1997-11-19

    Applicant: Jin Soo Lee ,  Jun Kim ,  Soon Young Park ,  Young Chul Park

    Inventor： Jin Soo Lee ,  Jun Kim ,  Soon Young Park ,  Young Chul Park

    IPC: G06F11/00 ,  G06F11/14

    CPC classification number: G06F11/1471

    Abstract: The present invention relates to a recovery function from a system failure such as a power failure and a media failure such as a breakage of disk at a transaction processing system of a plurality of user environment, and is applied in carrying out a checkpoint to reduce an amount of work required for failure recovery, and particularly to a fuzzy checkpoint method which is a method of enhancing a system performance by not interrupting other transactions ever for a moment at the time of checkpoint. According to the present invention, the occurrance of dangling transaction is prevented by deleting the corresponding transaction entry from the transaction table during performing of the redo step, for the transactions terminated between the point of time when the checkpoint start log record of the last completed checkpoint is logged and the point of time when the checkpoint end log record is logged.

    Abstract translation: 本发明涉及从多个用户环境中的事务处理系统等系统故障的恢复功能，例如电源故障和诸如盘的破坏的介质故障，并且被应用于执行检查点以减少 故障恢复所需的工作量，特别是一种模糊检查点方法，该模式检查点方法是通过在检查点时不间断其他事务一段时间来提高系统性能的方法。 根据本发明，通过在执行重做步骤期间从交易表中删除相应的交易条目来防止悬挂交易的发生，对于在最后完成的检查点的检查点开始日志记录的时间点之间终止的交易 被记录，并记录检查点结束日志记录的时间点。

    Method of prevention of dangling transaction occurrence using a transaction table initialization technique at an analysis step
    63.
    发明授权
    Method of prevention of dangling transaction occurrence using a transaction table initialization technique at an analysis step 失效
    在分析步骤中使用事务表初始化技术来防止悬挂事务发生的方法

    公开(公告)号：US5850508A

    公开(公告)日：1998-12-15

    申请号：US975213

    申请日：1997-11-20

    Applicant: Jin Soo Lee ,  Jun Kim ,  Soon Young Park ,  Young Chul Park

    Inventor： Jin Soo Lee ,  Jun Kim ,  Soon Young Park ,  Young Chul Park

    IPC: G06F11/00 ,  G06F11/14

    CPC classification number: G06F11/1471 ,  Y10S707/99953

    Abstract: A method for carrying out a check point for preventing a dangling transaction occurrence. The method uses a transaction table initialization technique performed during a recovery function. The method is performed by avoiding interruption of transactions occurring at the time the check point is carried out and is performed by reducing the amount of work required at the time of performing a recovery function from a failure detected in the transaction processing system. The occurrence of a dangling transaction is prevented by using a transaction table initialization technique at an analysis step for the transaction terminated between a time interval commencing when a check point start log record of a prior completed check point is logged and ending at a point of time when the check point end log record is logged.

    Abstract translation: 一种用于执行检查点以防止悬挂事务发生的方法。 该方法使用在恢复功能期间执行的事务表初始化技术。 该方法是通过避免在执行检查点时发生的事务的中断而进行的，并且通过从在事务处理系统中检测到的故障中减少执行恢复功能所需的工作量来执行。 通过在分析步骤中使用事务表初始化技术来防止事务表初始化技术的发生，以便在从先前完成的检查点的检查点开始日志记录被记录并在一个时间点结束之间开始的时间间隔之间终止事务 当检查点结束日志记录被记录时。

    Integrated circuit memory device having dynamic memory bank count and page size
    65.
    发明授权
    Integrated circuit memory device having dynamic memory bank count and page size 有权
    集成电路存储器件，具有动态存储体积计数和页面大小

    公开(公告)号：US07755968B2

    公开(公告)日：2010-07-13

    申请号：US11834915

    申请日：2007-08-07

    Applicant: Steven Woo ,  Michael Ching ,  Chad A. Bellows ,  Wayne S. Richardson ,  Kurt T. Knorpp ,  Jun Kim

    Inventor： Steven Woo ,  Michael Ching ,  Chad A. Bellows ,  Wayne S. Richardson ,  Kurt T. Knorpp ,  Jun Kim

    IPC: G11C8/00

    CPC classification number: G11C7/106 ,  G11C7/065 ,  G11C7/1045 ,  G11C7/1051

    Abstract: An integrated circuit memory device has a storage array with an adjustable number of memory banks, a row of sense amplifiers to access storage cells in the storage array; and memory access control circuitry. The memory access control circuitry provides a first number of memory banks and a first page size in the integrated circuit memory device in a first mode of operation, and provides a second number of memory banks and a second page size in the integrated circuit memory device in a second mode of operation. The memory access control circuitry includes logic circuitry to adjust the number of memory banks in the integrated circuit memory device, and to adjust the page size of the integrated circuit memory device.

    Abstract translation: 集成电路存储器件具有可调节数量的存储体的存储阵列，一行读出放大器，用于存取存储阵列中的存储单元; 和存储器访问控制电路。 存储器访问控制电路在第一操作模式下在集成电路存储器件中提供第一数量的存储体和第一页面大小，并且在集成电路存储器件中提供第二数量的存储体和第二页面尺寸 第二种操作模式。 存储器访问控制电路包括用于调整集成电路存储器件中的存储体的数量的逻辑电路，并且调整集成电路存储器件的页面大小。

    Communication channel calibration using feedback
    67.
    发明授权
    Communication channel calibration using feedback 有权
    通信通道校准使用反馈

    公开(公告)号：US07516029B2

    公开(公告)日：2009-04-07

    申请号：US10864897

    申请日：2004-06-09

    Applicant: Jun Kim ,  Wayne S. Richardson ,  Glenn Chiu

    Inventor： Jun Kim ,  Wayne S. Richardson ,  Glenn Chiu

    IPC: G06F15/00

    CPC classification number: H04B17/11 ,  H04L5/1438 ,  H04L25/03343 ,  H04L2025/03802

    Abstract: A method for calibrating a communication channel coupling first and second components includes transmitting a data signal from the first component to the second component on the communication channel, and sensing a characteristic, such as phase, of the data signal on the second component. Information about the sensed characteristic is fed back to the first component using an auxiliary channel. An adjustable parameter, such as phase, for the transmitter is adjusted on the first component in response to the information. Also, a characteristic of a data signal received from the transmitter on the second component is sensed and used to adjust an adjustable parameter for the receiver on the first component.

    Abstract translation: 用于校准耦合第一和第二组件的通信信道的方法包括在第二组件上传输数据信号从第一分量到通信信道上的第二分量，以及感测数据信号的相位等特征。 关于感测到的特性的信息使用辅助信道反馈到第一分量。 响应于该信息，在第一组件上调整用于发射机的可调参数，例如相位。 而且，感测从第二组件上的发射机接收到的数据信号的特性，并用于调整第一组件上的接收机的可调参数。

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