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    Cells in which activity of the protein involved in transportation of GDP-fucose is reduced or lost
    61.
    发明授权
    Cells in which activity of the protein involved in transportation of GDP-fucose is reduced or lost 有权
    涉及GDP-岩藻糖运输的蛋白质活性降低或丧失的细胞

    公开(公告)号：US07749753B2

    公开(公告)日：2010-07-06

    申请号：US10409600

    申请日：2003-04-09

    申请人： Yutaka Kanda ,  Mitsuo Satoh ,  Katsuhiro Mori

    发明人： Yutaka Kanda ,  Mitsuo Satoh ,  Katsuhiro Mori

    IPC分类号： C12P21/02 ,  C07H21/04

    CPC分类号： C12N15/8245 ,  A61K2039/505 ,  C07K14/47 ,  C07K16/18 ,  C07K16/2866 ,  C07K2317/24 ,  C07K2317/732

    摘要： A cell in which the activity of a protein relating to transport of an intracellular sugar nucleotide, GDP-fucose, to the Golgi body is more decreased or deleted than its parent cell; a process for producing an antibody composition using the cell; a transgenic non-human animal or plant or the progenies thereof, in which genome is modified so as to have a decreased or deleted activity of a protein relating to transport of an intracellular sugar nucleotide, GDP-fucose, to the Golgi body; a process for producing an antibody composition from the animal or plant; and a medicament comprising the antibody composition.

    摘要翻译： 与细胞内糖核苷酸GDP-岩藻糖转运到高尔基体相关的蛋白质的活性比其亲本细胞更多地减少或缺失的细胞; 使用该细胞产生抗体组合物的方法; 转基因非人动物或植物或其后代，其中基因组被修饰以具有与细胞内糖核苷酸GDP-岩藻糖转运到高尔基体相关的蛋白质的降低或缺失的活性; 从动物或植物制备抗体组合物的方法; 和包含该抗体组合物的药物。

    COATING COMPOSITION AND PHOTOCHROMIC OPTICAL ARTICLE
    62.
    发明申请
    COATING COMPOSITION AND PHOTOCHROMIC OPTICAL ARTICLE 有权
    涂料组合物和光电光学制品

    公开(公告)号：US20100110521A1

    公开(公告)日：2010-05-06

    申请号：US12519113

    申请日：2008-02-21

    申请人： Ikumi Kawaguchi ,  Hironobu Nagoh ,  Katsuhiro Mori

    发明人： Ikumi Kawaguchi ,  Hironobu Nagoh ,  Katsuhiro Mori

    IPC分类号： C09D4/00 ,  B32B9/00 ,  B32B27/00 ,  B05D5/06 ,  G02B5/23 ,  G02B1/10

    CPC分类号： G02B5/23 ,  C08G77/14 ,  C08K3/36 ,  C08K5/5435 ,  C09D7/61 ,  C09D7/67 ,  C09D183/04 ,  C09D183/06 ,  G02B1/105 ,  G02B1/14 ,  Y10T428/25 ,  Y10T428/259 ,  Y10T428/31663

    摘要： [Problem] To provide a coating composition capable of forming a hard coating on the surfaces of an optical base member such as a plastic lens featuring highly closely adhering property, excellent transparency and excellent scratch resistance.[Means for Solution] The coating composition comprise (a) a fine granular silica having a grain size of not larger than 30 nm; (b) organosilicon compound components containing an epoxy group-containing organosilicon compound (b1) and tetraalkoxysilane (b2) at a mass ratio (b1/b2) of 0.25 to 4.0; (c) water; and (d) a curing catalyst comprising a complex containing aluminum as a core metal, wherein the fine granular silica (a) is contained in an amount of 15 to 55 parts by mass, the water (c) is contained in an amount of 30 to 200 parts by mass and the curing catalyst (d) is contained in an amount of 0.1 to 5.0 parts by mass per the total amount of the fine granular silica (a) and the organosilicon compound components (b) of 100 parts by mass.

    摘要翻译： [问题]提供一种能够在诸如塑料透镜的光学基底构件的表面上形成硬涂层的涂料组合物，其具有高密合性，优异的透明性和优异的耐刮擦性。 [解决方案]涂料组合物包含（a）粒径不大于30nm的细粒状二氧化硅; （b）质量比（b1 / b2）为0.25〜4.0的含有环氧基的有机硅化合物（b1）和四烷氧基硅烷（b2）的有机硅化合物成分; （c）水; 和（d）包含含有铝作为核心金属的络合物的固化催化剂，其中细粒状二氧化硅（a）的含量为15〜55质量份，水（c）的含量为30 相对于100质量份，相对于细颗粒状二氧化硅（a）和有机硅化合物成分（b）的总量，固化催化剂（d）的含量为0.1〜5.0质量份。

    METHOD OF PRODUCING COATED LENSES
    63.
    发明申请
    METHOD OF PRODUCING COATED LENSES 有权
    生产涂层镜片的方法

    公开(公告)号：US20100086700A1

    公开(公告)日：2010-04-08

    申请号：US12516740

    申请日：2008-01-25

    申请人： Naoto Takahashi ,  Katsuhiro Mori ,  Noriyuki Fukada

    发明人： Naoto Takahashi ,  Katsuhiro Mori ,  Noriyuki Fukada

    IPC分类号： G02B1/12 ,  C08F2/48

    CPC分类号： B05D1/005 ,  B05D3/067 ,  B05D5/061

    摘要： A method of coating without permitting the coating solution to flow onto the side surfaces or the back surfaces of the lenses in the operation for applying the coating solution onto the lenses. A lens 15 is spin-coated with the coating solution having a particular viscosity. A side edge portion 121 of a spatula 119 is brought into contact with an upper edge portion of a side surface 15a of the lens 15 before the coating solution fed onto the surface of the lens arrives at the peripheral edge portion of the lens. The side edge portion 121 of the spatula 119 is so arranged that the upper end side of the spatula is tilted toward the center side of the lens 15 at an angle of 5 to 35 degrees with the vertical line as a reference. The coating solution applied onto the lens 15 that is rotating adheres onto the spatula 119 but does not adhere onto the side surface of the lens 15.

    摘要翻译： 在涂布溶液到透镜的操作中，涂布方法不允许涂布溶液流到透镜的侧表面或背面。 透镜15被涂覆有具有特定粘度的涂布溶液。 刮刀119的侧边缘部分121与透镜15的侧表面15a的上边缘部分接触，然后将馈送到透镜表面的涂布溶液到达透镜的周缘部分。 刮铲119的侧边缘部分121被布置成使得刮刀的上端侧以垂直线作为基准以5至35度的角度朝向透镜15的中心侧倾斜。 施加到正在旋转的透镜15上的涂布溶液粘附到刮刀119上，但不粘附到透镜15的侧表面上。

    Dynamic random access memory (DRAM) for suppressing a short-circuit current
    64.
    发明授权
    Dynamic random access memory (DRAM) for suppressing a short-circuit current 有权
    用于抑制短路电流的动态随机存取存储器（DRAM）

    公开(公告)号：US07663948B2

    公开(公告)日：2010-02-16

    申请号：US11730789

    申请日：2007-04-04

    申请人： Katsuhiro Mori

    发明人： Katsuhiro Mori

    IPC分类号： G11C29/24 ,  G11C7/12 ,  G11C7/06 ,  G11C7/08

    CPC分类号： G11C29/83 ,  G11C11/401 ,  G11C29/816

    摘要： A semiconductor memory device which has a normal memory cell array and a redundant memory cell array for replacing a failure bit in the normal memory cell array, having: a memory cell array having a plurality of word lines, a plurality of bit line pairs crossing the word lines, and a plurality of memory cells placed at the crossing positions; and a plurality of sense amplifier circuits which are placed between adjacent memory cell arrays and are shared by bit line pairs of memory cell arrays on both sides. And a current interrupting circuit for disconnecting the sense amplifier and the bit line pairs in a column having a failure is formed respectively between the sense amplifier circuit and the bit line pairs on both sides. By this current interrupting circuit, short-circuit current from the sense amplifier circuit to the shorted area can be suppressed.

    摘要翻译： 一种具有正常存储单元阵列的半导体存储器件和用于替换正常存储单元阵列中的故障位的冗余存储单元阵列，具有：具有多条字线的存储单元阵列，与 字线和放置在交叉位置的多个存储单元; 以及多个读出放大器电路，其被放置在相邻的存储单元阵列之间并且由两侧的存储单元阵列的位线对共享。 并且在感测放大器电路和两侧的位线对之间分别形成用于断开读出放大器和具有故障的列中的位线对的电流中断电路。 通过该电流中断电路，可以抑制从读出放大器电路到短路区域的短路电流。

    Semiconductor memory device
    66.
    发明申请
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US20080074939A1

    公开(公告)日：2008-03-27

    申请号：US11730789

    申请日：2007-04-04

    申请人： Katsuhiro Mori

    发明人： Katsuhiro Mori

    IPC分类号： G11C7/00

    CPC分类号： G11C29/83 ,  G11C11/401 ,  G11C29/816

    摘要： A semiconductor memory device which has a normal memory cell array and a redundant memory cell array for replacing a failure bit in the normal memory cell array, having: a memory cell array having a plurality of word lines, a plurality of bit line pairs crossing the word lines, and a plurality of memory cells placed at the crossing positions; and a plurality of sense amplifier circuits which are placed between adjacent memory cell arrays and are shared by bit line pairs of memory cell arrays on both sides. And a current interrupting circuit for disconnecting the sense amplifier and the bit line pairs in a column having a failure is formed respectively between the sense amplifier circuit and the bit line pairs on both sides. By this current interrupting circuit, short-circuit current from the sense amplifier circuit to the shorted area can be suppressed.

    摘要翻译： 一种具有正常存储单元阵列的半导体存储器件和用于替换正常存储单元阵列中的故障位的冗余存储单元阵列，具有：具有多条字线的存储单元阵列，与 字线和放置在交叉位置的多个存储单元; 以及多个读出放大器电路，其被放置在相邻的存储单元阵列之间并且由两侧的存储单元阵列的位线对共享。 并且在感测放大器电路和两侧的位线对之间分别形成用于断开读出放大器和具有故障的列中的位线对的电流中断电路。 通过该电流中断电路，可以抑制从读出放大器电路到短路区域的短路电流。

    Process for producing antibody composition by using rna inhibiting the function of alpha1,6-fucosyltransferase
    67.
    发明申请
    Process for producing antibody composition by using rna inhibiting the function of alpha1,6-fucosyltransferase 审中-公开
    通过使用抑制α1,6-岩藻糖基转移酶功能的rna产生抗体组合物的方法

    公开(公告)号：US20070134759A1

    公开(公告)日：2007-06-14

    申请号：US10575096

    申请日：2004-10-08

    申请人： Harue Nishiya ,  Mitsuo Satoh ,  Katsuhiro Mori

    发明人： Harue Nishiya ,  Mitsuo Satoh ,  Katsuhiro Mori

    IPC分类号： C07K16/40 ,  C07H21/04 ,  C12P21/06 ,  C12N9/10

    CPC分类号： C12N15/1137 ,  C07K16/00 ,  C07K2317/72 ,  C12N2310/111 ,  C12N2310/14 ,  C12Y204/01068

    摘要： The present invention provides a process for producing an antibody composition using a cell, which comprises using a cell into which an RNA having activity of suppressing the function of an enzyme relating to the modification of a sugar chain in which 1-position of fucose is bound to 6-position of N-acetylglucosamine in the reducing end through α-bond in a complex type N-glycoside-linked sugar chain is introduced; the RNA used in the production process; a DNA corresponding to the RNA; a cell in which the RNA or DNA is introduced or expressed; a process for producing the cell; and a method for suppressing the enzyme.

    摘要翻译： 本发明提供一种使用细胞的抗体组合物的制造方法，其包括使用具有抑制与其中1位的岩藻糖结合的糖链的修饰相关的酶的功能的活性的RNA的细胞 通过复合型N-糖苷连接的糖链中的α-键引入还原末端的N-乙酰葡糖胺的6-位; 生产过程中使用的RNA; 对应于RNA的DNA; 引入或表达RNA或DNA的细胞; 一种生产细胞的方法; 和抑制酶的方法。

    Semiconductor memory
    69.
    发明授权
    Semiconductor memory 有权

    公开(公告)号：US06621750B2

    公开(公告)日：2003-09-16

    申请号：US10155029

    申请日：2002-05-28

    申请人： Yoshiaki Okuyama ,  Shinya Fujioka ,  Kota Hara ,  Katsuhiro Mori

    发明人： Yoshiaki Okuyama ,  Shinya Fujioka ,  Kota Hara ,  Katsuhiro Mori

    IPC分类号： G11C700

    CPC分类号： G11C29/808 ,  G11C29/812 ,  G11C29/848

    摘要： A redundancy memory circuit stores a defect address indicating a defective memory cell row. A redundancy control circuit disables the defective memory cell row corresponding to the defect address stored in the redundancy memory circuit and enables a redundancy memory cell row in the memory block containing the defective memory cell row. Moreover, in the other memory blocks, the redundancy control circuit disables memory cell rows corresponding to the defective memory cell row and enables redundancy memory cell rows instead of these memory cell rows. Consequently, not only the memory block having the defective memory cell row but one of the memory cell rows in the other memory blocks is always also relieved. Thus, the redundancy memory circuit can be shared among all the memory blocks with a reduction in the number of redundancy memory circuits. As a result, the semiconductor memory can be reduced in chip size.

    Fuse circuit
    70.
    发明授权
    Fuse circuit 有权
    保险丝电路

    公开(公告)号：US06566937B1

    公开(公告)日：2003-05-20

    申请号：US10152579

    申请日：2002-05-23

    申请人： Katsuhiro Mori ,  Shinya Fujioka ,  Masahiro Niimi

    发明人： Katsuhiro Mori ,  Shinya Fujioka ,  Masahiro Niimi

    IPC分类号： H01H3776

    CPC分类号： G11C17/16

    摘要： Upon receiving a level of a second node through a third switch in the first half of a first period, a holding circuit outputs it as a fuse signal indicating a blown-out state of a fuse. Since the third switch turns off in the second half of the first period, a change in level of the second node occurring thereafter will not affect data in the holding circuit, whereby prevents malfunction of a fuse circuit. With the fuse blown, a level of a first node gets fixed at that of a second power supply line after the first period. This eliminates a voltage difference between both ends of the fuse, thereby preventing a growback. No occurrence of growback makes just one fuse blowing sufficient for the fuse circuit even with the fuse not completely cut off. This consequently shortens a time for blowing the fuse in a test process.

    摘要翻译： 在第一周期的前半段通过第三开关接收到第二节点的电平时，保持电路将其作为指示保险丝的熔断状态的熔丝信号输出。 由于在第一周期的后半部分中第三开关断开，所以其后发生的第二节点的电平变化不会影响保持电路中的数据，从而防止熔丝电路的故障。 在保险丝熔断时，在第一周期之后，第一节点的电平固定在第二电源线的电平上。 这消除了保险丝两端之间的电压差，从而防止了长时间的恢复。 即使没有完全切断保险丝，也不会发生长时间退回，只有一个保险丝对保险丝电路充足。 从而缩短了在测试过程中熔断熔断器的时间。