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公开(公告)号：US12113581B2
公开(公告)日：2024-10-08
申请号：US18102395
申请日：2023-01-27
申请人： Lightmatter, Inc.
发明人： Darius Bunandar , Nicholas C. Harris , Carl Ramey
CPC分类号： H04B10/70 , G02F1/21 , H04B10/548 , H04B10/801 , H04J14/02 , G02F1/212 , G02F2203/48 , G02F2203/50 , G06T1/20
摘要： Aspects relate to a photonic processing system, a photonic processor, and a method of performing matrix-vector multiplication. An optical encoder may encode an input vector into a first plurality of optical signals. A photonic processor may receive the first plurality of optical signals; perform a plurality of operations on the first plurality of optical signals, the plurality of operations implementing a matrix multiplication of the input vector by a matrix; and output a second plurality of optical signals representing an output vector. An optical receiver may detect the second plurality of optical signals and output an electrical digital representation of the output vector.
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公开(公告)号：US20240264395A1
公开(公告)日：2024-08-08
申请号：US18432770
申请日：2024-02-05
申请人： Lightmatter, Inc.
发明人： Nicholas C. Harris , Jessie Rosenberg , Chian-min Richard Ho , Sandeep Sane , Binoy Shah , Shashank Gupta , Darius Bunandar
IPC分类号： G02B6/42
CPC分类号： G02B6/4293 , G02B6/4215 , G02B6/4272 , G02B6/4281 , G02B6/4244
摘要： Provided herein are optical fiber arrays and optical assemblies included optical fiber arrays. The optical fiber array includes a fiber array chip that has first optical connections disposed on a first edge of the fiber array chip and second optical connections disposed on a second edge of the fiber array chip. Optical fibers are coupled to the first optical connections. Active devices (e.g., photonic and/or electronic devices) are disposed on the fiber array chip. The optical fiber array is removably, optically couplable to another optical component such as a photonic integrated circuit.
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63.发明公开公开(公告)号：US20240248950A1
公开(公告)日：2024-07-25
申请号：US18390329
申请日：2023-12-20
申请人： Lightmatter, Inc.
发明人： David Widemann , Bradford Turcott , Darius Bunandar , Nicholas C. Harris , Eric Hein , Alexandra Wleklinski
IPC分类号： G06F17/14
CPC分类号： G06F17/142
摘要： Hybrid analog-digital processors and related methods are described. A hybrid analog-digital processor or related method may carry out an algorithm for efficiently performing a Fourier Transform with lower power consumption and higher speed compared with fully-digital processors. A hybrid analog-digital processor or related method may use a digital processor to perform some portions of a Fourier Transform, such as sizing signals for input into an analog accelerator (such as a photonic accelerator). The analog accelerator may be configured to perform some portions of the Fourier Transform by performing matrix-vector multiplication on the sized signals using light. Further efficiency may be provided by in some environments by batching signals that are input into the analog accelerator into 2D arrays, or by performing matrix-vector multiplication using a submatrix of a full Fourier Transform matrix.
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公开(公告)号：US12038777B2
公开(公告)日：2024-07-16
申请号：US17359025
申请日：2021-06-25
申请人： Lightmatter, Inc.
发明人： Michael Gould , Carl Ramey , Nicholas C. Harris , Darius Bunandar
CPC分类号： G06E3/008 , H03H17/06 , H03H2017/0081 , H03M1/12
摘要： Hybrid analog-digital processing systems are described. An example of a hybrid analog-digital processing system includes photonic accelerator configured to perform matrix-vector multiplication using light. The photonic accelerator exhibits a frequency response having a first bandwidth (e.g., less than 3 GHz). The hybrid analog-digital processing system further includes a plurality of analog-to-digital converters (ADCs) coupled to the photonic accelerator, and a plurality of digital equalizers coupled to the plurality of ADCs, wherein the digital equalizers are configured to set a frequency response of the hybrid analog-digital processing system to a second bandwidth greater than the first bandwidth.
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公开(公告)号：US20240201444A1
公开(公告)日：2024-06-20
申请号：US18542974
申请日：2023-12-18
申请人： Lightmatter, Inc.
发明人： Clifford Chao , Darius Bunandar
IPC分类号： G02B6/35
CPC分类号： G02B6/3596
摘要： Described herein are a computing systems comprising a photonic interposer having an optical network comprising a plurality of waveguides and a plurality of controllable optical switches; an electronic die having a surface bonded to the photonic interposer, an inner interface comprising a first plurality of ports electrically coupling the electronic die to the photonic interposer through the surface; and an outer interface comprising a second plurality of ports electrically coupling the electronic die to the photonic interposer through the surface, wherein the outer interface at least partially encloses the inner interface.
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公开(公告)号：US20240152331A1
公开(公告)日：2024-05-09
申请号：US18496494
申请日：2023-10-27
申请人： Lightmatter, Inc.
摘要： A photonic processor uses light signals and a residue number system (RNS) to perform calculations. The processor sums two or more values by shifting the phase of a light signal with phase shifters and reading out the summed phase with a coherent detector. Because phase winds back every 2π radians, the photonic processor performs addition modulo 2π. A photonic processor may use the summation of phases to perform dot products and correct erroneous residues. A photonic processor may use the RNS in combination with a positional number system (PNS) to extend the numerical range of the photonic processor, which may be used to accelerate homomorphic encryption (HE)-based deep learning.
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公开(公告)号：US11947164B2
公开(公告)日：2024-04-02
申请号：US17165157
申请日：2021-02-02
申请人： Lightmatter, Inc.
CPC分类号： G02B6/12 , H01L23/50 , H05K1/183 , G02B6/4274 , H01L23/13 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L25/167 , H01L2924/15153
摘要： Described herein are photonic communication platforms and related packages. In one example, a photonic package includes a substrate carrier having a recess formed through the top surface of the substrate carrier. The substrate carrier may be made of a ceramic laminate. A photonic substrate including a plurality of photonic modules is disposed in the recess. The photonic modules may be patterned using a common photomask, and as a result, may share a same layer pattern. A plurality of electronic dies may be positioned on top of respective photonic modules. The photonic modules enable communication among the dies in the optical domain. Power delivery substrates may be used to convey electric power from the substrate carrier to the electronic dies and to the photonic substrate. Power delivery substrates may be implemented, for example, using bridge dies or interposers (e.g., silicon or organic interposers).
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公开(公告)号：US20240077904A1
公开(公告)日：2024-03-07
申请号：US18505602
申请日：2023-11-09
申请人： Lightmatter, Inc.
摘要： Systems and methods for performing matrix operations using a photonic processor are provided. The photonic processor includes encoders configured to encode a numerical value into an optical signal and optical multiplication devices configured to output an electrical signal proportional to a product of one or more encoded values. The optical multiplication devices include a first input waveguide, a second input waveguide, a coupler circuit coupled to the first input waveguide and the second input waveguide, a first detector and a second detector coupled to the coupler circuit, and a circuit coupled to the first detector and second detector and configured to output a current that is proportional to a product of a first input value and a second input value.
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公开(公告)号：US20230388024A1
公开(公告)日：2023-11-30
申请号：US18190931
申请日：2023-03-27
申请人： Lightmatter, Inc.
发明人： Mykhailo Tymchenko , Bradford Turcott , Robert Turner , Binoy Shah , Shashank Gupta , James Carr , Ajay Joshi , Nicholas C. Harris , Darius Bunandar
IPC分类号： H04B10/80 , H04B10/40 , H04J14/02 , H04B10/079
CPC分类号： H04B10/803 , H04B10/808 , H04B10/40 , H04J14/0212 , H04B10/07953
摘要： Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.
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公开(公告)号：US20230358957A1
公开(公告)日：2023-11-09
申请号：US18356680
申请日：2023-07-21
申请人： Lightmatter, Inc.
发明人： Nicholas C. Harris , Carl Ramey , Michael Gould , Thomas Graham , Darius Bunandar , Ryan Braid , Mykhailo Tymchenko
IPC分类号： G02B6/122 , G02B6/12 , H01L21/027 , G02B6/13 , G02B6/136
CPC分类号： G02B6/1225 , G02B6/12004 , H01L21/0275 , G02B6/13 , G02B6/12007 , G02B6/136 , H04J14/02
摘要： Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
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