公开(公告)号：US20060066644A1

公开(公告)日：2006-03-30

申请号：US11235601

申请日：2005-09-26

申请人： Ikuhiro Yamaguchi ,  Manabu Takei

发明人： Ikuhiro Yamaguchi ,  Manabu Takei

IPC分类号： G09G5/10

CPC分类号： G09G3/325 ,  G09G3/3283 ,  G09G2300/0417 ,  G09G2300/0842 ,  G09G2300/0847 ,  G09G2300/0866 ,  G09G2320/0219 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78696

摘要： A display element drive circuit includes a first circuit which holds as a voltage component electric charges based on a gradation signal corresponding to display data, a second circuit which supplies the gradation signal to the electric charge holding circuit at a timing of application of a selection signal, current control type display elements, and a third circuit which generates a driving current based on the voltage component held in the first circuit and supplies the generated driving current to the display element. One of the second and third circuits includes at least one field effect transistor. The field effect transistor includes gate, electrode and drain electrodes, and a source-side parasitic capacitance formed between the gate and source electrodes and a drain-side parasitic capacitance formed between the gate and drain electrodes of the field effect transistor have different capacitance values.

摘要翻译： 显示元件驱动电路包括：第一电路，其基于与显示数据相对应的灰度信号作为电压分量保持电荷;第二电路，在施加选择信号的时刻将灰度信号提供给电荷保持电路 电流控制型显示元件，以及第三电路，其基于保持在第一电路中的电压分量产生驱动电流，并将产生的驱动电流提供给显示元件。 第二和第三电路中的一个包括至少一个场效应晶体管。 场效应晶体管包括栅极，电极和漏极，并且形成在栅极和源极之间的源极寄生电容和形成在场效应晶体管的栅极和漏极之间的漏极侧寄生电容具有不同的电容值。

公开(公告)号：US20060061526A1

公开(公告)日：2006-03-23

申请号：US11228732

申请日：2005-09-16

申请人： Tomoyuki Shirasaki ,  Ikuhiro Yamaguchi ,  Manabu Takei

发明人： Tomoyuki Shirasaki ,  Ikuhiro Yamaguchi ,  Manabu Takei

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/0417 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2330/021

摘要： A drive circuit which drives an optical element in accordance with a gradation signal corresponding to display data includes an electric charge holding circuit which holds electric charges based on the gradation signal as a voltage component, and a driving current control circuit which generates a driving current based on the voltage component held in the electric charge holding circuit and supplies the generated driving current to the optical element. The driving current control circuit has at least one double-gate type thin film transistor. The transistor includes a semiconductor layer, a first gate electrode provided above the semiconductor layer, a second gate electrode provided below the semiconductor layer, and a source and drain electrodes provided on both end portion sides of the semiconductor layer.

摘要翻译： 根据与显示数据相对应的灰度信号驱动光学元件的驱动电路包括基于灰度信号作为电压分量而保持电荷的电荷保持电路和产生基于驱动电流的驱动电流控制电路 在保持在电荷保持电路中的电压分量上，并将产生的驱动电流提供给光学元件。 驱动电流控制电路具有至少一个双栅型薄膜晶体管。 晶体管包括半导体层，设置在半导体层上方的第一栅极电极，设置在半导体层下方的第二栅电极，以及设置在半导体层的两端部侧的源电极和漏电极。

公开(公告)号：US20050225518A1

公开(公告)日：2005-10-13

申请号：US10515246

申请日：2003-06-09

申请人： Hiroyasu Yamada ,  Manabu Takei

发明人： Hiroyasu Yamada ,  Manabu Takei

IPC分类号： H01L51/50 ,  G09G3/00 ,  G09G3/20 ,  G09G3/30 ,  G09G3/32 ,  H05B33/14

CPC分类号： G09G3/325 ,  G09G2300/0417 ,  G09G2300/0819 ,  G09G2300/0847 ,  G09G2300/0852 ,  G09G2300/0866 ,  G09G2310/027 ,  G09G2320/0223 ,  G09G2320/043

摘要： A display panel (110) comprises a plurality of optical elements (OEL) each having a pair of electrodes and performing an optical operation according to current passing between the pair of electrodes, a current line (DL), a switch circuit (Tr2) that passes a write current (Ia) with a predetermined current value through the current line (DL) during a selection time (Tse) and stops passing current during a non-selection time (Tnse), and a current storage circuit (Tr1, Tr2, Cs, Cp) that stores current data according to the current value of the write current (Ia) passing through the current line (DL) during the selection time (Tse) and that supplies a drive current (Ib) having a current value, which is obtained by subtracting a predetermined offset current (Ioff) from the current value of the stored write current (Ia), to the optical elements (OEL) during the non-selection time (Tnse). The current storage circuit (Tr1, Tr2, Cs, Cp) includes a first capacitor device (Cs) to which an electrical charge corresponding to the write current (Ia) is written and a second capacitor device (Cp) to which an electrical charge corresponding to offset current (Ioff) is written, and the second capacitor device (Cp) has a capacitive value, which is equal to or larger than the first capacitor device (Cs).

摘要翻译： 显示面板（110）包括多个光学元件（OEL），每个光学元件具有一对电极，并且根据在一对电极之间的电流进行光学操作，电流线（DL），开关电路（Tr 2） 在选择时间（Tse）期间通过当前行（DL）通过具有预定电流值的写入电流（Ia），并且在非选择时间（Tnse）期间停止通过电流，并且当前存储电路（Tr 1， Tr2，Cs，Cp），其根据在选择时间（Tse）期间通过当前行（DL）的写入电流（Ia）的当前值存储当前数据，并且提供具有电流的驱动电流（Ib） 通过从所存储的写入电流（Ia）的当前值减去预定偏移电流（Ioff）而获得的值在非选择时间（Tnse）期间被提供给光学元件（OEL）。 当前存储电路（Tr 1，Tr 2，Cs，Cp）包括写入对应于写入电流（Ia）的电荷的第一电容器装置（Cs）和第二电容器装置（Cp） 写入对应于偏移电流（Ioff）的电荷，并且第二电容器装置（Cp）具有等于或大于第一电容器装置（Cs）的电容值。

公开(公告)号：US06759301B2

公开(公告)日：2004-07-06

申请号：US10461094

申请日：2003-06-13

申请人： Manabu Takei ,  Tatsuhiko Fujihira

发明人： Manabu Takei ,  Tatsuhiko Fujihira

IPC分类号： H01L21336

CPC分类号： H01L29/66712 ,  H01L21/263 ,  H01L29/32 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

摘要： A semiconductor device is provided which can be manufactured even by using an inexpensive FZ wafer in a wafer process and still has a sharp inclination of a high impurity concentration in a high impurity concentration layer at the outermost portion of the reverse side and at the boundary between the high impurity concentration and a low impurity concentration drift layer, thus achieving both low cost and a high performance. A method for manufacturing a semiconductor device is also provided which can form a high impurity concentration buffer layer and a high impurity concentration layer at the outermost portion of the reverse side without any significant trouble, even after the formation of an active region and an electrode thereof at the right side, to thereby achieve both low cost and high performance.

摘要翻译： 提供了一种半导体器件，其可以通过在晶片工艺中使用便宜的FZ晶片来制造，并且在反面的最外部分的高杂质浓度层和在反面的最外部处以及在相反侧的边界处仍然具有高杂质浓度的尖锐倾斜 高杂质浓度和低杂质浓度漂移层，从而实现低成本和高性能。 还提供了一种用于制造半导体器件的方法，即使在形成有源区和其电极之后，也可以在反面的最外部形成高杂质浓度缓冲层和高杂质浓度层，而没有任何明显的麻烦 在右侧，从而实现低成本和高性能。

公开(公告)号：US5926012A

公开(公告)日：1999-07-20

申请号：US931280

申请日：1997-09-16

申请人： Satoki Takizawa ,  Manabu Takei

发明人： Satoki Takizawa ,  Manabu Takei

IPC分类号： H02M1/08 ,  H02M1/00 ,  H03K17/082 ,  G05F1/40

CPC分类号： H03K17/168 ,  H03K17/0828 ,  H03K17/166

摘要： A gate drive circuit in a power converter includes a voltage-driven switching device, and a gate drive circuit connected to the voltage-driven switching device for driving the same. The gate drive circuit includes a detection device for detecting a physical quantity in the switching device, and an operation device for changing a gate drive condition of the switching device. When an output of the detection means becomes a value outside a specified value at a turn-on or turn-off operation of the switching device, the operation device changes the gate drive condition instantaneously or for a predetermined time to reduce a voltage applied to the switching device.

摘要翻译： 功率转换器中的栅极驱动电路包括电压驱动开关器件和连接到用于驱动其的电压驱动开关器件的栅极驱动电路。 栅极驱动电路包括用于检测开关装置中的物理量的检测装置和用于改变开关装置的栅极驱动条件的操作装置。 当检测装置的输出在开关装置的接通或断开操作时变为超出规定值的值时，操作装置瞬时或预定时间改变栅极驱动条件以减小施加到开关装置的电压 开关装置。

公开(公告)号：US09312330B2

公开(公告)日：2016-04-12

申请号：US13319756

申请日：2010-07-13

申请人： Manabu Takei

发明人： Manabu Takei

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7802

摘要： Provision of a super-junction semiconductor device capable of reducing rises in transient on-resistance at the time of repeated switching operation. A super-junction structure is provided that has a striped parallel surface pattern, where a super-junction stripe and a MOS cell 6 stripe are parallel, and a p column Y2 over which no MOS cell 6 stripe is arranged and a p column Y1 over which the MOS cell 6 stripe is arranged are connected at an end.

摘要翻译： 提供能够在重复切换操作时减少瞬时导通电阻的上升的超结半导体器件。 提供了具有条形平行表面图案的超结结构，其中超结条带和MOS单元6条纹是平行的，以及没有安置MOS单元6条纹的ap列Y2和在其上排列的p1列Y1 MOS单元6条纹布置在一端。

公开(公告)号：US08759870B2

公开(公告)日：2014-06-24

申请号：US12824541

申请日：2010-06-28

申请人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

发明人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

IPC分类号： H01L29/739 ,  H01L29/06

CPC分类号： H01L29/0661 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/66333 ,  H01L29/7395

摘要： On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

摘要翻译： 在薄的半导体晶片的顶表面上形成形成半导体芯片的顶表面结构。 晶片的上表面用双面胶带固定在支撑基板上。 然后，从薄的半导体晶片的底面开始，通过湿式各向异性蚀刻形成成为刻划线的沟槽，使得沟槽的侧壁露出。 在暴露了晶面的沟槽的侧壁上，通过离子注入与底面扩散层的集电极区域同时形成具有不同于用于保持反向击穿电压的半导体晶片的导电类型的隔离层， 然后用激光照射退火。 侧壁形成大致V形或梯形形状的横截面，侧壁相对于支撑基底的角度为30-70°。 然后从上表面去除双面胶带以制造半导体芯片。 通过这样的制造方法，可以形成具有高可靠性的反向阻挡半导体器件。

公开(公告)号：US08564577B2

公开(公告)日：2013-10-22

申请号：US12748834

申请日：2010-03-29

申请人： Manabu Takei

发明人： Manabu Takei

IPC分类号： G06F3/038 ,  G09G5/00 ,  G09G3/36 ,  G06F3/041

CPC分类号： G06F3/0416 ,  G06F3/0412 ,  G06F3/045

摘要： Disclosed is a display apparatus including a plurality of display pixels formed of a plurality of first electrodes provided in one surface side of a substrate, a second electrode which faces each of the first electrodes and display functional layers which are provided between each of the first electrodes and the second electrode and a resistive film having a predetermined resistivity in which one surface side is provided so as to face the other surface side of the second electrode having a predetermined space above the upper surface of a partition wall layer to define a forming region for each of the display pixels and which is disposed so as to be conductive to the other surface side of the second electrode by a pressure applied from outside, and the second electrode constructing the display pixels is double used as an electrode for detecting a position where the pressure is applied.

摘要翻译： 公开了一种显示装置，包括由设置在基板的一个表面侧中的多个第一电极形成的多个显示像素，面对设置在每个第一电极之间的每个第一电极和显示功能层的第二电极 以及第二电极和具有预定电阻率的电阻膜，其中一个表面侧设置成面对具有在分隔壁层的上表面上方的预定空间的第二电极的另一表面侧，以限定形成区域 每个显示像素被布置成通过从外部施加的压力而导电到第二电极的另一表面侧，并且构成显示像素的第二电极被双重用作用于检测位置的电极 施加压力。

公开(公告)号：US20120086076A1

公开(公告)日：2012-04-12

申请号：US13319756

申请日：2010-07-13

申请人： Manabu Takei

发明人： Manabu Takei

IPC分类号： H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7802

摘要： Provision of a super-junction semiconductor device capable of reducing rises in transient on-resistance at the time of repeated switching operation. A super-junction structure is provided that has a striped parallel surface pattern, where a super-junction stripe and a MOS cell 6 stripe are parallel, and a p column Y2 over which no MOS cell 6 stripe is arranged and a p column Y1 over which the MOS cell 6 stripe is arranged are connected at an end.

摘要翻译： 提供能够在重复切换操作时减少瞬时导通电阻的上升的超结半导体器件。 提供了具有条形平行表面图案的超结结构，其中超结条带和MOS单元6条纹是平行的，以及没有安置MOS单元6条纹的ap列Y2和在其上排列的p1列Y1 MOS单元6条纹布置在一端。

公开(公告)号：US08119496B2

公开(公告)日：2012-02-21

申请号：US12785932

申请日：2010-05-24

申请人： Kazuo Shimoyama ,  Manabu Takei ,  Haruo Nakazawa

发明人： Kazuo Shimoyama ,  Manabu Takei ,  Haruo Nakazawa

IPC分类号： H01L21/76

CPC分类号： H01L29/7393 ,  H01L21/30608 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2221/68327 ,  H01L2221/68381

摘要： A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer. Thereafter, the double-sided adhesive tape is removed from the collector electrode to produce semiconductor chips. A highly reliable reverse-blocking semiconductor device can thus be formed at a low cost.

摘要翻译： 形成半导体芯片的上表面结构和底面结构的薄半导体晶片通过双面胶带固定在支撑基板上。 然后，在薄半导体晶片上，通过湿式各向异性蚀刻形成成为划刻线的沟槽，其中晶体面被暴露以形成沟槽的侧壁。 在具有如此露出的晶面的沟槽的侧壁上，通过离子注入和低温退火或激光退火形成用于保持反向击穿电压的隔离层，以便在与...接触的同时延伸到顶表面侧 ap集电极区域作为底面扩散层。 然后，进行激光切割，与集电体区域一起形成在集电极区域上的集电极整齐地切割，而不会在隔离层下方产生任何过量的部分和不足的部分。 此后，从集电极去除双面胶带以制造半导体芯片。 因此可以以低成本形成高度可靠的反向阻挡半导体器件。