公开(公告)号：US20110075481A1

公开(公告)日：2011-03-31

申请号：US12694677

申请日：2010-01-27

申请人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Tomoko Fujiwara ,  Megumi Ishiduki ,  Yosuke Komori ,  Yoshimasa Mikajiri ,  Shigeto Oota ,  Ryouhei Kirisawa ,  Hideaki Aochi

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Tomoko Fujiwara ,  Megumi Ishiduki ,  Yosuke Komori ,  Yoshimasa Mikajiri ,  Shigeto Oota ,  Ryouhei Kirisawa ,  Hideaki Aochi

IPC分类号： G11C16/04 ,  G11C11/34

CPC分类号： G11C11/34 ,  G11C5/02 ,  G11C16/26

摘要： A nonvolatile semiconductor memory device comprises: a bit line; a source line; a memory string having a plurality of electrically data-rewritable memory transistors connected in series; a first select transistor provided between one end of the memory string and the bit line; a second select transistor provided between the other end of the memory string and the source line; and a control circuit configured to control a read operation. A plurality of the memory strings connected to one bit line via a plurality of the first select transistors. During reading of data from a selected one of the memory strings, the control circuit renders conductive the first select transistor connected to an unselected one of the memory strings and renders non-conductive the second select transistor connected to unselected one of the memory strings.

摘要翻译： 非易失性半导体存储器件包括：位线; 源线; 具有串联连接的多个电数据可重写存储晶体管的存储器串; 设置在存储器串的一端和位线之间的第一选择晶体管; 设置在存储器串的另一端与源极线之间的第二选择晶体管; 以及控制电路，被配置为控制读取操作。 经由多个第一选择晶体管连接到一个位线的多个存储器串。 在从选择的一个存储器串读取数据期间，控制电路使连接到未选择的一个存储器串的第一选择晶体管导通，并且使第二选择晶体管连接到未选择的一个存储器串。

公开(公告)号：US20110049608A1

公开(公告)日：2011-03-03

申请号：US12723981

申请日：2010-03-15

申请人： Masaru KIDOH ,  Ryota Katsumata ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

发明人： Masaru KIDOH ,  Ryota Katsumata ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L29/66833 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/792 ,  H01L29/7926

摘要： A memory string comprises: a first semiconductor layer including a columnar portion extending in a stacking direction on a substrate; a first charge storage layer surrounding the columnar portion; and a plurality of first conductive layers stacked on the substrate so as to surround the first charge storage layer. A select transistor comprises: a second semiconductor layer in contact with an upper surface of the columnar portion and extending in the stacking direction; a second charge storage layer surrounding the second semiconductor layer; and a second conductive layer deposited above the first conductive layer to surround the second charge storage layer. The second charge storage layer is formed from a layer downward of the second conductive layer to an upper end vicinity of the second conductive layer, and is not formed in a layer upward of the upper end vicinity.

摘要翻译： 存储器串包括：第一半导体层，包括在基板上沿堆叠方向延伸的柱状部分; 围绕所述柱状部分的第一电荷存储层; 以及堆叠在所述基板上以围绕所述第一电荷存储层的多个第一导电层。 选择晶体管包括：与柱状部分的上表面接触并沿堆叠方向延伸的第二半导体层; 围绕所述第二半导体层的第二电荷存储层; 以及沉积在所述第一导电层上方以围绕所述第二电荷存储层的第二导电层。 第二电荷存储层由第二导电层向下的层向第二导电层的上端附近形成，并且不形成在上端附近的上方。

公开(公告)号：US20110013454A1

公开(公告)日：2011-01-20

申请号：US12726858

申请日：2010-03-18

申请人： Tomoo Hishida ,  Yoshihisa Iwata ,  Megumi Ishiduki ,  Ryota Katsumata ,  Yoshiaki Fukuzumi ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Junya Matsunami ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhel Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

发明人： Tomoo Hishida ,  Yoshihisa Iwata ,  Megumi Ishiduki ,  Ryota Katsumata ,  Yoshiaki Fukuzumi ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Junya Matsunami ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhel Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC分类号： G11C16/04 ,  G11C11/34

CPC分类号： G11C5/025 ,  G11C5/02 ,  G11C5/04 ,  G11C16/0483 ,  H01L27/11573 ,  H01L27/11578 ,  H01L27/11582

摘要： A nonvolatile semiconductor memory device comprises: a plurality of first memory strings; a first select transistor having one end thereof connected to one end of the first memory strings; a first line commonly connected to the other end of a plurality of the first select transistors; a switch circuit having one end thereof connected to the first line; and a second line commonly connected to the other end of a plurality of the switch circuits. The switch circuit controls electrical connection between the second line and the first line.

摘要翻译： 非易失性半导体存储器件包括：多个第一存储器串; 第一选择晶体管，其一端连接到第一存储器串的一端; 通常连接到多个第一选择晶体管的另一端的第一线; 开关电路，其一端连接到第一线; 以及通常连接到多个开关电路的另一端的第二线。 开关电路控制第二线和第一线之间的电连接。

公开(公告)号：US07847334B2

公开(公告)日：2010-12-07

申请号：US12403919

申请日：2009-03-13

申请人： Ryota Katsumata ,  Masaru Kito ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Yoshiaki Fukuzumi ,  Hideaki Aochi ,  Yasuyuki Matsuoka

发明人： Ryota Katsumata ,  Masaru Kito ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Yoshiaki Fukuzumi ,  Hideaki Aochi ,  Yasuyuki Matsuoka

IPC分类号： H01L29/788

CPC分类号： H01L21/764 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11578

摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprises: a first columnar semiconductor layer extending in a vertical direction to a substrate; a charge accumulation layer formed around the first columnar semiconductor layer via a first insulation layer; and a first conductive layer formed around the charge accumulation layer via a second insulation layer. Each of the first conductive layers is formed to expand in a two-dimensional manner, and air gaps are formed between the first conductive layers located there above and there below.

摘要翻译： 非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。 每个存储器串包括：沿垂直方向延伸到衬底的第一柱状半导体层; 电荷累积层，经由第一绝缘层形成在第一柱状半导体层周围; 以及经由第二绝缘层形成在电荷累积层周围的第一导电层。 每个第一导电层被形成为以二维方式膨胀，并且在位于其上方和下方的第一导电层之间形成气隙。

公开(公告)号：US07821058B2

公开(公告)日：2010-10-26

申请号：US11970992

申请日：2008-01-08

申请人： Masaru Kidoh ,  Ryota Katsumata ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Hideaki Aochi ,  Hiroyasu Tanaka ,  Yasuyuki Matsuoka ,  Yoshio Ozawa ,  Mitsuru Sato

发明人： Masaru Kidoh ,  Ryota Katsumata ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Hideaki Aochi ,  Hiroyasu Tanaka ,  Yasuyuki Matsuoka ,  Yoshio Ozawa ,  Mitsuru Sato

IPC分类号： H01L27/115 ,  H01L21/8247 ,  H01L29/792

CPC分类号： H01L29/792 ,  G11C16/0483 ,  H01L27/0688 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory including: a columnar semiconductor; a charge storage insulating film including: a first insulating film formed around the columnar semiconductor, a charge storage film formed around the first insulating film, and a second insulating film formed around the charge storage film; an electrode extending two-dimensionally to surround the charge storage insulating film, the electrode having a groove; and a metal silicide formed on a sidewall of the groove.

摘要翻译： 根据本发明的一个方面，提供了一种非易失性半导体存储器，包括：柱状半导体; 电荷存储绝缘膜，包括：围绕所述柱状半导体形成的第一绝缘膜，围绕所述第一绝缘膜形成的电荷存储膜，以及形成在所述电荷存储膜周围的第二绝缘膜; 电极，其二维地延伸以包围电荷存储绝缘膜，所述电极具有凹槽; 以及形成在所述槽的侧壁上的金属硅化物。

公开(公告)号：US20100207195A1

公开(公告)日：2010-08-19

申请号：US12679991

申请日：2008-12-09

申请人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L27/1052 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L29/513

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers functions as gate electrodes of the memory cells.

摘要翻译： 非挥发性半导体存储装置具有多个存储串，其中多个电可重写存储单元串联连接。 每个存储串包括第一半导体层，每个第一半导体层具有相对于衬底在垂直方向上延伸的一对柱状部分和形成为耦合该对柱状部分的下端的耦合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分和电荷存储层的侧表面的第一导电层。 第一导电层用作存储器单元的栅电极。

公开(公告)号：US20100109072A1

公开(公告)日：2010-05-06

申请号：US12563832

申请日：2009-09-21

申请人： Masaru KIDOH ,  Hiroyasu Tanaka ,  Ryota Katsumata ,  Masaru Kito ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi ,  Yoshiaki Fukuzumi

发明人： Masaru KIDOH ,  Hiroyasu Tanaka ,  Ryota Katsumata ,  Masaru Kito ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi ,  Yoshiaki Fukuzumi

IPC分类号： H01L27/115 ,  H01L21/8246

CPC分类号： H01L27/11578 ,  H01L21/76816 ,  H01L27/0688 ,  H01L27/112 ,  H01L27/11582

摘要： A nonvolatile semiconductor memory device includes a first stacked body on a silicon substrate, and a second stacked body is provided thereon. The first stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films, and a first portion of a through-hole extending in a stacking direction is formed. The second stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films, and a second portion of the through-hole is formed. A memory film is formed on an inner face of the through-hole, and a silicon pillar is buried in an interior of the through-hole. A central axis of the second portion of the through-hole is shifted from a central axis of the first portion, and a lower end of the second portion is positioned lower than an upper portion of the first portion.

摘要翻译： 非易失性半导体存储器件包括在硅衬底上的第一层叠体，并且在其上设置第二层叠体。 第一堆叠体包括交替层叠有多个电极膜的多个绝缘膜，并且形成沿堆叠方向延伸的通孔的第一部分。 第二堆叠体包括交替层叠有多个电极膜的多个绝缘膜，并且形成通孔的第二部分。 在通孔的内表面上形成记忆膜，并且将硅柱埋在通孔的内部。 通孔的第二部分的中心轴线从第一部分的中心轴线偏移，并且第二部分的下端位于比第一部分的上部更低的位置。

公开(公告)号：US20100096682A1

公开(公告)日：2010-04-22

申请号：US12556242

申请日：2009-09-09

申请人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Yosuke Komori ,  Megumi Ishiduki ,  Akihiro Nitayama ,  Hideaki Aochi ,  Hitoshi Ito ,  Yasuyuki Matsuoka

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Yosuke Komori ,  Megumi Ishiduki ,  Akihiro Nitayama ,  Hideaki Aochi ,  Hitoshi Ito ,  Yasuyuki Matsuoka

IPC分类号： H01L29/78 ,  H01L21/768

CPC分类号： H01L27/11578 ,  H01L27/11565 ,  H01L27/11582

摘要： A non-volatile semiconductor storage device has a memory string including a plurality of electrically rewritable memory cells connected in series. The non-volatile semiconductor storage device also has a protruding layer formed to protrude upward with respect to a substrate. The memory string includes: a plurality of first conductive layers laminated on the substrate; a first semiconductor layer formed to penetrate the plurality of first conductive layers; and an electric charge storage layer formed between the first conductive layers and the first semiconductor layer, and configured to be able to store electric charges. Each of the plurality of first conductive layers includes: a bottom portion extending in parallel to the substrate; and a side portion extending upward with respect to the substrate along the protruding layer at the bottom portion. The protruding layer has a width in a first direction parallel to the substrate that is less than or equal to its length in a lamination direction.

摘要翻译： 非易失性半导体存储装置具有串联连接的多个电可重写存储单元的存储串。 非挥发性半导体存储装置还具有形成为相对于基板向上突出的突出层。 存储器串包括：层叠在基板上的多个第一导电层; 形成为穿透所述多个第一导电层的第一半导体层; 以及形成在第一导电层和第一半导体层之间的电荷存储层，并且能够存储电荷。 多个第一导电层中的每一个包括：平行于基板延伸的底部; 以及沿底部的突出层相对于基板向上延伸的侧部。 该突出层在平行于基板的第一方向上的宽度小于或等于其在层叠方向上的长度。

公开(公告)号：US20100039865A1

公开(公告)日：2010-02-18

申请号：US12521997

申请日：2008-01-31

申请人： Masaru Kidoh ,  Hiroyasu Tanaka ,  Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Mitsuru Sato

发明人： Masaru Kidoh ,  Hiroyasu Tanaka ,  Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Mitsuru Sato

IPC分类号： G11C16/06 ,  H01L29/792 ,  H01L21/4763

CPC分类号： H01L27/11578 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11575 ,  H01L27/11582

摘要： A non-volatile semiconductor memory device according to the present invention includes a substrate; a first word-line provided above the substrate surface, the first word-line having a plate shape in an area where a memory cell is formed; a second word-line provided above the first word-line surface, the second word-line having a plate shape; a plurality of metal wirings connecting the first and second word-lines with a driver circuit; and a plurality of contacts connecting the first and second word-lines with the metal wirings. The contact of the first word-line is formed in a first word-line contact area. The contact of the second word-line is formed in a second word-line contact area. The first word-line contact area is provided on a surface of the first word-line that is drawn to the second word-line contact area.

摘要翻译： 根据本发明的非易失性半导体存储器件包括：衬底; 设置在所述衬底表面上方的第一字线，所述第一字线在形成存储器单元的区域中具有板形; 设置在所述第一字线表面上方的第二字线，所述第二字线具有板形; 将第一和第二字线与驱动电路连接的多个金属布线; 以及将第一和第二字线与金属布线连接的多个触点。 第一字线的接触形成在第一字线接触区域中。 第二字线的接触形成在第二字线接触区域中。 第一字线接触区域被提供在第一字线的被拉到第二字线接触区域的表面上。

公开(公告)号：US20090230458A1

公开(公告)日：2009-09-17

申请号：US12392636

申请日：2009-02-25

申请人： Megumi ISHIDUKI ,  Hideaki Aochi ,  Ryota Katsumata ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Yosuke Komori ,  Yasuyuki Matsuoka

发明人： Megumi ISHIDUKI ,  Hideaki Aochi ,  Ryota Katsumata ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Yosuke Komori ,  Yasuyuki Matsuoka

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/7881 ,  H01L29/7926

摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a columnar semiconductor layer extending in a direction perpendicular to a substrate; a plurality of conductive layers formed at a sidewall of the columnar semiconductor layer via memory layers; and interlayer insulation layers formed above of below the conductive layers. A sidewall of the conductive layers facing the columnar semiconductor layer is formed to be inclined such that the distance thereof from a central axis of the columnar semiconductor layer becomes larger at lower position thereof than at upper position thereof. While, a sidewall of the interlayer insulation layers facing the columnar semiconductor layer is formed to be inclined such that the distance thereof from a central axis of the columnar semiconductor layer becomes smaller at lower position thereof than at upper position thereof.

摘要翻译： 非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。 每个存储器串包括：在垂直于衬底的方向上延伸的柱状半导体层; 多个导电层，经由存储层形成在所述柱状半导体层的侧壁处; 以及形成在导电层下方的层间绝缘层。 形成面向柱状半导体层的导电层的侧壁，使得其与柱状半导体层的中心轴的距离在其下部位置比在其上部位置变大。 同时，面对柱状半导体层的层间绝缘层的侧壁形成为倾斜，使得其在柱状半导体层的中心轴线处的距离在其下部位置处比在其上部位置变小。