Method and apparatus for collaborative coexistence between Bluetooth and IEEE 802.11 G with both technologies integrated onto a system-on-a-chip (SOC) device
    61.
    发明申请
    Method and apparatus for collaborative coexistence between Bluetooth and IEEE 802.11 G with both technologies integrated onto a system-on-a-chip (SOC) device 审中-公开
    蓝牙和IEEE 802.11 G之间协同共存的方法和装置,将两种技术集成到片上系统(SOC)设备上

    公开(公告)号:US20060274704A1

    公开(公告)日:2006-12-07

    申请号:US11387309

    申请日:2006-03-23

    IPC分类号: H04Q7/24

    摘要: Certain embodiments of the invention may be found in a method and system for collaborative coexistence between Bluetooth and IEEE 802.11 g with both technologies integrated onto an SOC device. In a single integrated circuit (IC) that handles Bluetooth and WLAN technologies, a WLAN priority level may be selected for WLAN transmissions and a Bluetooth priority level may be selected for Bluetooth transmissions. The WLAN and Bluetooth priority levels may be selected from a plurality of priority levels. A packet transfer scheduler (PTS) may schedule the transmission of WLAN and Bluetooth signals in accordance with the selected priority levels. In some instances, the PTS may promote or demote the priority levels for WLAN and/or Bluetooth transmissions based on traffic needs.

    摘要翻译: 本发明的某些实施例可以在用于协同共存的方法和系统中找到,所述方法和系统具有集成到SOC设备上的两种技术的蓝牙和IEEE 802.11g之间的协同共存。 在处理蓝牙和WLAN技术的单个集成电路(IC)中,可以为WLAN传输选择WLAN优先级,并且可以为蓝牙传输选择蓝牙优先级。 可以从多个优先级中选择WLAN和蓝牙优先级。 分组传送调度器(PTS)可以根据所选择的优先级来调度WLAN和蓝牙信号的传输。 在某些情况下,PTS可以基于业务需求来提升或降低WLAN和/或蓝牙传输的优先级。

    Method and system for a radio data system (RDS) demodulator for a single chip integrated bluetooth and frequency modulation (FM) transceiver and baseband processor
    62.
    发明申请
    Method and system for a radio data system (RDS) demodulator for a single chip integrated bluetooth and frequency modulation (FM) transceiver and baseband processor 有权
    用于单芯片集成蓝牙和调频(FM)收发器和基带处理器的无线电数据系统(RDS)解调器的方法和系统

    公开(公告)号:US20060270449A1

    公开(公告)日:2006-11-30

    申请号:US11287075

    申请日:2005-11-22

    申请人: Hea Kim Brima Ibrahim

    发明人: Hea Kim Brima Ibrahim

    IPC分类号: H04M1/00

    摘要: Aspects of a method and system for a radio data service (RDS) demodulator for a single chip integrated Bluetooth and frequency modulation (FM) transceiver and baseband processor are presented. Aspects of the system may include circuitry on a single chip that enables demodulation of an RDS signal, filtering of the RDS signal, and detection of binary bits in the filtered RDS signal. The filtered RDS signal may be generated by filtering the RDS signal based on a raised cosine filter, or a doublet filter. In general, the RDS signal may also be filtered by a filter that is a first, or greater derivative of a Gaussian filter in either the time or frequency domain. Aspects of the method may include demodulating the RDS signal, filtering the RDS signal, and detecting binary bits in the filtered RDS signal.

    摘要翻译: 提出了用于单芯片集成蓝牙和频率调制(FM)收发器和基带处理器的无线电数据服务(RDS)解调器的方法和系统的方面。 该系统的方面可以包括能够解调RDS信号,对RDS信号进行滤波以及检测经滤波的RDS信号中的二进制位的单个芯片上的电路。 可以通过基于升余弦滤波器或双滤波器对RDS信号进行滤波来生成经滤波的RDS信号。 通常,RDS信号也可以由滤波器滤波,滤波器是时域或频域中的高斯滤波器的第一或更大的导数。 该方法的方面可以包括解调RDS信号,滤波RDS信号,以及检测经滤波的RDS信号中的二进制位。

    Method and system for FM interference detection and mitigation
    63.
    发明申请
    Method and system for FM interference detection and mitigation 有权
    FM干扰检测和减轻的方法和系统

    公开(公告)号:US20060269021A1

    公开(公告)日:2006-11-30

    申请号:US11286950

    申请日:2005-11-22

    IPC分类号: H03D1/04

    CPC分类号: H04B1/1027 Y02D70/14

    摘要: Methods and systems for processing signals are provided and may include removing a DC component from a signal envelope comprising a combined signal within a range of allocated FM channels to generate a modified signal envelope. Fluctuation in power in the signal envelope may be detected based on a ratio of a magnitude of the signal envelope and a magnitude of the modified signal envelope. The removing may further include low-pass filtering the signal envelope to generate a low-pass filtered signal envelope. A square values of the low-pass filtered signal envelope may be determined to generate a squared signal envelope. The squared signal envelope may be high-pass filtered to generate a high-pass filtered signal envelope. The fluctuation in power in the signal envelope may be detected based on a ratio of a magnitude of the high-pass filtered signal envelope and a magnitude of the low-pass filtered signal envelope.

    摘要翻译: 提供用于处理信号的方法和系统,并且可以包括从包括分配的FM信道的范围内的组合信号的信号包络去除DC分量以产生修改的信号包络。 可以基于信号包络的大小与修改的信号包络的大小的比值来检测信号包络中的功率波动。 去除可以进一步包括对信号包络进行低通滤波以产生低通滤波信号包络。 可以确定低通滤波信号包络的平方值以产生平方信号包络。 平方信号包络可以被高通滤波以产生高通滤波信号包络。 可以基于高通滤波信号包络的幅度与低通滤波信号包络的幅度的比值来检测信号包络中功率的波动。

    Method and system for determining a signal quality metric in event of a CRC false positive
    64.
    发明申请
    Method and system for determining a signal quality metric in event of a CRC false positive 有权
    在CRC假阳性的情况下确定信号质量度量的方法和系统

    公开(公告)号:US20060133291A1

    公开(公告)日:2006-06-22

    申请号:US11093388

    申请日:2005-03-30

    IPC分类号: C12P21/06

    CPC分类号: H04L1/0061 H04L1/206

    摘要: Certain aspects of determining a signal quality metric in event of a CRC false positive may comprise measuring an amplitude and/or phase of at least a portion of a phase shift keyed section of a frame. The measured amplitude and/or phase may be checked to determine if it lies within a range of a reference amplitude and/or phase respectively. An amplitude and/or phase counter may be incremented if the measured amplitude and/or phase lies outside the range of the reference amplitude and/or phase respectively. A confidence level value of a cyclic redundancy check (CRC) for at least a portion of the phase shift keyed section of the frame may be determined based on a determined value of the incremented amplitude and/or phase counter.

    摘要翻译: 在CRC假阳性的情况下确定信号质量度量的某些方面可以包括测量帧的相移键控部分的至少一部分的幅度和/或相位。 可以检查测量的幅度和/或相位以确定其是否位于参考幅度和/或相位的范围内。 如果测量的幅度和/或相位分别在参考幅度和/或相位的范围之外,幅度和/或相位计数器可以增加。 可以基于增加的幅度和/或相位计数器的确定值来确定帧的相移键控部分的至少一部分的循环冗余校验(CRC)的置信水平值。

    Collaborative coexistence with dynamic prioritization of wireless devices
    67.
    发明申请
    Collaborative coexistence with dynamic prioritization of wireless devices 审中-公开
    与无线设备的动态优先级协同共存

    公开(公告)号:US20050215284A1

    公开(公告)日:2005-09-29

    申请号:US10810998

    申请日:2004-03-26

    申请人: Ling Su Brima Ibrahim

    发明人: Ling Su Brima Ibrahim

    摘要: A collaboration scheme for wireless communications devices implemented on a single CMOS integrated circuit is described. By providing a dynamically updateable, multiple-priority protocol, more differentiation between traffic types is provided and response time (latency) is reduced by adjusting the priority allocations between the devices when an application on one device requires greater throughput.

    摘要翻译: 描述了在单个CMOS集成电路上实现的无线通信设备的协作方案。 通过提供动态可更新的多优先级协议,当一个设备上的应用程序需要更大的吞吐量时,通过调整设备之间的优先级分配,提供流量类型之间的更多区别,并减少响应时间(延迟)。

    Digital demodulation
    68.
    发明申请
    Digital demodulation 失效
    数字解调

    公开(公告)号:US20050207515A1

    公开(公告)日:2005-09-22

    申请号:US11120561

    申请日:2005-05-03

    IPC分类号: H04L27/152 H04L27/14

    CPC分类号: H04L27/1525

    摘要: A digital demodulator includes a mixing section, 1st and 2nd digital comb filters, phase locked loop module, and a data recovery module. The mixing section is operably coupled to produce a digital I signal and a digital Q signal from a digital intermediate frequency signal. The 1st comb filter filters the digital I signal while the 2nd comb filter filters the digital Q signal. The phase locked loop module produces a digital signal from the filtered I and filtered Q signals. The data recovery module interprets the digital signal to recapture a data stream.

    摘要翻译: 数字解调器包括混合部分,第一和第二数字梳状滤波器,锁相环模块和数据恢复模块。 混合部分可操作地耦合以从数字中频信号产生数字I信号和数字Q信号。 第1<梳状滤波器滤波数字I信号,而第2&梳状滤波器滤波数字Q信号。 锁相环模块从滤波I和滤波Q信号产生数字信号。 数据恢复模块解释数字信号以重新获取数据流。

    Method and system for using PSK sync word for fine tuning frequency adjustment
    69.
    发明申请
    Method and system for using PSK sync word for fine tuning frequency adjustment 有权
    使用PSK同步字进行微调频率调整的方法和系统

    公开(公告)号:US20050197064A1

    公开(公告)日:2005-09-08

    申请号:US11101961

    申请日:2005-04-08

    摘要: In RF transceivers, a method and system for using phase shift key (PSK) sync word for fine tuning frequency adjustment are provided. One aspect of the invention provides for adjusting a local oscillator frequency in a radio frequency (RF) receiver when a residual DC offset remains after a coarse frequency offset adjustment if performed. The fine adjustment may be necessary because of the synchronization required with a PSK-based modulated portion of a Bluetooth packet. A residual phase shift detected in a sync sequence portion of the Bluetooth packet may be utilized to determine a residual or fine frequency adjustment. This approach may allow an RF receiver to operate, in some instances, without the need for an equalizer. In this regard, the power consumed by the RF receiver may be minimized and/or the overall cost of the RF receiver may be reduced.

    摘要翻译: 在RF收发器中,提供了一种使用相移键(PSK)同步字进行微调频率调整的方法和系统。 本发明的一个方面提供了当在执行粗频率偏移调整之后剩余DC偏移保留时,调整射频(RF)接收机中的本地振荡器频率。 由于蓝牙分组的基于PSK的调制部分所需的同步,因此可能需要进行微调。 在蓝牙分组的同步序列部分中检测到的残余相移可用于确定残差或精细频率调整。 这种方法可以允许RF接收机在某些情况下操作,而不需要均衡器。 在这方面,RF接收机消耗的功率可以被最小化,和/或可以降低RF接收机的总体成本。

    Method and system for packet synchronization
    70.
    发明授权
    Method and system for packet synchronization 有权
    数据包同步的方法和系统

    公开(公告)号:US09071417B2

    公开(公告)日:2015-06-30

    申请号:US11101990

    申请日:2005-04-08

    IPC分类号: H04L7/00 H04L7/08

    CPC分类号: H04L7/08

    摘要: A method and system for packet synchronization may comprise receiving a plurality of bits from an incoming sample of data. The received plurality of bits may be sliced at a first sampling rate. A logic level of at least one of the received plurality of bits may be determined based on the slicing of the received plurality of bits. The received plurality of bits may be synchronized with a channel access code based on determining the logic level of at least one of the received plurality of bits. The channel access code may be sampled at a higher frequency, to increase the probability of detecting whether the incoming bit is LOGIC 1 or LOGIC 0.

    摘要翻译: 用于分组同步的方法和系统可以包括从输入的数据样本接收多个比特。 所接收的多个比特可以以第一采样率进行切片。 可以基于所接收的多个比特的限幅来确定所接收的多个比特中的至少一个的逻辑电平。 基于确定所接收的多个比特中的至少一个的逻辑电平,所接收的多个比特可以与信道接入码同步。 可以以更高的频率对信道接入码进行采样,以增加检测进入位是逻辑1还是逻辑0的概率。