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70 条记录 (耗时 0.034 秒)

    SHIFT REGISTER AND DRIVING METHOD THEREOF, LIGHT-EMITTING CONTROL DRIVING CIRCUIT, AND DISPLAY APPARATUS
    61.
    发明申请
    SHIFT REGISTER AND DRIVING METHOD THEREOF, LIGHT-EMITTING CONTROL DRIVING CIRCUIT, AND DISPLAY APPARATUS 有权

    公开(公告)号：US20220319424A1

    公开(公告)日：2022-10-06

    申请号：US17435006

    申请日：2020-09-28

    申请人： BOE TECHNOLOGY GROUP CO., LTD.

    发明人： Li WANG ,  Guangliang SHANG

    IPC分类号： G09G3/3233 ,  G11C19/28

    摘要： A shift register includes: an input circuit transmitting a first signal to a first node in response to a first clock signal and a second signal, transmitting the second signal to the first node in response to the first clock signal and the first signal; a first control circuit transmitting the first clock signal to a second node in response to the first node, transmitting a first voltage to the second node in response to the first clock signal; a second control circuit transmitting a second voltage to a third node in response to the first node, transmitting a second clock signal to the third node in response to the second node and the second clock signal; an output circuit transmitting the first voltage to a signal output terminal in response to the first node, transmitting the second voltage to the signal output terminal in response to the third node.

    SHIFT REGISTER AND DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT AND DISPLAY DEVICE
    62.
    发明申请
    SHIFT REGISTER AND DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT AND DISPLAY DEVICE 有权

    公开(公告)号：US20210020090A1

    公开(公告)日：2021-01-21

    申请号：US16651816

    申请日：2019-03-25

    申请人： BOE Technology Group Co., Ltd.

    发明人： Guangliang SHANG ,  Libin LIU ,  Can ZHENG ,  Yipeng CHEN ,  Xinshe YIN ,  Shiming SHI

    IPC分类号： G09G3/20 ,  G11C19/28

    摘要： Provided are a shift register and a driving method thereof, a gate driving circuit, and a display device. The shift register includes: an input circuit, configured to be coupled to an input signal end and a second clock signal end, respectively; a first transistor, where the first electrode of the first transistor is coupled to the output end of the input circuit, and the first transistor is a double-gate type transistor; the first gate of the first transistor is configured to be coupled to a first reference signal end, and the second gate of the first transistor is configured to be coupled to a first threshold control signal end; and an output circuit, configured to be coupled to a first clock signal end and a signal output end, respectively, where the control end of the output circuit is coupled to the second electrode of the first transistor.

    PIXEL CIRCUIT, ARRAY SUBSTRATE, DISPLAY PANEL AND ELECTRONIC APPARATUS
    63.
    发明申请
    PIXEL CIRCUIT, ARRAY SUBSTRATE, DISPLAY PANEL AND ELECTRONIC APPARATUS 审中-公开

    公开(公告)号：US20200020295A1

    公开(公告)日：2020-01-16

    申请号：US16450226

    申请日：2019-06-24

    申请人： BOE TECHNOLOGY GROUP CO., LTD.

    发明人： Seungwoo HAN ,  Guangliang SHANG

    IPC分类号： G09G3/36 ,  G02F1/1362 ,  G02F1/1368

    摘要： A pixel circuit, an array substrate, a display panel and an electronic apparatus are provided. The pixel circuit includes: a data writing sub-circuit, a first data storage sub-circuit, a second data storage sub-circuit and a light-emitting control sub-circuit. The data writing sub-circuit writes, under the control of a signal input from a first control signal input end, to the first data storage sub-circuit a data signal input from a data signal input end, and writes, under the control of a signal input from a second control signal input end, to the second data storage sub-circuit the data signal input from the data signal input end. The light-emitting control sub-circuit controls on/off states of corresponding thin film transistors in accordance with data signals output from the first data storage sub-circuit and the second data storage sub-circuit, so that different gray-scales may be rendered.

    CIRCUIT AND METHOD FOR TESTING TRANSISTOR(S)
    70.
    发明申请
    CIRCUIT AND METHOD FOR TESTING TRANSISTOR(S) 有权
    用于测试晶体管的电路和方法（S）

    公开(公告)号：US20160109504A1

    公开(公告)日：2016-04-21

    申请号：US14573100

    申请日：2014-12-17

    申请人： BOE TECHNOLOGY GROUP CO., LTD.

    发明人： Guangliang SHANG ,  Yun Sik IM ,  Seung Woo HAN

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2621 ,  G01R31/2608 ,  H01L22/34

    摘要： Disclosed is a circuit and method for testing transistor(s). The circuit is used for testing a set of transistors including at least two transistors, wherein the circuit comprises: a first power supply voltage terminal connected to first electrodes of the respective transistors; a first control signal terminal connected to control electrodes of the respective transistors; and a set of test terminals including at least two test terminals, wherein the test terminals are connected to second electrodes of the corresponding transistors, respectively. According to the circuit disclosed in the present disclosure, it can be achieved that the bias voltages can be applied to the plurality of transistors to be tested simultaneously. Further, the current characteristics of the transistors are tested respectively, which avoids applying the bias voltage to the plurality of transistor to be tested one by one, thus reducing the time consumed in test and improving the testing efficiency

    摘要翻译： 公开了一种用于测试晶体管的电路和方法。 该电路用于测试包括至少两个晶体管的一组晶体管，其中该电路包括：连接到相应晶体管的第一电极的第一电源电压端子; 连接到各个晶体管的控制电极的第一控制信号端子; 以及包括至少两个测试端子的一组测试端子，其中测试端子分别连接到相应晶体管的第二电极。 根据本公开中公开的电路，可以实现偏置电压可以同时施加到待测试的多个晶体管。 此外，分别测试晶体管的电流特性，这避免了一个接一个地对待测试的多个晶体管施加偏置电压，从而减少了测试中消耗的时间并提高了测试效率