公开(公告)号：US6097663A

公开(公告)日：2000-08-01

申请号：US413641

申请日：1999-10-06

申请人： Takao Watanabe ,  Kazushige Ayukawa ,  Ryo Fujita ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka

发明人： Takao Watanabe ,  Kazushige Ayukawa ,  Ryo Fujita ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka

IPC分类号： G06F17/50 ,  G11C7/00 ,  G11C7/02 ,  G11C7/10 ,  G11C8/12 ,  H01L27/108 ,  G11C8/00

CPC分类号： G11C7/02 ,  G11C7/10 ,  G11C7/1006 ,  G11C7/1042 ,  G11C7/1072 ,  H01L27/10897

摘要： A semiconductor IC device is designed using a memory core with a plurality of I/O lines, a transfer circuit module and a logic library which are produced beforehand and stored in a data base. The memory core and a logic circuit are arranged so that their I/O lines extend in the same direction. A transfer circuit including plural stages of switch groups is arranged between the I/O lines of the memory core and the I/O lines of the logic circuit. Switches forming each stage of switch group are formed between the I/O lines of the memory core and the I/O lines of the logic circuit. When one stage of or a small number of stages of switch groups are turned on, the I/O lines of the memory core and the I/O lines of the logic circuit are turned on, thereby forming a desired transfer pattern. The memory core is constructed by the combination of functional modules such as an amplifier module, a bank module and a power supply module. In the bank module are arranged row-system circuits which operate independently of each other and a multiplicity of I/O lines which extend in a bit line direction.

公开(公告)号：US6049360A

公开(公告)日：2000-04-11

申请号：US210903

申请日：1998-12-16

申请人： Norifumi Yanai ,  Ryo Fujita ,  Koyo Katsura ,  Yasushi Fukunaga

发明人： Norifumi Yanai ,  Ryo Fujita ,  Koyo Katsura ,  Yasushi Fukunaga

IPC分类号： G06T1/20 ,  G09G5/36 ,  G09G5/39 ,  G09G5/399 ,  H04N5/262 ,  H04N7/26 ,  H04N7/50 ,  H04N5/445

CPC分类号： G09G5/39 ,  G06T1/20 ,  H04N19/42 ,  H04N19/61 ,  H04N5/2624 ,  G09G2340/125 ,  G09G2360/123 ,  G09G5/36 ,  G09G5/399

摘要： An image composing and displaying apparatus includes frame memory constituent elements of an identical structure, a video input section, a video output section, a controller for selecting connection of each element to the video input or output section, and an image drawing section for reading and writing video data from and in the elements. The memory elements can be used for the input and output operations and hence the size thereof can be easily expanded; moreover, the numbers of the elements respectively connected to the video input and output sections can be adaptively varied.

摘要翻译： 图像合成显示装置包括具有相同结构的帧存储器组成元件，视频输入部分，视频输出部分，用于选择每个元素与视频输入或输出部分的连接的控制器，以及用于读取和 从元素中写入视频数据。 存储元件可用于输入和输出操作，因此其尺寸可以容易地扩展; 此外，分别连接到视频输入和输出部分的元件的数量可以自适应地变化。

公开(公告)号：US6021833A

公开(公告)日：2000-02-08

申请号：US713253

申请日：1996-09-12

申请人： Katsumi Uchikawa ,  Keiji Arai ,  Kouji Takamachi ,  Tohru Matsui ,  Ryo Fujita ,  Tohru Goto ,  Shigemitsu Matsumoto ,  Shuntaro Takizawa ,  Shuji Higuchi ,  Takanori Kobayashi ,  Koichi Takemata

发明人： Katsumi Uchikawa ,  Keiji Arai ,  Kouji Takamachi ,  Tohru Matsui ,  Ryo Fujita ,  Tohru Goto ,  Shigemitsu Matsumoto ,  Shuntaro Takizawa ,  Shuji Higuchi ,  Takanori Kobayashi ,  Koichi Takemata

IPC分类号： B23Q41/00 ,  B32B15/08 ,  H05K3/00 ,  H05K3/06 ,  H05K3/38 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K3/00 ,  H05K3/0082 ,  H05K3/0085 ,  H05K3/0091 ,  H05K3/382 ,  H05K3/4069 ,  H05K3/4652 ,  Y10T156/1339 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155

摘要： A manufacturing line including a plurality of processing sections disposed in a series for manufacturing multi-layered printed circuit boards by continuously conveying and processing boards through the plurality of processing sections, in which the plurality of processing sections have at least two specific processing sections for conducting a common type of processes, and the specific processing sections are disposed in a common area.

摘要翻译： 一种制造线，包括通过连续输送和处理多个处理部分的多个处理部分而制造多层印刷电路板的多个处理部分，其中多个处理部分具有至少两个特定处理部分，用于导电 通常的处理类型，特定的处理部位配置在公共区域。

公开(公告)号：US5680175A

公开(公告)日：1997-10-21

申请号：US513022

申请日：1995-08-09

申请人： Norifumi Yanai ,  Ryo Fujita ,  Koyo Katsura ,  Yasushi Fukunaga

发明人： Norifumi Yanai ,  Ryo Fujita ,  Koyo Katsura ,  Yasushi Fukunaga

IPC分类号： G06T1/20 ,  G09G5/36 ,  G09G5/39 ,  G09G5/399 ,  H04N5/262 ,  H04N7/26 ,  H04N7/50 ,  H04N7/01

CPC分类号： G09G5/39 ,  G06T1/20 ,  H04N19/42 ,  H04N19/61 ,  H04N5/2624 ,  G09G2340/125 ,  G09G2360/123 ,  G09G5/36 ,  G09G5/399

摘要： An image composing and displaying apparatus includes frame memory constituent elements of an identical structure, a video input portion, a video output portion, a controller for selecting connection of each element to the video input or output portion, and an image drawing portion for reading and writing video data from and in the memory elements. The memory elements can be used for the input and output operations and hence the size thereof can be easily expanded; moreover, the numbers of the elements respectively connected to the video input and output portions can be adaptively varied.

摘要翻译： 图像合成显示装置包括具有相同结构的帧存储器组成元件，视频输入部分，视频输出部分，用于选择每个元素与视频输入或输出部分的连接的控制器，以及用于读取和/ 从存储器元件中写入视频数据。 存储元件可用于输入和输出操作，因此其尺寸可以容易地扩展; 此外，分别连接到视频输入和输出部分的元件的数量可以自适应地变化。

公开(公告)号：US4646073A

公开(公告)日：1987-02-24

申请号：US594687

申请日：1984-03-29

申请人： Yasushi Fukunaga ,  Ryo Fujita

发明人： Yasushi Fukunaga ,  Ryo Fujita

IPC分类号： G06F3/041 ,  G06F3/033 ,  G06F3/037 ,  G06F3/038 ,  G06F3/048 ,  G09G3/02

CPC分类号： G06F3/0418 ,  G06F3/033 ,  G06F3/038

摘要： An input-output coordinate transforming method for an input-integerated display apparatus of a structure in which an input coordinate designating part is integrally combined with a screen of a display device, wherein coordinates inputted through the input coordinate designating part by an operator are subjected to coordinate transformation before being supplied to the display device so as to make an input point on the input coordinate designating means coincide with an output point on the display screen when observed by the operator. The method comprises steps of displaying sequentially a plurality of predetermined reference coordinates on the display screen and inputting through the input coordinate designating part the coordinates of points thereon designated by the operator which points correspond, respectively, to the reference coordinate points, arithmetically determining constants of predetermined coordinate transformation expressions representing correspondence between the input coordinates and the output coordinates on the basis of the plurality of the reference coordinates and the plurality of the corresponding input coordinates, and transforming the input coordinates supplied by the input coordinate designating part into output coordinates to be supplied to the display device in accordance with the coordinate transformation expressions containing the constants determined.

摘要翻译： 一种用于输入整数显示装置的输入输出坐标变换方法，其中输入坐标指定部分与显示装置的屏幕整体组合，其中由操作者通过输入坐标指定部分输入的坐标被 在被提供给显示装置之前进行坐标变换，以使输入坐标指定装置上的输入点与操作者观察时的显示屏上的输出点一致。 该方法包括以下步骤：在显示屏上依次显示多个预定参考坐标，并通过输入坐标指定部分将由操作者指定的点的坐标分别输入到参考坐标点，算术确定常数 表示基于多个基准坐标和多个相应输入坐标的输入坐标和输出坐标之间的对应关系的预定坐标变换表达式，并将由输入的坐标指定部分提供的输入坐标变换为输出坐标， 根据包含所确定的常数的坐标变换表达式提供给显示装置。