Coexistence of message-passing-like algorithms and procedural coding

    公开(公告)号:US10275289B2

    公开(公告)日:2019-04-30

    申请号:US15431557

    申请日:2017-02-13

    Applicant: SAP SE

    Inventor: Ivan Schreter

    Abstract: First logical cores supported on physical processor cores in a computing system can be designated for execution of message-passing workers of a plurality of message workers while at least second logical cores supported on the physical processor cores can be designated for execution of procedural code such that resources of a physical processor core supporting the first logical core and the second logical core are shared between a first logical core and a second logical core. A database object in a repository can be assigned to one message-passing worker, which can execute operations on the database object while procedurally coded operations are processed using the second logical core on one or more of the plurality of physical processor cores while the first logical core executes the message-passing worker.

    LOGGING CHANGES TO DATA STORED IN DISTRIBUTED DATA STORAGE SYSTEM

    公开(公告)号:US20190012357A1

    公开(公告)日:2019-01-10

    申请号:US16029459

    申请日:2018-07-06

    Applicant: SAP SE

    Inventor: Ivan Schreter

    Abstract: A method for logging changes to data stored in a distributed data storage system can include responding to a request to change the data stored in the distributed data storage system by generating a log entry corresponding to the change. A replica of the data can be stored at each of a first computing node and a second computing node comprising the distributed data storage system. The log entry can be added to a first log stored at the first computing node and propagated to the second computing node to add the first log entry to a second log stored at the second computing node. A crash recovery can be performed at the first computing node and/or the second computing node based on the first log and/or the second log. Related systems and articles of manufacture, including computer program products, are also provided.

    Connection reestablishment protocol for peer communication in distributed systems

    公开(公告)号:US10178186B2

    公开(公告)日:2019-01-08

    申请号:US15184168

    申请日:2016-06-16

    Applicant: SAP SE

    Inventor: Ivan Schreter

    Abstract: Communication resumption information can be retained nodes of a cluster of nodes that form a distributed computing system. The communication resumption information can be exchanged between a node of the cluster and a peer node of the cluster after resumption of communication following a loss of communication between the node and the peer node. A determination of whether communication between the node and the peer node can be reestablished without losing messages can include comparing the communication resumption information received by the node from the peer node with the communication resumption information retained at the node. Communication between the node and the peer node can be resumed based when the determining indicates that communication between the node and the peer node can be reestablished without losing messages.

    Hybrid heap memory management
    64.
    发明授权

    公开(公告)号:US10073872B2

    公开(公告)日:2018-09-11

    申请号:US14849041

    申请日:2015-09-09

    Applicant: SAP SE

    CPC classification number: G06F16/22 G06F12/023 G06F2212/1024 G06F2212/1044

    Abstract: A database memory manager determines a size class for each of a plurality of memory allocation requests. The memory manager then, based on the determined size classes, assigns which of a plurality of sub-allocators forming part of a plurality of memory pools should handle each memory allocation request. The sub-allocators assignments are based on predefined size ranges for each size class. The corresponding assigned sub-allocators then identify locations within the memory for each memory allocation request. The corresponding assigned sub-allocators next handle the memory allocation requests to allocate memory at the identified locations such that one of the sub-allocators utilizes both thread local storage and core-striped memory management.

    Memory allocation and recovery strategies for byte-addressable non-volatile RAM (NVRAM)

    公开(公告)号:US10019331B2

    公开(公告)日:2018-07-10

    申请号:US14973447

    申请日:2015-12-17

    Applicant: SAP SE

    CPC classification number: G06F11/2094 G06F11/00 G06F2201/805

    Abstract: Disclosed herein are innovations in memory management and data recovery for systems that operate using storage class memory (SCM), such as non-volatile RAM (NVRAM). The disclosed innovations have particular application to production database systems, where reducing database downtime in the event of a system crash is highly desirable. Embodiments of the disclosed technology can address a variety of problems that exist during a system crash. For example, embodiments of the disclosed technology can be used to address the loss of the physical memory mapping and/or the loss of the CPU cache that typically occurs in the event of a system crash. Furthermore, embodiments of the disclosed technology can be used to prevent data inconsistency and/or memory leak problems that may arise in the event of a system crash.

    MULTI-LEVEL MEMORY MAPPING
    66.
    发明申请

    公开(公告)号:US20180150392A1

    公开(公告)日:2018-05-31

    申请号:US15363516

    申请日:2016-11-29

    Applicant: SAP SE

    CPC classification number: G06F12/0292 G06F2212/1016

    Abstract: A system for memory allocation and deallocation with a multi-level memory map is provided. In some implementations, the system performs operations comprising allocating a memory map for addressing a plurality of memory locations in a heap, the memory map comprising a root node, one or more second-level nodes, and a plurality of third-level nodes. The plurality of third-level nodes can comprise third entries for pointing to the memory locations and/or the one or more second-level nodes can comprise a plurality of second entries corresponding to the plurality of third-level nodes. The operations can further include determining a location to store data within the heap and/or tracking the location by placing a pointer within a third-level node of the plurality of third-level nodes and incrementing a counter corresponding to the third-level node. Related systems, methods, and articles of manufacture are also described.

    MEMORY ALLOCATION IN MULTI-CORE PROCESSORS
    67.
    发明申请

    公开(公告)号:US20180150222A1

    公开(公告)日:2018-05-31

    申请号:US15428035

    申请日:2017-02-08

    Applicant: SAP SE

    Abstract: A system for allocating memory (e.g., heap) in multi-core processors is provided. In some implementations, the system performs operations comprising receiving, at a shared cache having a plurality of segments, a first data allocation including a plurality of data blocks, and allocating at least a first and second data block from the first allocation. First and second segments in the shared cache can each comprise a plurality of data slots (e.g., of equal length). Allocating the first and second data blocks can include storing the first data block in a data slot of the first segment and storing the second data block in a data slot of the second segment. The plurality of data slots which do not contain data may contain padding, and/or the data slots to which the first and second data blocks are allocated are not adjacent. Related systems, methods, and articles of manufacture are also described.

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