公开(公告)号：US08438195B2

公开(公告)日：2013-05-07

申请号：US13304579

申请日：2011-11-25

申请人： Jae Geuk Kim ,  Chul Lee ,  Joo Young Hwang

发明人： Jae Geuk Kim ,  Chul Lee ,  Joo Young Hwang

IPC分类号： G06F7/00

CPC分类号： G06F17/30129

摘要： A method of operating a file system in a host configured to store write data in a data storage device including a first region and a second region is disclosed, and includes; receiving a write data request for write data associated with a file, classifying the write data as hot data or cold data using file meta data for the file, and if the write data is classified as hot data, storing the write data in the first region, and otherwise if the write data is classified as cold data storing the write data in the second region.

摘要翻译： 公开了一种在被配置为将写入数据存储在包括第一区域和第二区域的数据存储设备中的主机中操作文件系统的方法，并且包括： 接收与文件相关联的写入数据的写入数据请求，使用文件的文件元数据将写入数据分类为热数据或冷数据，并且如果写入数据被分类为热数据，则将写入数据存储在第一区域 ，否则如果写入数据被分类为在第二区域中存储写入数据的冷数据。

公开(公告)号：US20120209893A1

公开(公告)日：2012-08-16

申请号：US13304579

申请日：2011-11-25

申请人： Jae Geuk Kim ,  Chul Lee ,  Joo Young Hwang

发明人： Jae Geuk Kim ,  Chul Lee ,  Joo Young Hwang

IPC分类号： G06F17/30

CPC分类号： G06F17/30129

摘要： A method of operating a file system in a host configured to store write data in a data storage device including a first region and a second region is disclosed, and includes; receiving a write data request for write data associated with a file, classifying the write data as hot data or cold data using file meta data for the file, and if the write data is classified as hot data, storing the write data in the first region, and otherwise if the write data is classified as cold data storing the write data in the second region.

摘要翻译： 公开了一种在被配置为将写入数据存储在包括第一区域和第二区域的数据存储设备中的主机中操作文件系统的方法，并且包括： 接收与文件相关联的写入数据的写入数据请求，使用文件的文件元数据将写入数据分类为热数据或冷数据，并且如果写入数据被分类为热数据，则将写入数据存储在第一区域 ，否则如果写入数据被分类为在第二区域中存储写入数据的冷数据。

公开(公告)号：US08154065B2

公开(公告)日：2012-04-10

申请号：US12418879

申请日：2009-04-06

申请人： Jae-man Yoon ,  Dong-gun Park ,  Choong-ho Lee ,  Moon-suk Yi ,  Chul Lee

发明人： Jae-man Yoon ,  Dong-gun Park ,  Choong-ho Lee ,  Moon-suk Yi ,  Chul Lee

IPC分类号： H01L27/108

CPC分类号： H01L27/10885 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10876 ,  H01L29/66666

摘要： Semiconductor memory devices include a semiconductor substrate and a plurality of semiconductor material pillars in a spaced relationship on the semiconductor substrate. Respective surrounding gate electrodes surround ones of the pillars. A first source/drain region is in the semiconductor substrate between adjacent ones of the pillars and a second source/drain region is in an upper portion of at least one of the adjacent pillars. A buried bit line is in the first source/drain region and electrically coupled to the first source/drain region and a storage node electrode is on the upper portion of the at least one of the adjacent pillars and electrically contacting with the second source/drain region.

摘要翻译： 半导体存储器件包括在半导体衬底上具有间隔关系的半导体衬底和多个半导体材料柱。 相邻的围绕电极围绕其中的一个柱。 第一源极/漏极区域在相邻的柱之间的半导体衬底中，并且第二源极/漏极区域位于至少一个相邻支柱的上部。 掩埋位线在第一源极/漏极区域中并且电耦合到第一源极/漏极区域，并且存储节点电极在相邻柱的至少一个的上部上并且与第二源极/漏极 地区。

公开(公告)号：US20120073208A1

公开(公告)日：2012-03-29

申请号：US13322635

申请日：2010-05-24

申请人： Chul Lee

发明人： Chul Lee

IPC分类号： E05B47/00 ,  E05C1/12

CPC分类号： E05F15/655 ,  E05F15/652 ,  E05Y2201/22 ,  E05Y2201/232 ,  E05Y2201/638 ,  E05Y2201/64 ,  E05Y2201/702 ,  E05Y2800/116 ,  E05Y2800/21 ,  E05Y2900/51 ,  Y10T292/1016

摘要： The invention relates to an electric door-locking system to be applied to at least one electric door body that is movable in a sliding manner, and includes forwardly and reversely rotatable screws disposed side by side along a direction in which the electric door body slides at the side of a door frame; a cam assembly provided at a predetermined position of the screws to perform a locking function and an unlocking function; and a sliding unit provided with a locking roller resiliently biased in a direction toward the cam assembly and engaging with the cam assembly to perform the locking function, one end of the sliding unit being rotatably connected to the screw and the other end of the sliding unit being connected to the electric door body.

摘要翻译： 本发明涉及一种电动门锁系统，其应用于至少一个可滑动移动的电动门体，并且包括沿着电动门体滑动方向并排设置的向前和反向旋转的螺钉 门框的一侧; 凸轮组件，其设置在所述螺钉的预定位置处以执行锁定功能和解锁功能; 以及滑动单元，其具有沿朝向凸轮组件的方向弹性偏压并与凸轮组件接合以执行锁定功能的锁定辊，滑动单元的一端可旋转地连接到螺钉，滑动单元的另一端 连接到电动门体。

公开(公告)号：US20110171800A1

公开(公告)日：2011-07-14

申请号：US12944870

申请日：2010-11-12

申请人： Bongsoo Kim ,  Chul Lee ,  Deoksung Hwang ,  Sang-Bin Ahn

发明人： Bongsoo Kim ,  Chul Lee ,  Deoksung Hwang ,  Sang-Bin Ahn

IPC分类号： H01L21/336

CPC分类号： H01L29/4236 ,  H01L21/823437 ,  H01L29/66621 ,  H01L29/78

摘要： A polycrystalline semiconductor layer is formed on a cell active region and a peripheral active region of a substrate. A buried gate electrode is formed in the substrate in the cell active region at a level below the polycrystalline semiconductor layer after forming the polycrystalline semiconductor layer. A gate electrode is formed on the substrate in the peripheral active region from the polysilicon semiconductor layer after forming the buried gate electrode.

摘要翻译： 多晶半导体层形成在基板的单元有源区和周边有源区上。 在形成多晶半导体层之后，在多晶半导体层下方的电池有源区的基板中形成掩埋栅电极。 在形成掩埋栅电极之后，在多晶硅半导体层的外围有源区的基板上形成栅电极。

公开(公告)号：US07919378B2

公开(公告)日：2011-04-05

申请号：US12397176

申请日：2009-03-03

申请人： Jae-Man Yoon ,  Choong-Ho Lee ,  Dong-Gun Park ,  Chul Lee

发明人： Jae-Man Yoon ,  Choong-Ho Lee ,  Dong-Gun Park ,  Chul Lee

IPC分类号： H01L21/336

CPC分类号： H01L29/785 ,  H01L29/66795

摘要： According to some embodiments of the invention, a fin type transistor includes an active structure integrally formed with a silicon substrate. The active structure includes grooves that form blocking regions under source/drain regions. A gate structure is formed to cross the upper face of the active structure and to cover the exposed side surfaces of the lateral portions of the active structure. An effective channel length of a fin type transistor may be sufficiently ensured so that a short channel effect of the transistor may be prevented and the fin type transistor may have a high breakdown voltage.

摘要翻译： 根据本发明的一些实施例，鳍型晶体管包括与硅衬底一体形成的有源结构。 活性结构包括在源极/漏极区域下形成阻挡区的沟槽。 栅极结构形成为跨越有源结构的上表面并且覆盖有源结构的侧部的暴露的侧表面。 可以充分确保翅片型晶体管的有效沟道长度，从而可以防止晶体管的短沟道效应，并且鳍式晶体管可能具有高击穿电压。

公开(公告)号：US20090189217A1

公开(公告)日：2009-07-30

申请号：US12418879

申请日：2009-04-06

申请人： Jae-man Yoon ,  Dong-gun Park ,  Choong-ho Lee ,  Moon-suk Yi ,  Chul Lee

发明人： Jae-man Yoon ,  Dong-gun Park ,  Choong-ho Lee ,  Moon-suk Yi ,  Chul Lee

IPC分类号： H01L29/78

CPC分类号： H01L27/10885 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10876 ,  H01L29/66666

摘要： Semiconductor memory devices include a semiconductor substrate and a plurality of semiconductor material pillars in a spaced relationship on the semiconductor substrate. Respective surrounding gate electrodes surround ones of the pillars. A first source/drain region is in the semiconductor substrate between adjacent ones of the pillars and a second source/drain region is in an upper portion of at least one of the adjacent pillars. A buried bit line is in the first source/drain region and electrically coupled to the first source/drain region and a storage node electrode is on the upper portion of the at least one of the adjacent pillars and electrically contacting with the second source/drain region.

摘要翻译： 半导体存储器件包括在半导体衬底上具有间隔关系的半导体衬底和多个半导体材料柱。 相邻的围绕电极围绕其中的一个柱。 第一源极/漏极区域在相邻的柱之间的半导体衬底中，并且第二源极/漏极区域位于至少一个相邻支柱的上部。 掩埋位线在第一源极/漏极区域中并且电耦合到第一源极/漏极区域，并且存储节点电极在相邻柱的至少一个的上部上并且与第二源极/漏极 地区。

公开(公告)号：US20090186471A1

公开(公告)日：2009-07-23

申请号：US12321335

申请日：2009-01-20

申请人： Kyoung-Ho Jung ,  Makoto Yoshida ,  Jae-Rok Kahng ,  Chul Lee ,  Joon-Seok Moon ,  Cheol-Kyu Lee ,  Sung-Il Cho

发明人： Kyoung-Ho Jung ,  Makoto Yoshida ,  Jae-Rok Kahng ,  Chul Lee ,  Joon-Seok Moon ,  Cheol-Kyu Lee ,  Sung-Il Cho

IPC分类号： H01L21/426 ,  H01L21/04

CPC分类号： H01L21/823814 ,  H01L21/823425 ,  H01L21/82385

摘要： A method of fabricating a semiconductor device for reducing a thermal burden on impurity regions of a peripheral circuit region includes preparing a substrate including a cell active region in a cell array region and peripheral active regions in a peripheral circuit region. A cell gate pattern and peripheral gate patterns may be formed on the cell active region and the peripheral active regions. First cell impurity regions may be formed in the cell active region. A first insulating layer and a sacrificial insulating layer may be formed to surround the cell gate pattern and the peripheral gate patterns. Cell conductive pads may be formed in the first insulating layer to electrically connect the first cell impurity regions. The sacrificial insulating layer may be removed adjacent to the peripheral gate patterns. First and second peripheral impurity regions may be sequentially formed in the peripheral active regions adjacent to the peripheral gate patterns.

摘要翻译： 制造用于减少外围电路区域的杂质区域的热负荷的半导体器件的方法包括制备包括单元阵列区域中的单元有源区和外围电路区中的外围有源区的基板。 单元栅极图案和外围栅极图案可以形成在单元有源区域和外围有源区域上。 可以在电池活性区域中形成第一电池杂质区域。 可以形成第一绝缘层和牺牲绝缘层以围绕电池栅极图案和外围栅极图案。 电池导电焊盘可以形成在第一绝缘层中以电连接第一电池杂质区。 牺牲绝缘层可以与外围栅极图案相邻地去除。 第一和第二外围杂质区域可以顺序地形成在与外围栅极图案相邻的外围有源区域中。

公开(公告)号：US20080185641A1

公开(公告)日：2008-08-07

申请号：US12068179

申请日：2008-02-04

申请人： Keun-Nam Kim ,  Makoto Yoshida ,  Chul Lee ,  Dong-Gun Park ,  Woun-Suck Yang

发明人： Keun-Nam Kim ,  Makoto Yoshida ,  Chul Lee ,  Dong-Gun Park ,  Woun-Suck Yang

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66795 ,  H01L29/66621 ,  H01L29/7834 ,  H01L29/7851

摘要： A recessed transistor and a method of manufacturing the same are provided. The recessed transistor may include a substrate, an active pin, a gate pattern and source and drain regions. The substrate may include an isolation layer that establishes an active region and a field region of the substrate. The substrate may include a recessed structure having an upper recess formed in the active region and a lower recess in communication with the upper recess. An active pin may be formed in a region between side surfaces of the isolation layer and the lower recess and an interface between the active region and the field region. The gate pattern may include a gate insulation layer formed on an inner surface of the recessed structure and a gate electrode formed on the gate insulation layer in the recessed structure. The source/drain regions may be formed adjacent to the active region and the gate electrode.

摘要翻译： 提供凹陷晶体管及其制造方法。 凹陷的晶体管可以包括衬底，有源引脚，栅极图案以及源极和漏极区域。 衬底可以包括建立衬底的有源区和场区的隔离层。 衬底可以包括具有形成在有源区域中的上凹部的凹陷结构和与上凹部连通的下凹部。 有源销可以形成在隔离层和下凹部的侧表面之间的区域中以及有源区域和场区域之间的界面。 栅极图案可以包括形成在凹陷结构的内表面上的栅极绝缘层和形成在凹陷结构中的栅极绝缘层上的栅电极。 源/漏区可以与有源区和栅电极相邻形成。

公开(公告)号：US20070190725A1

公开(公告)日：2007-08-16

申请号：US11740525

申请日：2007-04-26

申请人： Tae-yong Kim ,  Choong-ho Lee ,  Chul Lee ,  Eun-suk Cho ,  Suk-kang Sung ,  Hye-jin Cho

发明人： Tae-yong Kim ,  Choong-ho Lee ,  Chul Lee ,  Eun-suk Cho ,  Suk-kang Sung ,  Hye-jin Cho

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11568

摘要： A semiconductor device includes a semiconductor substrate having a first conductivity type and having an upper portion, a pair of bit lines extending in a first direction and doped with an impurity of a second conductivity type opposite to the first conductivity type and spaced from one another in the upper portion of the semiconductor substrate, a first line formed between the pair of bit lines having a plurality of alternating recessed device isolation regions and channel regions, with each of the channel regions contacting each bit line of the at least one pair of bit lines, and word lines formed at right angles to the first lines and covering the channel regions.

摘要翻译： 半导体器件包括具有第一导电类型并具有上部的半导体衬底，一对位线沿着第一方向延伸并且掺杂有与第一导电类型相反并且彼此间隔开的第二导电类型的杂质 所述半导体衬底的上部，形成在所述一对位线之间的第一线，所述第一线具有多个交替的凹陷器件隔离区域和沟道区域，其中每个沟道区域与所述至少一对位线的每个位线接触 以及与第一线成直角形成并覆盖沟道区的字线。