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128 条记录 (耗时 0.031 秒)

    SPLIT GATE TYPE NONVOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    61.
    发明申请
    SPLIT GATE TYPE NONVOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
    分离门型非易失性存储器件及其制造方法

    公开(公告)号：US20080318406A1

    公开(公告)日：2008-12-25

    申请号：US12194202

    申请日：2008-08-19

    申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

    发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

    IPC分类号： H01L21/3205

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： In a split gate type nonvolatile memory device and a method of fabricating the same. A supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level.

    摘要翻译： 在分闸式非易失存储器件及其制造方法中， 辅助层图案设置在半导体衬底的源极区域上。 由于源区域由于存在辅助层图案而垂直延伸，因此可以增加浮置栅极与源区域和辅助层图案重叠的区域的面积。 因此，形成在源极和浮置栅极之间的电容器的电容增加，使得非易失性存储器件可以在低电压电平下执行编程/擦除操作。

    Methods of forming split-gate non-volatile memory cells including raised oxide layers on field oxide regions
    62.
    发明授权
    Methods of forming split-gate non-volatile memory cells including raised oxide layers on field oxide regions 失效
    在场氧化物区域上形成包括凸起的氧化物层的分裂非晶体非易失性存储单元的方法

    公开(公告)号：US07351636B2

    公开(公告)日：2008-04-01

    申请号：US11138702

    申请日：2005-05-26

    申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

    发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/7885

    摘要： A method of forming a split-gate non-volatile memory cell can include forming first and second adjacent floating gates self-aligned to a field oxide region therebetween. An oxide layer is formed covering the first and second adjacent floating gates and the field oxide region, the oxide layer electrically isolates the first and second adjacent floating gates from one another. A control gate is formed on the oxide layer on the first and second adjacent floating gates. Related devices are also disclosed.

    摘要翻译： 形成分闸非易失性存储单元的方法可以包括形成与其之间的场氧化物区域自对准的第一和第二相邻浮置栅极。 形成覆盖第一和第二相邻浮动栅极和场氧化物区域的氧化物层，氧化物层将第一和第二相邻浮栅彼此电隔离。 控制栅极形成在第一和第二相邻浮动栅极上的氧化物层上。 还公开了相关设备。

    Remote controlling system for electric device
    63.
    发明申请
    Remote controlling system for electric device 有权
    电气设备远程控制系统

    公开(公告)号：US20080042868A1

    公开(公告)日：2008-02-21

    申请号：US11790082

    申请日：2007-04-23

    申请人： Hoonbong Lee ,  Yong-Tae Kim

    发明人： Hoonbong Lee ,  Yong-Tae Kim

    IPC分类号： G05B19/02

    CPC分类号： G05B19/0423 ,  G05B2219/23051 ,  G05B2219/23178 ,  G05B2219/23297 ,  G05B2219/2633

    摘要： The present invention discloses a remote controlling system for an electric device which can control operations of electric devices such as a washer and a dryer and display states thereof. The remote controlling system for the electric device includes one or more electric devices for communicating with a remote controlling device through a wireless communication network, transmitting state information to the remote controlling device according to a state request command from the remote controlling device, and controlling a predetermined operation according to an operation control command from the remote controlling device, and the remote controlling device supplied with power by a common power source, for transmitting the state request command to the electric device selected by the user, receiving the state information from the electric device, and displaying the state information, or transmitting the operation control command to the electric device.

    摘要翻译： 本发明公开了一种能够控制诸如洗衣机和烘干机的电气设备的操作的电气设备的遥控系统及其显示状态。 电气设备的遥控系统包括一个或多个用于通过无线通信网络与远程控制设备进行通信的电气设备，根据来自远程控制设备的状态请求命令向远程控制设备发送状态信息，并且控制 根据来自遥控装置的操作控制命令和由公共电源供电的遥控装置的预定操作，用于将状态请求命令发送到由用户选择的电气装置，从电力接收状态信息 设备，并且显示状态信息，或者将操作控制命令发送到电子设备。

    Fabrication method of self-aligned ferroelectric gate transistor using buffer layer of high etching selectivity
    65.
    发明授权
    Fabrication method of self-aligned ferroelectric gate transistor using buffer layer of high etching selectivity 有权
    使用高蚀刻选择性的缓冲层的自对准铁电栅极晶体管的制造方法

    公开(公告)号：US07151001B2

    公开(公告)日：2006-12-19

    申请号：US10922949

    申请日：2004-08-23

    申请人： Yong-Tae Kim ,  Seong-Il Kim ,  Chun-Keun Kim ,  Sun-Il Shim

    发明人： Yong-Tae Kim ,  Seong-Il Kim ,  Chun-Keun Kim ,  Sun-Il Shim

    IPC分类号： H01L21/00

    CPC分类号： H01L29/6684 ,  H01L21/2652 ,  H01L21/28291 ,  H01L29/66575

    摘要： A fabrication method of a self-aligned ferroelectric gate transistor using a buffer layer of high etching selectivity is disclosed. A stacked structure is formed with a buffer layer with high etching selectivity inserted between a silicon substrate and a ferroelectric layer, and etching is performed on a portion where a source and a drain will be formed and then stopped at the buffer layer, thereby fabricating a self-aligned ferroelectric gate transistor without damage to the silicon thin film, and thus, an integration degree of a chip can be improved.

    摘要翻译： 公开了使用具有高蚀刻选择性的缓冲层的自对准铁电栅极晶体管的制造方法。 在硅衬底和铁电体层之间形成具有高蚀刻选择性的缓冲层的堆叠结构，并且对形成源极和漏极的部分进行蚀刻，然后在缓冲层处停止， 自对准的铁电栅极晶体管，而不损坏硅薄膜，从而可以提高芯片的集成度。

    Uv-cured multi-component polymer blend electrolyte, lithium secondary battery and their fabrication method
    67.
    发明申请
    Uv-cured multi-component polymer blend electrolyte, lithium secondary battery and their fabrication method 有权
    Uv固化多组分聚合物共混电解质，锂二次电池及其制造方法

    公开(公告)号：US20050221194A1

    公开(公告)日：2005-10-06

    申请号：US10275384

    申请日：2001-01-31

    申请人： Byung-Won Cho ,  Won-Il Cho ,  Hyung-Sun Kim ,  Un-Sek Kim ,  Hee-Woo Rhee ,  Yong-Tae Kim ,  Min-Kyu Song

    发明人： Byung-Won Cho ,  Won-Il Cho ,  Hyung-Sun Kim ,  Un-Sek Kim ,  Hee-Woo Rhee ,  Yong-Tae Kim ,  Min-Kyu Song

    IPC分类号： H01M6/16 ,  H01M10/052 ,  H01M10/0565 ,  H01M10/36 ,  H01M10/40

    CPC分类号： H01M10/0565 ,  H01M6/168 ,  H01M10/052 ,  H01M2300/0082 ,  H01M2300/0088

    摘要： The present invetion relates to a UV-cured multi-component polymer blend electrolyte, lithium secondary battery and their fabrication method, wherein the UV-cured multi-component polymer blend electrolyte, comprises: A) function-I polymer obtained by curing ethyleneglycoldi-(meth)acrylate oligomer of formula 1 by UV irradiation, CH2═CR1COO(CH2CH2O)nCOCR2═CH2 (1) wherein,R1 and R2 are independently a hydrogen or methyl group, and n is an integer of 3-20;B) function-II polymer selected from the group consisting of PAN-based polymer, PMMA-based polymer and mixtures thereof; C) function-III polymer selected from the group consisting of PVdF-based polymer, PVC-based polymer and mixtures thereof; and D) organic electrolyte solution in which lithium salt is dissolved in a solvent.

    摘要翻译： 本发明涉及一种UV固化多组分聚合物共混电解质，锂二次电池及其制造方法，其中UV固化的多组分聚合物共混电解质包括：A）通过将乙二醇（（ 甲基）丙烯酸酯低聚物，通过UV照射，CH 2 CO 2（CH 2 CH 2 CH 2） （1）其中，R 1和R 2各自独立地为氢， / SUP>独立地为氢或甲基，n为3-20的整数; B）选自PAN基聚合物，PMMA基聚合物及其混合物的官能团II聚合物; C）选自PVdF基聚合物，基于PVC的聚合物及其混合物的功能III聚合物; 和D）其中锂盐溶解在溶剂中的有机电解质溶液。

    Semiconductor devices and methods of manufacturing the same
    70.
    发明授权
    Semiconductor devices and methods of manufacturing the same 有权
    半导体器件及其制造方法

    公开(公告)号：US09312184B2

    公开(公告)日：2016-04-12

    申请号：US14200274

    申请日：2014-03-07

    申请人： Tea-Kwang Yu ,  Bae-Seong Kwon ,  Yong-Tae Kim ,  Chul-Ho Chung ,  Yong-Suk Choi

    发明人： Tea-Kwang Yu ,  Bae-Seong Kwon ,  Yong-Tae Kim ,  Chul-Ho Chung ,  Yong-Suk Choi

    IPC分类号： H01L21/8234 ,  H01L29/66 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788

    CPC分类号： H01L21/823462 ,  H01L21/823456 ,  H01L27/11546 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7881

    摘要： In a method of manufacturing a semiconductor device, a split gate structure is formed on a cell region of a substrate including the cell region and a logic region. The logic region has a high voltage region, an ultra high voltage region and a low voltage region, and the split gate structure includes a first gate insulation layer pattern, a floating gate, a tunnel insulation layer pattern and a control gate. A spacer layer is formed on the split gate structure and the substrate. The spacer layer is etched to form a spacer on a sidewall of the split gate structure and a second gate insulation layer pattern on the ultra high voltage region of the substrate. A gate electrode is formed on each of the high voltage region of the substrate, the second gate insulation layer pattern, and the low voltage region of the substrate.

    摘要翻译： 在制造半导体器件的方法中，在包括单元区域和逻辑区域的衬底的单元区域上形成分离栅极结构。 逻辑区域具有高电压区域，超高压区域和低电压区域，并且分离栅极结构包括第一栅极绝缘层图案，浮动栅极，隧道绝缘层图案和控制栅极。 在分离栅极结构和衬底上形成间隔层。 蚀刻间隔层以在分离栅极结构的侧壁上形成间隔物，并在衬底的超高电压区域上形成第二栅极绝缘层图案。 在基板的高电压区域，第二栅极绝缘层图案和基板的低电压区域中的每一个上形成栅电极。