公开(公告)号：US07932553B2

公开(公告)日：2011-04-26

申请号：US12292351

申请日：2008-11-18

申请人： Hitoshi Yamaguchi ,  Tsuyoshi Yamamoto

发明人： Hitoshi Yamaguchi ,  Tsuyoshi Yamamoto

IPC分类号： H01L29/732

CPC分类号： H01L29/7815 ,  H01L27/088 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7813 ,  H01L29/7826

摘要： A semiconductor device includes an insulated gate transistor and a resistor. The insulated gate transistor includes a plurality of first cells for supplying electric current to a load and a second cell for detecting an electric current that flows in the first cells. A gate terminal of the plurality of first cells is coupled with a gate terminal of the second cell and a source terminal of the plurality of first cells is coupled with a source terminal of the second cell on a lower potential side. The resistor has a first terminal coupled with a drain terminal of the second cell and a second terminal coupled with a drain terminal of the first cells on a higher potential side. A gate voltage of the insulated gate transistor is feedback-controlled based on an electric potential of the resistor.

摘要翻译： 半导体器件包括绝缘栅晶体管和电阻器。 绝缘栅晶体管包括用于向负载提供电流的多个第一单元和用于检测在第一单元中流动的电流的第二单元。 所述多个第一单元的栅极端子与所述第二单元的栅极端子耦合，并且所述多个第一单元的源极端子与所述第二单元的源极端子耦合在较低电位侧。 电阻器具有与第二单元的漏极端子耦合的第一端子和与较高电位侧的第一单元的漏极端子耦合的第二端子。 绝缘栅极晶体管的栅极电压基于电阻器的电位进行反馈控制。

公开(公告)号：US20100112765A1

公开(公告)日：2010-05-06

申请号：US12614632

申请日：2009-11-09

申请人： Hitoshi Yamaguchi ,  Takeshi Miyajima ,  Nozomu Akagi

发明人： Hitoshi Yamaguchi ,  Takeshi Miyajima ,  Nozomu Akagi

IPC分类号： H01L21/8238 ,  H01L21/8234

CPC分类号： H01L29/7813 ,  H01L21/823814 ,  H01L21/823885 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/66734 ,  H01L29/7803 ,  H01L29/7811 ,  Y10S438/977

摘要： A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.

摘要翻译： 半导体器件的制造方法包括：在半导体衬底上形成多个沟槽; 在每个沟槽中形成第二导电类型的半导体膜，以提供具有在两个沟槽之间的衬底的第一柱和在沟槽中的第二导电型半导体膜的第二柱，第一和第二列与预定方向交替地重复; 减薄基板的第二面; 并增加稀薄第二侧的杂质浓度，从而提供第一导电类型层。 第一导电型层的杂质浓度比第一列高。 第一列提供漂移层，从而形成垂直型第一导电型沟道晶体管。

公开(公告)号：US07591214B2

公开(公告)日：2009-09-22

申请号：US11392481

申请日：2006-03-29

申请人： Teruhisa Ando ,  Nobuaki Shimizu ,  Masahiro Tsunemi ,  Hitoshi Yamaguchi

发明人： Teruhisa Ando ,  Nobuaki Shimizu ,  Masahiro Tsunemi ,  Hitoshi Yamaguchi

IPC分类号： F15B13/042

CPC分类号： E02F9/2267 ,  E02F9/123 ,  E02F9/2221 ,  E02F9/2275

摘要： Provided is a driving motor controlling device of a construction machine, including a driving motor which is included in the construction machine having a swivel joint interposed between an upper body and a lower body, and is connected to a pump and a tank through the swivel joint, and a motor control valve which switches a state for connecting the pump and the tank to the driving motor such that the driving motor is controlled to a stop state, a normal rotation state, or a reverse rotation state, wherein the motor control valve has a neutral position for the stop state, a normal rotation position for the normal rotation state, and a reverse rotation position for the reverse rotation state, and is switched to the neutral position, the normal rotation position, or the reverse rotation position, based on a command from a control device manipulated by a operator and a pressure of an inflow side of hydraulic oil into the driving motor, wherein the motor control valve is disposed in the lower body in which the driving motor is disposed, and is integrally formed with the driving motor, and wherein, upon a warming up operation, the hydraulic oil discharged from the pump is circulated to the tank disposed in the upper body through the swivel joint and the motor control valve.

摘要翻译： 本发明提供一种施工机械的驱动电机控制装置，其特征在于，包括驱动马达，该驱动马达包括在具有位于上体和下体之间的旋转接头的施工机械中，并通过旋转接头连接到泵和油箱 以及电动机控制阀，其将用于将所述泵和所述容器连接的状态切换到所述驱动电动机，使得所述驱动电动机被控制到停止状态，正常旋转状态或反转状态，其中所述电动机控制阀具有 用于停止状态的中立位置，用于正常旋转状态的正常旋转位置和用于反向旋转状态的反向旋转位置，并且基于以下方式切换到中立位置，正常旋转位置或反向旋转位置 来自操作者操作的控制装置的指令和液压油的流入侧的压力进入驱动电动机，其中，电动机控制阀配置在低压 其中驱动电动机设置在其中，并且与驱动电动机一体形成，并且其中，在预热操作时，从泵排出的液压油通过旋转接头循环到设置在上主体中的箱体， 电机控制阀。

公开(公告)号：US07364980B2

公开(公告)日：2008-04-29

申请号：US11539441

申请日：2006-10-06

申请人： Syouji Nogami ,  Tomonori Yamaoka ,  Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takumi Shibata

发明人： Syouji Nogami ,  Tomonori Yamaoka ,  Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takumi Shibata

IPC分类号： H01L21/76

CPC分类号： C30B25/165 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/0634

摘要： Closure at the opening of a trench with an epitaxial film is restrained, and thereby, filling morphology in the trenches is improved. A method for manufacturing a semiconductor substrate includes a step for growing an epitaxial layer 11 on the surface of a silicon substrate 13, a step of forming a trench 14 in this epitaxial layer, and a step of filling the inside of the trench 14 with the epitaxial film 12, wherein mixed gas made by mixing halogenoid gas into silicon source gas is circulated as material gas in filling the inside of the trench with the epitaxial film, and when the standard flow rate of the halogenoid gas is defined as Xslm and the film formation speed of the epitaxial film formed by the circulation of the silicon source gas is defined as Yμm/min, in the case when the aspect ratio of the trench is less than 10, an expression Y

摘要翻译： 在具有外延膜的沟槽的开口处的闭合被抑制，从而提高了沟槽中的填充形态。 一种制造半导体衬底的方法包括在硅衬底13的表面上生长外延层11的步骤，在该外延层中形成沟槽14的步骤，以及将沟槽14内部填充的步骤 外延膜12，其中通过将卤素气体混入硅源气体而制成的混合气体作为原料气体循环，用外延膜填充沟槽内部，当将卤化物气体的标准流量定义为Xslm时，膜 通过硅源气体的循环形成的外延膜的形成速度定义为Ymum / min，在沟槽的纵横比小于10的情况下，满足表达式Y <0.2X + 0.10，在 沟槽的纵横比在10以上且小于20的情况下，满足表达式Y <0.2X + 0.05，在沟槽的纵横比为20以上的情况下，表达式Y <0.2× 满意

公开(公告)号：US07317213B2

公开(公告)日：2008-01-08

申请号：US11211524

申请日：2005-08-26

申请人： Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Yoshiyuki Hattori ,  Kyoko Okada

发明人： Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Yoshiyuki Hattori ,  Kyoko Okada

IPC分类号： H01L29/74 ,  H01L29/417 ,  H01L31/111 ,  H01L29/36

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/41741 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes: a center region; a periphery region; and a semiconductor layer including pairs of a first region having a first impurity amount and a second region having a second impurity amount. The first and the second regions are alternately aligned in a plane. The periphery region includes an utmost outer and an utmost inner periphery pairs. The utmost outer periphery pair has a difference between the second and the first impurity amounts, which is smaller than a maximum difference in the periphery region. The utmost inner periphery pair has a difference between the second and the first impurity amounts, which is larger than a difference in the center region.

摘要翻译： 半导体器件包括：中心区域; 外围区域 以及包括具有第一杂质量的第一区域和具有第二杂质量的第二区域的对的半导体层。 第一和第二区域在平面中交替排列。 周边区域包括最外部的和最外部的内周边对。 最外周边对具有第二和第一杂质量之间的差异，其小于周边区域的最大差异。 最大的内周对具有第二和第一杂质量之间的差异，其大于中心区域的差。

公开(公告)号：US20070082455A1

公开(公告)日：2007-04-12

申请号：US11539441

申请日：2006-10-06

申请人： Syouji NOGAMI ,  Tomonori Yamaoka ,  Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takumi Shibata

发明人： Syouji NOGAMI ,  Tomonori Yamaoka ,  Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takumi Shibata

IPC分类号： H01L21/76

CPC分类号： C30B25/165 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/0634

摘要： Closure at the opening of a trench with an epitaxial film is restrained, and thereby, filling morphology in the trenches is improved. A method for manufacturing a semiconductor substrate includes a step for growing an epitaxial layer 11 on the surface of a silicon substrate 13, a step of forming a trench 14 in this epitaxial layer, and a step of filling the inside of the trench 14 with the epitaxial film 12, wherein mixed gas made by mixing halogenoid gas into silicon source gas is circulated as material gas in filling the inside of the trench with the epitaxial film, and when the standard flow rate of the halogenoid gas is defined as Xslm and the film formation speed of the epitaxial film formed by the circulation of the silicon source gas is defined as Yμm/min, in the case when the aspect ratio of the trench is less than 10, an expression Y

摘要翻译： 在具有外延膜的沟槽的开口处的闭合被抑制，从而提高了沟槽中的填充形态。 一种制造半导体衬底的方法包括在硅衬底13的表面上生长外延层11的步骤，在该外延层中形成沟槽14的步骤，以及将沟槽14内部填充的步骤 外延膜12，其中通过将卤素气体混入硅源气体而制成的混合气体作为原料气体循环，用外延膜填充沟槽内部，当将卤化物气体的标准流量定义为Xslm时，膜 通过硅源气体的循环形成的外延膜的形成速度定义为Ymum / min，在沟槽的纵横比小于10的情况下，满足表达式Y <0.2X + 0.10，在 沟槽的纵横比在10以上且小于20的情况下，满足表达式Y <0.2X + 0.05，在沟槽的纵横比为20以上的情况下，表达式Y <0.2× 满意

公开(公告)号：US07170119B2

公开(公告)日：2007-01-30

申请号：US10549151

申请日：2004-08-20

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takashi Suzuki ,  Kyoko Nakashima

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takashi Suzuki ,  Kyoko Nakashima

IPC分类号： H01L29/72

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/7813

摘要： In a vertical type MOSFET device having a super junction structure, in which a N conductive type column region and a P conductive type column region are alternately aligned, regarding to a distance between a terminal end of an active region and a terminal end of a column region, the terminal end of the column region is disposed at a position, which is separated from the active region terminal end by a distance obtained by subtracting a half of a width of the N conductive type column region from a distance corresponding to a depth of the column region. Thus, an electric field concentration at a specific portion in a region facing a narrow side of the column structure is prevented so that a breakdown voltage of the vertical type MOSFET is improved.

摘要翻译： 在具有超结结构的垂直型MOSFET器件中，其中N导电型列区域和P导电型列区域交替排列，关于有源区域的末端和列的末端之间的距离 区域中，列区域的末端设置在与有源区域终端分离距离所获得的距离的位置处，所述距离从对应于N导电型列区域的深度的距离减去所述N导电型列区域的宽度的一半 列区域。 因此，防止了在列结构的窄边的区域中的特定部分处的电场浓度，从而提高了垂直型MOSFET的击穿电压。

公开(公告)号：US20050221547A1

公开(公告)日：2005-10-06

申请号：US11094782

申请日：2005-03-31

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Syouji Nogami ,  Tomonori Yamaoka

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Syouji Nogami ,  Tomonori Yamaoka

IPC分类号： H01L29/06 ,  H01L21/20 ,  H01L21/205 ,  H01L21/336 ,  H01L21/338 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L29/0634 ,  H01L29/7811

摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底中形成沟槽; 以及在包括沟槽的侧壁和底部的衬底上形成外延膜，使得外延膜填充在沟槽中。 形成外延膜的步骤包括在沟槽被外延膜填充之前的最后步骤。 最终步骤具有外延膜的形成条件，使得形成在沟槽的侧壁上的外延膜在沟槽的开口处的生长速率小于沟槽位置处的生长速率， 其比沟槽的开口更深。

公开(公告)号：US20050165836A1

公开(公告)日：2005-07-28

申请号：US10507834

申请日：2002-03-25

申请人： Takashi Suzuki ,  Hitoshi Yamaguchi

发明人： Takashi Suzuki ,  Hitoshi Yamaguchi

IPC分类号： G06F7/00 ,  G06F17/00 ,  G06Q10/00

CPC分类号： G06Q10/06

摘要： The present invention relates to an administration method for solid materials and, particularly, to an administration method for reusable building materials. In an administration server for administering solid materials affixed with specific serial numbers, the method comprises the steps of constructing a database storing the serial numbers and pieces of history information of the solid materials in one-to-one correspondence with the serial numbers for reusable solid materials, receiving information specifying a structure to be built by the solid materials from a user terminal accessible via a network, specifying all parts necessary to build the structure, and selecting the solid materials corresponding to the parts from the database.

摘要翻译： 本发明涉及固体材料的施用方法，特别涉及可重复使用的建筑材料的施用方法。 在用于管理以特定序列号附加的固体材料的管理服务器中，该方法包括以下步骤：将可固化材料的序列号和历史信息片段与可重复使用的固体的序列号一一对应地存储 材料，接收指定由可通过网络访问的用户终端由固体材料构建的结构的信息，指定构建结构所需的所有部分，以及从数据库中选择与该部分相对应的固体材料。

公开(公告)号：US20050035401A1

公开(公告)日：2005-02-17

申请号：US10950526

申请日：2004-09-28

申请人： Hitoshi Yamaguchi ,  Yoshiyuki Hattori

发明人： Hitoshi Yamaguchi ,  Yoshiyuki Hattori

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/78 ,  H01L33/00

CPC分类号： H01L29/7813 ,  H01L29/0634

摘要： A semiconductor device includes: an n+ type drain region; an n type drift region that connects with the n+ type drain region; a p type body region; a n+ type source region that connects with the p type body region; and a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the p type body region. The semiconductor further includes: a p type silicon region that adjoins the n type drift region; and an n type silicon region provided in a region almost including a carrier passage that connects the n type drift region and the p type body region. Here, the p type silicon region and the p type body region directly connect with each other.

摘要翻译： 半导体器件包括：n +型漏极区域; 与n +型漏极区连接的n型漂移区; p型体区; 与p型体区域连接的n +型源极区域; 以及栅极电极，其被栅极绝缘膜覆盖在穿过p​​型体区域的栅极沟槽中。 半导体还包括：邻接n型漂移区的p型硅区; 以及设置在几乎包括连接n型漂移区域和p型体区域的载体通道的区域中的n型硅区域。 这里，p型硅区域和p型体区域直接连接。