摘要:
A digital switch module for a time division digital switching system includes an encoding law conversion memory and a control memory. The encoding law conversion memory has previously stored therein conversion data for converting between different types of encoding laws. For example, the A-law and .mu.-law encoding laws set forth in CCITT Recommendation G.711 can be converted by a digital switch module according to the present invention. The encoding law conversion memory includes a read only memory having regions for conversion between A-law and .mu.-law encoded data and for nonconversion of both A-law and .mu.-law encoded data. The control memory designates which of the regions in the encoding law conversion memory is to be used during each time slot, thus dynamically controlling whether data passing through the digital switch module is converted or not. The type of conversion or nonconversion designated by the control memory can be determined by the type of data, e.g., digitized voice signals may require conversion but non-voice signals will not be converted, and the channel path of the data, for example from an A-law encoded system to a .mu.-law encoded system.
摘要:
The antibacterial compounds 7-deazaadenosine and 7-deazinosine are produced by fermentation of a new microorganism of the genus Micromonospora. At least one of the active substances is isolated from the culture medium.
摘要:
New antibacterial compounds, XK-62-3 and XK-62-4, are produced by fermentation of microorganisms belonging to the genus Micromonospora. The compounds are accumulated in the culture liquor and are isolated therefrom.
摘要:
The antibiotic XK-62-2 is produced by fermentation of microorganisms belonging to the genus Micromonospora. The antibiotic is accumulated in the culture liquor and is isolated therefrom.
摘要:
A new antibiotic, Fortimicin B, is produced by fermentation of a microorganism belonging to the genus Micromonospora. The antibiotic is accumulated in the culture medium and is isolated therefrom.
摘要:
A color image forming apparatus including: an image forming section which forms an image based on image information on an image carrier provided in the image forming section; a detection section which detects a print mark for color misalignment correction formed on the image carrier by the image forming section, and outputs print mark detection information; and a control section for executing color misalignment correction control based on the print mark detection information outputted from the detection section, wherein, the control section obtains a trend of a color misalignment amount of the print mark by statistically processing data of the result of the print mark detection, calculates an execution timing of color misalignment correction base on the obtained trend, and executes the color misalignment correction at the calculated execution timing.
摘要:
A tandem type color image forming apparatus which executes color misregistration correction, including: a detecting section which detects a width of a transfer sheet; an image forming section having an image carrier, on which arranged side by side are an image area where formed is an image for transfer and a non-image area where formed is the imprint image; and a control section which selects a complex or a single correction mode based on the transfer sheet width, to execute correction processing; where the complex correction mode is an operation mode of forming in parallel the image for transfer in the image area and the imprint image in the non-image area, and the single correction mode is an operation mode of suspending to form the image for transfer in the image area, and executing only to form the imprint image in the non-image area or in the image area.
摘要:
In order to generate a sampling clock having a higher accuracy, a synchronous signal generating circuit is provided with a phase error detector, detecting a phase error of a read out signal digitized on the basis of FDTS algorithm, and a VCO, controlling an oscillation frequency on the basis of a phase error detected by the phase error detector, to generate a synchronous signal by the VCO. On the basis of the synchronous signal generated by the synchronous signal generating circuit, an ADC digitizes the read out signal. The digitized read out signal is then converted to binary data by a detection circuit.
摘要:
In order to generate a sampling clock having a higher accuracy, a synchronous signal generating circuit is provided with a phase error detector, detecting a phase error of a read out signal digitized on the basis of FDTS algorithm, and a VCO, controlling an oscillation frequency on the basis of a phase error detected by the phase error detector, to generate a synchronous signal by the VCO. On the basis of the synchronous signal generated by the synchronous signal generating circuit, an ADC digitizes the read out signal. The digitized read out signal is then converted to binary data by a detection circuit.
摘要:
A transconductance control circuit is composed of a replica transconductance amplifier and resistance, a reference voltage source, first selectors, a differential amplifier, a voltage-current translate circuit with characteristics equal to the transconductance amplifier which constitutes analog filters. A first switch of the first selectors is connectable for the reference voltage source, and every constant period is made to connect it using clocks at the reference voltage source. A second switch of second selectors is connectable for plural capacitors, and every constant period is made to connect it using clocks at the capacitors.