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101 条记录 (耗时 0.04 秒)

    Nonvolatile memory system
    61.
    发明授权
    Nonvolatile memory system 失效
    非易失性存储器系统

    公开(公告)号：US07447936B2

    公开(公告)日：2008-11-04

    申请号：US11583156

    申请日：2006-10-19

    申请人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara ,  Kinji Mitani

    发明人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara ,  Kinji Mitani

    IPC分类号： G06F11/00

    CPC分类号： G11C16/349

    摘要： A memory system permitting a number of alternative memory blocks to be made ready in order to extend the rewritable life and thereby contributing to enhanced reliability of information storage is to be provided. The memory system is provided with a nonvolatile memory having a plurality of data blocks in predetermined physical address units and a controller for controlling the nonvolatile memory in response to an access request from outside. Each of the data blocks has areas for holding a rewrite count and error check information regarding each data area. The controller, in a read operation on the nonvolatile memory, checks for any error in the area subject to the read according to error check information and, when there is any error, if the rewrite count is greater than a predetermined value, will replace the pertinent data block with another data block or if it is not greater, correct data in the data block pertaining to the error.

    摘要翻译： 提供允许许多替代存储器块准备好以延长可重写寿命并由此有助于提高信息存储的可靠性的存储器系统。 该存储器系统具有非易失性存储器，该非易失性存储器具有预定物理地址单元中的多个数据块，以及用于响应于来自外部的访问请求来控制该非易失性存储器的控制器。 每个数据块具有用于保存关于每个数据区的重写计数和错误检查信息的区域。 控制器在非易失性存储器中的读取操作中，根据错误检查信息检查受读取区域的任何错误，并且当存在任何错误时，如果重写计数大于预定值，则将替换 与另一个数据块相关的数据块，或者如果不大于数据块，则与错误相关的数据块中的数据正确。

    Nonvolatile memory
    65.
    发明申请
    Nonvolatile memory 审中-公开
    非易失性存储器

    公开(公告)号：US20080046780A1

    公开(公告)日：2008-02-21

    申请号：US11907213

    申请日：2007-10-10

    申请人： Hirofumi Shibuya ,  Fumio Hara ,  Hiroyuki Goto ,  Shigemasa Shiota

    发明人： Hirofumi Shibuya ,  Fumio Hara ,  Hiroyuki Goto ,  Shigemasa Shiota

    IPC分类号： G06F11/16

    CPC分类号： G06F11/1666 ,  G06F11/004 ,  G06F11/20 ,  G06F11/2053 ,  G11C16/04 ,  G11C29/44 ,  G11C29/4401 ,  G11C29/76 ,  G11C2029/0407 ,  G11C2029/0409 ,  G11C2229/723

    摘要： It is aimed to detect, notify, and save an abnormal area in semiconductor memory for greatly improving reliability. An inside of semiconductor memories provided for a memory card comprises a user area, a substitution area, an area substitution information storage area, and a management area. An inside of semiconductor memories comprises a user area, a substitution area, and a management area. The user area is a data area a user can use. The substitution area is substituted when an error occurs in the user area. The area substitution information storage area stores area substitution area information. The management area stores substitution information. The information processing section performs substitution on two levels as follows. When detecting an operation indicating a symptom of failure in a semiconductor memory area, the information processing section performs area substitution during an idle state of the memory card. When detecting a faulty operation in an area, the information processing section immediately performs area substitution.

    摘要翻译： 旨在检测，通知和保存半导体存储器中的异常区域，大大提高可靠性。 提供给存储卡的半导体存储器的内部包括用户区域，替换区域，区域替换信息存储区域和管理区域。 半导体存储器的内部包括用户区域，替代区域和管理区域。 用户区域是用户可以使用的数据区域。 当用户区域发生错误时，替换区域被替换。 区域替换信息存储区域存储区域替换区域信息。 管理区域存储替换信息。 信息处理部分按如下两个级别执行替换。 当检测到指示半导体存储器区域中的故障症状的操作时，信息处理部件在存储卡的空闲状态期间执行区域替换。 当检测到区域中的故障操作时，信息处理部分立即进行区域替换。

    Nonvolatile memory system
    67.
    发明授权
    Nonvolatile memory system 有权
    非易失性存储器系统

    公开(公告)号：US07280416B2

    公开(公告)日：2007-10-09

    申请号：US11450435

    申请日：2006-06-12

    申请人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara

    发明人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara

    IPC分类号： G11C7/00

    CPC分类号： G06F13/385 ,  G11C5/14 ,  G11C7/24

    摘要： The invention is directed to largely improve reliability by surely protecting data on the basis of an emergency stop request even during a data transfer process. The invention provides a data memory system taking the form of a memory card or the like. When an emergency stop signal requesting an emergency stop is received from an information processor of a host during a read/write data transfer process, a control circuit immediately stops the transfer process and notifies the information processor of end of the read data transfer. At this time, the end of read data transfer is notified irrespective of whether the transfer is finished normally or abnormally. Even when a read data transfer request is received again from the information processor after notifying the information processor of the end of read data transfer, without transferring data, a controller notifies the information processor of an untransferable state of read data.

    摘要翻译： 本发明旨在通过在数据传送过程中即使基于紧急停止请求来确保数据的保护来大大提高可靠性。 本发明提供一种采用存储卡等形式的数据存储系统。 在读/写数据传送处理期间，当从主机的信息处理器接收到请求紧急停止的紧急停止信号时，控制电路立即停止传送处理，并向信息处理器通知读取的数据传送结束。 此时，无论传输是正常还是异常地完成，都会通知读取数据传输的结束。 即使当在通知信息处理器之后再次从信息处理器接收到读取数据传送的结束而不传送数据时，控制器向信息处理器通知读取数据的不可转移的状态。

    Audio player
    68.
    发明授权
    Audio player 有权
    音频播放器

    公开(公告)号：US07248548B2

    公开(公告)日：2007-07-24

    申请号：US11498756

    申请日：2006-08-04

    申请人： Seigo Suguta ,  Ichiro Kawashima ,  Hiroyuki Goto

    发明人： Seigo Suguta ,  Ichiro Kawashima ,  Hiroyuki Goto

    IPC分类号： G11B15/52 ,  G06F17/00

    CPC分类号： G11B27/3063 ,  G11B27/034 ,  G11B27/10 ,  G11B2220/2545

    摘要： When underflow of a sub-Q data table occurs, a sub-Q data processing section does not read and output sub-Q data but outputs only audio data. Moreover, to achieve consistency between audio data and the sub-Q data in terms of buffer management, an input processing section includes respective counters for managing respective input data amounts of the audio data and the sub-Q data. Then, the input processing section executes management so that overflow and underflow of the sub-Q data table are suppressed as much as possible and a switch changes an IEC output mode at a time of audio processing and a time of dubbing. Thus, sound deterioration, and error recording in equipment to which the audio player is connected, and the like can be prevented.

    摘要翻译： 当发生子Q数据表的下溢时，子Q数据处理部分不读取并输出子Q数据，而仅输出音频数据。 此外，为了在缓冲器管理方面实现音频数据和子Q数据之间的一致性，输入处理部分包括用于管理音频数据和子Q数据的相应输入数据量的各个计数器。 然后，输入处理部分执行管理，使得尽可能地抑制子Q数据表的上溢和下溢，并且开关在音频处理时和转录时改变IEC输出模式。 因此，可以防止音频播放器连接的设备中的声音劣化和错误记录等。

    Memory system with parallel data transfer between host, buffer and flash memory
    69.
    发明授权
    Memory system with parallel data transfer between host, buffer and flash memory 有权
    主机，缓冲器和闪存之间并行数据传输的内存系统

    公开(公告)号：US07206233B2

    公开(公告)日：2007-04-17

    申请号：US11082859

    申请日：2005-03-18

    申请人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara ,  Yasuhiro Nakamura

    发明人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara ,  Yasuhiro Nakamura

    IPC分类号： G11C7/10

    CPC分类号： G06F12/0246 ,  G06F13/161 ,  G06F13/1673 ,  G06F2212/7206 ,  G11C7/1006

    摘要： A memory system is provided which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner.

    摘要翻译： 提供了一种存储系统，其有助于提高伴随存储器访问的数据处理的效率。 存储器系统具有可重写非易失性存储器，缓冲存储器和控制器。 控制器响应于来自外部设备的访问请求控制控制器和外部设备之间的第一数据传输，控制器和非易失性存储器之间的第二数据传输以及控制器和缓冲存储器之间的第三数据传送，控制 在第三次数据传送中从控制器传送到缓冲存储器，并以时间共享的方式从缓冲存储器传输到控制器，并且能够与第一次数据传送或第二数据传输并行执行 时间分享的方式。

    Nonvolatile memory system
    70.
    发明授权
    Nonvolatile memory system 有权

    公开(公告)号：US07072232B2

    公开(公告)日：2006-07-04

    申请号：US10753527

    申请日：2004-01-09

    申请人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara

    发明人： Shigemasa Shiota ,  Hiroyuki Goto ,  Hirofumi Shibuya ,  Fumio Hara

    IPC分类号： G11C7/00

    CPC分类号： G06F13/385 ,  G11C5/14 ,  G11C7/24

    摘要： The invention is directed to largely improve reliability by surely protecting data on the basis of an emergency stop request even during a data transfer process. The invention provides a data memory system taking the form of a memory card or the like. When an emergency stop signal requesting an emergency stop is received from an information processor of a host during a read/write data transfer process, a control circuit immediately stops the transfer process and notifies the information processor of end of the read data transfer. At this time, the end of read data transfer is notified irrespective of whether the transfer is finished normally or abnormally. Even when a read data transfer request is received again from the information processor after notifying the information processor of the end of read data transfer, without transferring data, a controller notifies the information processor of an untransferable state of read data.