-
公开(公告)号：US07974121B2
公开(公告)日：2011-07-05
申请号：US12967743
申请日：2010-12-14
申请人： Hai Li , Yiran Chen , Harry Hongyue Liu , Henry Huang , Ran Wang
发明人： Hai Li , Yiran Chen , Harry Hongyue Liu , Henry Huang , Ran Wang
CPC分类号： G11C8/08 , G11C11/1659 , G11C11/1675 , G11C13/0028 , G11C13/0069 , G11C2013/0071
摘要： Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction.
摘要翻译： 非易失性存储单元中的写入电流补偿的装置和方法，例如但不限于自旋转矩传递随机存取存储器（STRAM）或电阻随机存取存储器（RRAM）。 根据一些实施例，非易失性存储器单元具有耦合到开关器件的电阻感测元件（RSE），RSE具有硬编程方向和与硬编程方向相反的简单编程方向。 升压电路包括电容器，该电容器将电压加到由电压源向节点提供的标称非零电压以产生暂时提升的电压。 当RSE在硬编程方向编程时，升压电压施加到开关器件。
-
公开(公告)号：US20110058405A1
公开(公告)日：2011-03-10
申请号：US12946582
申请日：2010-11-15
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Ran Wang , Harry Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Ran Wang , Harry Hongyue Liu
CPC分类号： G11C7/062 , G11C11/1673 , G11C11/1693 , G11C13/004 , G11C2013/0057 , G11C2207/063
摘要： Various embodiments of the present invention are generally directed to a method and apparatus for sensing a programmed state of a memory cell, such as a spin-torque transfer random access memory (STRAM) cell. A first read current is applied to the memory cell to generate a first voltage. A second read current is subsequently applied to the memory cell to generate a second voltage, with the second read current being proportional in magnitude to the first read current. A comparison is made between the first and second voltages to determine the programmed state of the memory cell.
摘要翻译： 本发明的各种实施例通常涉及用于感测诸如自旋扭矩传递随机存取存储器（STRAM）单元的存储器单元的编程状态的方法和装置。 将第一读取电流施加到存储器单元以产生第一电压。 随后将第二读取电流施加到存储器单元以产生第二电压，其中第二读取电流在幅度上与第一读取电流成比例。 在第一和第二电压之间进行比较以确定存储器单元的编程状态。
-
公开(公告)号：US07876599B2
公开(公告)日：2011-01-25
申请号：US12398256
申请日：2009-03-05
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Henry Huang , Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Henry Huang , Hongyue Liu
IPC分类号： G11C11/00
CPC分类号： G11C5/025 , G11C11/1653 , G11C11/1673
摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.
摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。
-
公开(公告)号：US07855923B2
公开(公告)日：2010-12-21
申请号：US12426098
申请日：2009-04-17
申请人： Hai Li , Yiran Chen , Harry Hongyue Liu , Henry Huang , Ran Wang
发明人： Hai Li , Yiran Chen , Harry Hongyue Liu , Henry Huang , Ran Wang
CPC分类号： G11C8/08 , G11C11/1659 , G11C11/1675 , G11C13/0028 , G11C13/0069 , G11C2013/0071
摘要： Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction.
摘要翻译： 非易失性存储单元中的写入电流补偿的装置和方法，例如但不限于自旋转矩传递随机存取存储器（STRAM）或电阻随机存取存储器（RRAM）。 根据一些实施例，非易失性存储器单元具有耦合到开关器件的电阻感测元件（RSE），RSE具有硬编程方向和与硬编程方向相反的简单编程方向。 升压电路包括电容器，该电容器将电压加到由电压源向节点提供的标称非零电压以产生暂时提升的电压。 当RSE在硬编程方向编程时，升压电压施加到开关器件。
-
公开(公告)号：US20100110785A1
公开(公告)日：2010-05-06
申请号：US12406356
申请日：2009-03-18
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Ran Wang , Harry Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Ran Wang , Harry Hongyue Liu
CPC分类号： G11C7/062 , G11C11/1673 , G11C11/1693 , G11C13/004 , G11C2013/0057 , G11C2207/063
摘要： Various embodiments of the present invention are generally directed to a method and apparatus for sensing a programmed state of a memory cell, such as a spin-torque transfer random access memory (STRAM) cell. A first read current is applied to the memory cell to generate a first voltage. A second read current is subsequently applied to the memory cell to generate a second voltage, with the second read current being proportional in magnitude to the first read current. A comparison is made between the first and second voltages to determine the programmed state of the memory cell.
摘要翻译： 本发明的各种实施例通常涉及用于感测诸如自旋扭矩传递随机存取存储器（STRAM）单元的存储器单元的编程状态的方法和装置。 将第一读取电流施加到存储器单元以产生第一电压。 随后将第二读取电流施加到存储器单元以产生第二电压，其中第二读取电流在幅度上与第一读取电流成比例。 在第一和第二电压之间进行比较以确定存储器单元的编程状态。
-
公开(公告)号：US20100110763A1
公开(公告)日：2010-05-06
申请号：US12426098
申请日：2009-04-17
申请人： Hai Li , Yiran Chen , Harry Hongyue Liu , Henry Huang , Ran Wang
发明人： Hai Li , Yiran Chen , Harry Hongyue Liu , Henry Huang , Ran Wang
IPC分类号： G11C11/00 , G11C11/14 , G11C8/08 , G11C11/416
CPC分类号： G11C8/08 , G11C11/1659 , G11C11/1675 , G11C13/0028 , G11C13/0069 , G11C2013/0071
摘要： Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction.
摘要翻译： 非易失性存储单元中的写入电流补偿的装置和方法，例如但不限于自旋转矩传递随机存取存储器（STRAM）或电阻随机存取存储器（RRAM）。 根据一些实施例，非易失性存储器单元具有耦合到开关器件的电阻感测元件（RSE），RSE具有硬编程方向和与硬编程方向相反的简单编程方向。 升压电路包括电容器，该电容器将电压加到由电压源向节点提供的标称非零电压以产生暂时提升的电压。 当RSE在硬编程方向编程时，升压电压施加到开关器件。
-
公开(公告)号：US20100110760A1
公开(公告)日：2010-05-06
申请号：US12390728
申请日：2009-02-23
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Henry Huang , Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Henry Huang , Hongyue Liu
IPC分类号： G11C11/00 , G11C11/416 , G11C7/00 , G11C11/24
CPC分类号： G11C13/004 , G11C11/1673 , G11C27/02 , G11C2013/0057 , G11C2207/2254
摘要： Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.
摘要翻译： 描述了自参考读取方法的电阻记忆校准。 读取电阻性存储器单元的一种自参考方法包括将多个电阻存储器单元设置为第一电阻数据状态。 电阻存储器单元形成存储器阵列。 通过施加第一读取电流和第二读取电流通过每个电阻性存储器单元，然后比较由第一读取电流和第二读取电流形成的电压，来为每个电阻性存储器单元读取感测的电阻数据状态，以确定感测的电阻数据状态 每个电阻存储器单元。 然后，该方法包括调整每个电阻性存储器单元的第一或第二读取电流，读取电压或存储器件电容，其中感测的电阻数据状态与第一电阻数据状态不同，直到感测的电阻数据状态相同 作为第一电阻数据状态。
-
公开(公告)号：US20100095052A1
公开(公告)日：2010-04-15
申请号：US12482693
申请日：2009-06-11
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Yuan Yan , Harry Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Yuan Yan , Harry Hongyue Liu
CPC分类号： G06F3/061 , G06F3/0655 , G06F3/0688 , G06F12/0246 , G06F2212/2024 , G06F2212/205 , G06F2212/225 , G06F2212/7202
摘要： Various embodiments of the present invention are generally directed to an apparatus and associated method for updating data in a non-volatile memory array. In accordance with some embodiments, a memory block is formed with a plurality of types of memory cell sectors arranged in data pages of a first type and log pages of a second type that can be updated in-place. A first updated sector is written to a first log page while maintaining an outdated sector in an original data page, and overwritten with a second updated sector.
摘要翻译： 本发明的各种实施例通常涉及用于更新非易失性存储器阵列中的数据的装置和相关联的方法。 根据一些实施例，存储器块形成有布置在第一类型的数据页中的多种类型的存储器单元扇区和可以就地更新的第二类型的日志页。 将第一更新的扇区写入第一日志页面，同时保持原始数据页面中的过时扇区，并被第二更新扇区覆盖。
-
公开(公告)号：US09128821B2
公开(公告)日：2015-09-08
申请号：US12482693
申请日：2009-06-11
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Yuan Yan , Harry Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Yuan Yan , Harry Hongyue Liu
CPC分类号： G06F3/061 , G06F3/0655 , G06F3/0688 , G06F12/0246 , G06F2212/2024 , G06F2212/205 , G06F2212/225 , G06F2212/7202
摘要： Various embodiments of the present invention are generally directed to an apparatus and associated method for updating data in a non-volatile memory array. In accordance with some embodiments, a memory block is formed with a plurality of types of memory cell sectors arranged in data pages of a first type and log pages of a second type that can be updated in-place. A first updated sector is written to a first log page while maintaining an outdated sector in an original data page, and overwritten with a second updated sector.
摘要翻译： 本发明的各种实施例通常涉及用于更新非易失性存储器阵列中的数据的装置和相关联的方法。 根据一些实施例，存储器块形成有布置在第一类型的数据页中的多种类型的存储器单元扇区和可以就地更新的第二类型的日志页。 将第一更新的扇区写入第一日志页面，同时保持原始数据页面中的过时扇区，并被第二更新扇区覆盖。
-
公开(公告)号：US08213215B2
公开(公告)日：2012-07-03
申请号：US13015085
申请日：2011-01-27
申请人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Henry Huang , Hongyue Liu
发明人： Yiran Chen , Hai Li , Wenzhong Zhu , Xiaobin Wang , Henry Huang , Hongyue Liu
CPC分类号： G11C13/004 , G11C11/1673 , G11C27/02 , G11C2013/0057 , G11C2207/2254
摘要： Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.
摘要翻译： 描述了自参考读取方法的电阻记忆校准。 读取电阻性存储器单元的一种自参考方法包括将多个电阻存储器单元设置为第一电阻数据状态。 电阻存储器单元形成存储器阵列。 通过施加第一读取电流和第二读取电流通过每个电阻性存储器单元，然后比较由第一读取电流和第二读取电流形成的电压，来为每个电阻性存储器单元读取感测的电阻数据状态，以确定感测的电阻数据状态 每个电阻存储器单元。 然后，该方法包括调整每个电阻性存储器单元的第一或第二读取电流，读取电压或存储器件电容，其中感测的电阻数据状态与第一电阻数据状态不同，直到感测的电阻数据状态相同 作为第一电阻数据状态。
-
-
-
-
-
-
-
-
-
搜索结果
183 条记录 (耗时 0.028 秒)
