公开(公告)号：US07733207B2

公开(公告)日：2010-06-08

申请号：US12053716

申请日：2008-03-24

申请人： Ho Gyeong Yun ,  Kwang Seong Choi ,  Jong Tae Moon

发明人： Ho Gyeong Yun ,  Kwang Seong Choi ,  Jong Tae Moon

IPC分类号： H01F5/00 ,  H01F21/02 ,  H01F27/28

CPC分类号： H01F17/0013 ,  H01F17/0033 ,  H01F27/34 ,  H01F2017/002

摘要： Provided are an inductor, which is vertically formed, and an electronic device having the inductor, and more particularly, an inductor capable of minimizing loss of a surface area and accomplishing high efficiency impedance by vertically forming the inductor in a plurality of insulating layers, and an electronic device having the same. The inductor includes a plurality of conductive lines disposed in the insulating layers; and vias vertically formed in the insulating layers to electrically connect the plurality of conductive lines. When a board or an electronic device including an inductor proposed by the present invention is manufactured, the inductor can occupy a minimum area in the electronic device or board while providing high inductance. In particular, the surface area of the electronic device or board occupied by the inductor can be remarkably decreased to reduce manufacturing costs.

摘要翻译： 提供了一种垂直形成的电感器，以及具有电感器的电子器件，更具体地说，一种电感器，其能够通过在多个绝缘层中垂直形成电感器来最小化表面积的损失并实现高效率阻抗，以及 具有该电子设备的电子设备。 电感器包括布置在绝缘层中的多条导线; 以及在绝缘层中垂直形成的通孔，以电连接多条导线。 当制造包括由本发明提出的电感器的电路板或电子设备时，电感器可以在提供高电感的同时占据电子设备或电路板中的最小面积。 特别地，电感器占用的电子设备或板的表面积可以显着降低，从而降低制造成本。

公开(公告)号：US20100127812A1

公开(公告)日：2010-05-27

申请号：US12696472

申请日：2010-01-29

申请人： Tomoyuki Maeda

发明人： Tomoyuki Maeda

IPC分类号： H01F5/00

CPC分类号： H01F5/003 ,  H01F3/08 ,  H01F17/0013 ,  H01F27/34 ,  H01F2017/002 ,  H01F2017/0066

摘要： A chip-type coil component capable of reducing the resistance of the coil while minimizing a decrease in the inductance of the coil includes magnetic layers composed of a multilayer body. The chip-type coil component further includes internal electrodes laminated on the magnetic layers. The internal electrodes are connected to each other to form a coil. The chip-type coil component further includes an auxiliary internal electrode laminated on each of the magnetic layers. Each auxiliary internal electrode is connected in parallel to the internal electrode laminated on the magnetic layer that is different from the magnetic layer on which the auxiliary internal electrode is laminated.

摘要翻译： 能够使线圈的电感降低最小化的能够降低线圈电阻的芯片型线圈部件包括由多层体构成的磁性层。 芯片型线圈部件还包括层叠在磁性层上的内部电极。 内部电极彼此连接以形成线圈。 芯片型线圈部件还包括层叠在每个磁性层上的辅助内部电极。 每个辅助内部电极与层叠在磁性层上的不同于层叠有辅助内部电极的磁性层的内部电极并联连接。

公开(公告)号：US07714688B2

公开(公告)日：2010-05-11

申请号：US11334051

申请日：2006-01-18

申请人： Gheorghe Korony ,  Robert H. Heistand, II

发明人： Gheorghe Korony ,  Robert H. Heistand, II

IPC分类号： H01F5/00

CPC分类号： H01F41/041 ,  H01F17/0006 ,  H01F27/34 ,  H01F2017/0046 ,  H01F2021/125

摘要： Disclosed is methodology and apparatus for producing a planar inductor having a high quality (Q) factor. The inductor is formed by providing a first, relatively wide coil turn, and at least a pair of relatively more narrow second coil turns, displaced in a different plane from that occupied by the first coil turn. The configuration of such coil turns produces a high value of mutual coupling among the coil turns, resulting in an inductor having a high quality (Q) factor.

摘要翻译： 公开了用于生产具有高质量（Q）因子的平面电感器的方法和装置。 电感器通过提供第一相对较宽的线圈匝和至少一对相对较窄的第二线圈匝来形成，第二线圈匝在与第一线圈匝所占据的平面不同的平面内移位。 这种线圈匝的配置在线匝之间产生高的互耦值，导致具有高质量（Q）因子的电感器。

公开(公告)号：US07616085B2

公开(公告)日：2009-11-10

申请号：US12128470

申请日：2008-05-28

申请人： Tomokazu Ito ,  Takeshi Okumura

发明人： Tomokazu Ito ,  Takeshi Okumura

IPC分类号： H01F5/00

CPC分类号： H01F17/0013 ,  H01F19/04 ,  H01F27/006 ,  H01F27/292 ,  H01F27/34 ,  H01F2017/0066 ,  H01F2017/0093

摘要： A common mode choke coil includes two laminated coil conductors, a first magnetic substrate arranged on one of the coil conductors, and a second magnetic substrate arranged on the other coil conductor. When it is assumed that a distance from a conductor center of the one coil conductor to the surface of the first magnetic substrate is designated as A, a distance from a conductor center of the other coil conductor to the surface of the second magnetic substrate is designated as B, and a distance from the conductor center of the one coil conductor to the conductor center of the other coil conductor is designated as C, C

摘要翻译： 共模扼流线圈包括两个层叠线圈导体，布置在一个线圈导体上的第一磁性基板和布置在另一个线圈导体上的第二磁性基板。 当假设从一个线圈导体的导体中心到第一磁性基板的表面的距离被指定为A时，指定从另一个线圈导体的导体中心到第二磁性基板的表面的距离 作为B，并且从一个线圈导体的导体中心到另一个线圈导体的导体中心的距离被指定为C，则满足C <（A + B）/ 2。 因此，由于磁性基板和线圈导体之间的距离的差异变得相对较小，所以由于距离差导致的漏电感减小，并且能够提高相对于差分模式信号的截止频率。

公开(公告)号：US07573081B2

公开(公告)日：2009-08-11

申请号：US11519103

申请日：2006-09-11

申请人： Lap Chan ,  Kok Wai Johnny Chew ,  Cher Liang Cha ,  Chee Tee Chua

发明人： Lap Chan ,  Kok Wai Johnny Chew ,  Cher Liang Cha ,  Chee Tee Chua

IPC分类号： H01L29/78

CPC分类号： H01L21/76834 ,  H01F3/14 ,  H01F17/0006 ,  H01F27/34 ,  H01F41/041 ,  H01F41/045 ,  H01L21/764 ,  H01L21/7682 ,  H01L23/5227 ,  H01L23/53295 ,  H01L27/08 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A new method is provided for creating an inductor on the surface of a silicon substrate. The invention provides overlying layers of oxide fins beneath a metal inductor. The oxide fins provide the stability support for the overlying metal inductor while also allowing horizontal air columns to simultaneously exist underneath the inductor. Overlying layers of air cavities that are spatially inserted between the created overlying layers of oxide fins can be created under the invention by repetitive application of the mask used. The presence of the air wells on the surface of the substrate significantly reduces parasitic capacitances and series resistance of the inductor associated with the substrate.

摘要翻译： 提供了一种在硅衬底的表面上形成电感器的新方法。 本发明提供金属电感器下面的氧化物鳍片的覆盖层。 氧化物鳍片为上覆的金属电感器提供了稳定的支持，同时也允许水平空气柱同时存在于电感器下面。 通过重复施用所使用的掩模，可以在本发明的基础上产生空间上插入在所产生的氧化物翅片的覆盖层之间的空腔的覆盖层。 衬底表面上的空穴的存在显着降低了与衬底相关联的电感器的寄生电容和串联电阻。

公开(公告)号：US07564334B2

公开(公告)日：2009-07-21

申请号：US11857384

申请日：2007-09-18

申请人： Arthur B. Odell ,  Chan Woong Park

发明人： Arthur B. Odell ,  Chan Woong Park

IPC分类号： H01F27/28

CPC分类号： H02M3/00 ,  H01F17/043 ,  H01F27/306 ,  H01F27/34 ,  H01F27/341 ,  H01F27/38 ,  H01F27/385 ,  H01F29/02 ,  H01F30/06 ,  H01F30/10 ,  H01F38/42 ,  H01F2038/026 ,  H02M1/44 ,  H02M3/335

摘要： A transformer having input and output windings. A sample transformer includes an input winding wound around a core. The input winding has a first end and a second end. An output winding is also wound around the core. The output winding has a first end and a second end. The input winding is capacitively coupled to the output winding to provide a transfer of energy from the input winding to the output winding. A balancing winding is also wound around the core. The balancing winding has a first end and a second end. The first end of the balancing winding is electrically coupled to the first end of the input winding. The second end of the balancing winding is uncoupled such that a dot polarity of the balancing winding is to oppose an electrostatic field to be generated by the input winding relative to the output winding.

摘要翻译： 具有输入和输出绕组的变压器。 样品变压器包括缠绕在芯上的输入绕组。 输入绕组具有第一端和第二端。 输出绕组也缠绕在芯上。 输出绕组具有第一端和第二端。 输入绕组电容耦合到输出绕组，以提供从输入绕组到输出绕组的能量传递。 平衡绕组也缠绕在芯上。 平衡绕组具有第一端和第二端。 平衡绕组的第一端电耦合到输入绕组的第一端。 平衡绕组的第二端分离，使得平衡绕组的点极性相对于由输入绕组相对于输出绕组产生的静电场。

公开(公告)号：US20090179724A1

公开(公告)日：2009-07-16

申请号：US12093585

申请日：2006-10-10

申请人： Kan Sano ,  Tsutomu Watanabe

发明人： Kan Sano ,  Tsutomu Watanabe

IPC分类号： H01F17/04

CPC分类号： H01F37/00 ,  H01F17/045 ,  H01F19/04 ,  H01F27/2823 ,  H01F27/288 ,  H01F27/292 ,  H01F27/34

摘要： The invention is to provide an inductor which can flow a high frequency current and a large current. An inductor for a power source used in a power source circuit flowing a current larger than a current in an inductor for signal transmission comprises a core provided with a center core for winding and a coil provided with the centre core and a conductive member wound around the center core. A frequency band of a current applied to the coil is from 5 MHz to 10 MHz and a frequency ratio of a standard frequency lower than the used frequency band to the used frequency band is approximately equal to an alternative current resistance ratio of an alternative current resistance at the standard frequency to an alternative current resistance at the used frequency band.

摘要翻译： 本发明提供一种能够流过高频电流和大电流的电感器。 用于在电流源中流过大于电流的电流的电源的电源用于信号传输的电感器包括设置有用于绕组的中心磁芯和设置有中心磁心的线圈和围绕 中心核心。 施加到线圈的电流的频带为5MHz至10MHz，并且与使用频带相比低于使用频带的标准频率的频率比近似等于替代电流电阻的替代电流电阻比 在标准频率下使用频带处的替代电流电阻。

公开(公告)号：US20090027152A1

公开(公告)日：2009-01-29

申请号：US12218670

申请日：2008-07-17

申请人： Frederic Gianesello

发明人： Frederic Gianesello

IPC分类号： H01F27/28

CPC分类号： H01F17/0013 ,  H01F27/34 ,  H01F2021/125 ,  H01L23/5227 ,  H01L2924/0002 ,  H01L2924/00

摘要： An inductance formed in a stacking of insulating layers, the inductance comprising first and second half-turns, each first half-turn being at least partly symmetrical to one of the second half-turns, the first half-turns being distributed in first groups of first half-turns at least partly aligned along the insulating layer stacking direction and the second half-turns being distributed in second groups of second half-turns at least partly aligned along the insulating layer stacking direction. For any pair of first adjacent half-turns of a same group, one of the first half-turns in the pair is electrically series-connected to the other one of the first half-turns in the pair by a single second half turn and for each pair of second adjacent half-turns of a same group, one of the second half-turns in the pair is electrically series-connected to the other one of the second half-turns in the pair by a single first half-turn.

摘要翻译： 电感形成在绝缘层的层叠中，电感包括第一和第二半匝，每个前半匝至少部分地与第二匝之一对称，第一匝分布在第一组中 所述第一半匝至少部分地沿所述绝缘层层叠方向排列，并且所述第二半匝分布在沿所述绝缘层堆叠方向至少部分对准的第二组第二半匝中。 对于相同组的任何一对第一相邻半匝，该对中的第一半匝之一中的一个第一半匝中的一个与该对中的另一个第一半匝电连接单个第二半匝，并且对于 同一组中的每对第二相邻半匝，该对中的第二半匝中的一个通过单个第一半匝电连接到该对中的另一个第二半匝。

公开(公告)号：US07474190B2

公开(公告)日：2009-01-06

申请号：US11657249

申请日：2007-01-24

申请人： Bernhard Strzalkowski ,  Martin Feldtkeller

发明人： Bernhard Strzalkowski ,  Martin Feldtkeller

IPC分类号： H01F5/00

CPC分类号： H01F27/2804 ,  H01F27/34 ,  H01F2027/2819

摘要： A component arrangement has a semiconductor body, a dielectric layer and a planar transformer. The semiconductor body includes a face. The planar transformer includes a primary winding, a first planar winding section, and a second planar winding section, each vertically spaced apart from each other. The first planar winding section forms at least a part of the secondary winding and has a first connection forming a first connection of the secondary winding. The dielectric layer is positioned on the face and isolates the primary winding from the first planar winding section. The second planar winding section is disposed between the first planar winding section and the primary winding.

摘要翻译： 元件布置具有半导体本体，电介质层和平面变压器。 半导体主体包括一个面。 平面变压器包括彼此垂直间隔开的初级绕组，第一平面绕组部分和第二平面绕组部分。 第一平面绕组部分形成次级绕组的至少一部分，并且具有形成次级绕组的第一连接的第一连接。 介电层位于表面上，并将初级绕组与第一平面绕组部隔离。 第二平面绕组部分设置在第一平面绕组部分和初级绕组之间。

公开(公告)号：US07463461B2

公开(公告)日：2008-12-09

申请号：US11393569

申请日：2006-03-30

申请人： Chan-Joo Lee ,  Bok-Yeol Seok

发明人： Chan-Joo Lee ,  Bok-Yeol Seok

IPC分类号： H02H7/00

CPC分类号： H02H9/023 ,  H01F6/06 ,  H01F27/34 ,  H01F2006/001 ,  H01L39/16 ,  Y02E40/69

摘要： A superconducting fault current limiter includes a first superconducting module connected to an input terminal of a power system, a second superconducting module connected to an output terminal of the power system, and a connecting member interposed between the first and second superconducting modules. The first superconducting module and the second superconducting module each include two superconducting coils. The input terminal is connected to an end of the first superconducting module, and the output terminal is connected to an end of the second superconducting module. The end of the second superconducting module is disposed geometrically opposite the end of the first superconducting module.

摘要翻译： 超导故障电流限制器包括连接到电力系统的输入端子的第一超导模块，连接到电力系统的输出端子的第二超导模块以及插在第一和第二超导模块之间的连接构件。 第一超导模块和第二超导模块各自包括两个超导线圈。 输入端子连接到第一超导模块的一端，并且输出端子连接到第二超导模块的一端。 第二超导模块的端部设置成与第一超导模块的端部几何相对。