Abstract:
The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) superconducting components; (2) heat sources, each coupled to a corresponding superconducting component and configured to selectively provide heat to that component; and (3) a current source coupled to the superconducting components and configured to selectively provide: (a) a first current to bias the components such that combination of the first current and heat from any heat source causes the components to transition to a non-superconducting state; and (b) a second current to bias the components such that (i) combination of the second current and heat from each heat source causes the components to transition to the non-superconducting state, and (ii) a combination of the second current and heat from only a subset of the heat sources does not cause the components to transition to the non-superconducting state.
Abstract:
An integrated, superconducting imaging sensor may be formed from a single, meandering nanowire. The sensor is capable of single-photon (or single-event) detection and imaging with ˜10 micron spatial resolution and sub-100-picosecond temporal resolution. The sensor may be readily scaled to large areas.
Abstract:
A method for operating a superconducting device (1; 1a, 1b), having a coated conductor (2) with a substrate (3) and a quenchable superconducting film (4), wherein the coated conductor (2) has a width W and a length L, is characterized in that 0.5≦L/W≦10, in particular 0.5≦L/W≦8, and that the coated conductor (2) has an engineering resistivity ρeng shunting the superconducting film (4) in a quenched state, with ρeng>2.5 Ω, wherein RIntShunt=ρeng*L/W, with RIntShunt: internal shunt resistance of the coated conductor (2). The risk of a burnout of a superconducting device in case of a quench in its superconducting film is thereby further reduced to such an extent that the device can be operated without use of an additional external shunt.
Abstract:
Described is a superconductive layered structure and an article including this superconductive layered structure on a substrate structure. The superconductive layered structure comprises a stack including at least one bi-layered assembly formed by first and second layers of similar superconducting material compositions, the second layer being superconductive at predetermined temperature condition, the first layer being a substantially thin layer and having a c lattice parameter selected in accordance with those of the substrate structure and the second layer, such that said first layer is non-superconductive at said predetermined temperature condition thereby allowing the second superconductive layer to be desirably thick to provide high critical current density of the superconductive layer.
Abstract:
An integrated superconductor device may include a substrate base and an intermediate layer disposed on the substrate base and comprising a preferred crystallographic orientation. The integrated superconductor device may further include an oriented superconductor layer disposed on the intermediate layer and a conductive strip disposed on a portion of the oriented superconductor layer, The conductive strip may define a superconductor region of the oriented superconductor layer thereunder, and an exposed region of the oriented superconductor layer adjacent the superconductor region.
Abstract:
The invention provides a variable impedance device including a first bus bar refrigeration system, a first bus bar thermally connected to the first bus bar refrigeration system to be maintained at a target bus bar temperature by the first bus bar refrigeration system, a variable impedance component refrigeration system, a variable impedance component electrically connected to the first bus bar and thermally connected to the component refrigeration system, a variable impedance component may be at least partially made of a material that is superconducting below a critical temperature and may be maintained at a target component temperature, wherein the target bus bar temperature may be between the 300K and critical temperature and the target component temperature may be below the critical temperature and a second bus bar connected to the variable impedance component so that current flows between the first and second leads through the variable impedance component.
Abstract:
A fiber optical superconducting nanowire detector with increased detector efficiency, fabricated directly on the tip of the input optical fiber. The fabrication on the tip of the fiber allows precise alignment of the detector to the fiber core, where the field mode is maximal. This construction maximizes the coupling efficiency to close to unity, without the need for complex alignment procedures, such as the need to align the input fiber with a previously fabricated device. The device includes a high-Q optical cavity, such that any photon entering the device will be reflected to and fro within the cavity numerous times, thereby increasing its chances of absorption by the nanowire structure. This is achieved by using dedicated cavity mirrors with very high reflectivity, with the meander nanowire structure contained within the cavity between the end mirrors, such that photons impinge on the nanowire structure with every traverse of the cavity.
Abstract:
A superconducting element (SE1-SE5) with a central section (20) located between two end sections (21a, 21b) of the superconducting element (SE1-SE5), the superconducting element (SE1-SE5) has a substrate tape (10), a buffer layer (11), a high temperature superconducting (HTS) layer (12), a first protection layer (14), and a shunt layer (17), The superconducting element (SE1-SE5) has at least one elongated opening (19) in the central section (20) elongated between the two end sections (21a, 21b), whereby the at least one elongated opening (19) divides the central section (20) of the superconducting element (SE1-SE5) into at least two HTS strips (18a, 18b, 18c), whereby the shunt layer (17) envelops the surface of each of the HTS strips (18a, 18b, 18c). The superconducting element shows improved electrical stabilization and time stability.
Abstract:
Provided is a fault current limiter that uses a superconductor and can rapidly restore a superconducting state after a current limiting operation. The fault current limiter is configured to perform a current limiting operation through the use of a superconductor and includes a superconducting member (a member including a holding container, a filler and a superconducting wire) including the superconductor, a cooling container, and a suppression member (fins). The cooling container is configured to hold therein the superconducting member and house therein a coolant for cooling the superconducting member. The suppression member (fins) is configured to prevent a boiling state of the coolant from transiting from a nucleate boiling state to a film boiling state in the case where the coolant boils on a surface of the superconducting member (a surface of the holding container) due to a temperature rise of the superconductor during the current limiting operation.
Abstract:
A superconducting fault current limiter (SCFCL) includes a cryogenic tank defining an interior volume, a superconductor disposed in the interior volume, and a refrigeration system configured to adjust a temperature of the superconductor in response to a condition during a steady state operation of the SCFCL. A method of operating a SCFCL includes cooling a superconductor disposed within an interior volume of a cryogenic tank to a temperature less than a critical temperature of the superconductor, and adjusting the temperature of the superconductor in response to a condition during a steady state operation of the SCFCL.