公开(公告)号：US08018013B2

公开(公告)日：2011-09-13

申请号：US11740937

申请日：2007-04-27

Applicant: Hsiang-Lin Lin ,  Ching-Yu Tsai ,  Yi-Sheng Cheng ,  Kuo-Yu Huang

Inventor： Hsiang-Lin Lin ,  Ching-Yu Tsai ,  Yi-Sheng Cheng ,  Kuo-Yu Huang

IPC: H01L29/72

CPC classification number: H01L27/1288 ,  G09G3/3648 ,  G09G2300/0465 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/0657 ,  H01L29/41733 ,  H01L29/42384

Abstract: A pixel structure including a scan line, a data line, an active device, a shielding electrode, and a pixel electrode is provided on a substrate. The data line includes an upper conductive wire and a bottom conductive wire. The upper conductive wire is disposed over and across the scan line. The bottom conductive wire is electrically connected to the upper conductive wire. The active device is electrically connected to the scan line and the upper conductive wire. The shielding electrode is disposed over the bottom conductive wire. The pixel electrode disposed over the shielding electrode is electrically connected to the active device. In addition, parts of the pixel electrode and parts of the shielding electrode form a storage capacitor.

Abstract translation: 在基板上设置包括扫描线，数据线，有源器件，屏蔽电极和像素电极的像素结构。 数据线包括上导线和底导线。 上导线设置在扫描线上方并穿过扫描线。 底部导线与上导电线电连接。 有源器件电连接到扫描线和上导电线。 屏蔽电极设置在底部导线上。 设置在屏蔽电极上方的像素电极与有源器件电连接。 此外，像素电极的一部分和屏蔽电极的一部分形成存储电容器。

公开(公告)号：US20110216256A1

公开(公告)日：2011-09-08

申请号：US12781805

申请日：2010-05-17

Applicant: Hsiang-Lin Lin ,  An-Thung Cho ,  Chih-Jen Hu ,  Wei-Ming Huang

Inventor： Hsiang-Lin Lin ,  An-Thung Cho ,  Chih-Jen Hu ,  Wei-Ming Huang

IPC: G02F1/135 ,  H01J9/24

CPC classification number: G02F1/135 ,  H01J9/24

Abstract: A reflective type touch-sensing display panel including a front substrate, scan lines, data lines, pixel structures, photo-sensors, readout devices, a rear substrate and a reflective display medium is provided. The front substrate has an inner surface. The scan lines and the data lines are on the inner surface of the front substrate and intersected to each other. The pixel structures are disposed on the inner surface of the front substrate, and each pixel structure is electrically connected to one of the scan lines and one of the data lines correspondingly. The photo-sensors are disposed on the inner surface of the front substrate. Each readout device is electrically connected to one of the photo-sensor correspondingly. The rear substrate is disposed opposite to the front substrate. The reflective display medium is sealed between the front substrate and the rear substrate.

Abstract translation: 提供了包括前基板，扫描线，数据线，像素结构，光传感器，读出装置，后基板和反射显示介质的反射型触摸感测显示面板。 前基板具有内表面。 扫描线和数据线位于前基板的内表面上并彼此相交。 像素结构设置在前基板的内表面上，并且每个像素结构相应地电连接到扫描线之一和数据线之一。 光传感器设置在前基板的内表面上。 每个读出装置相应地电连接到一个光电传感器。 后基板与前基板相对设置。 反射显示介质被密封在前基板和后基板之间。

公开(公告)号：US07834354B2

公开(公告)日：2010-11-16

申请号：US12040281

申请日：2008-02-29

Applicant: Hsiang-Lin Lin ,  Ching-Huan Lin

Inventor： Hsiang-Lin Lin ,  Ching-Huan Lin

IPC: H01L29/04

CPC classification number: H01L27/1288 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1214 ,  H01L27/124

Abstract: A pixel structure of a fringe field switching liquid crystal display (FFS-LCD) and a method for manufacturing the pixel structure are provided. Compared to the conventional method of using seven photolithography-etching processes for manufacturing a pixel structure, the method of the present invention uses only six photolithography-etching processes that save manufacturing costs and time. Furthermore, the pixel structure thereby only comprises two insulating layers, and thus, the light transmittance thereof can be increased in comparison to the conventional pixel structure comprising three insulating layers.

Abstract translation: 提供了一种边缘场切换液晶显示器（FFS-LCD）的像素结构以及像素结构的制造方法。 与使用七个光刻蚀刻工艺用于制造像素结构的常规方法相比，本发明的方法仅使用六个光刻蚀刻工艺，其节省制造成本和时间。 此外，像素结构由此仅包括两个绝缘层，因此与包括三个绝缘层的常规像素结构相比，其透光率可以增加。

公开(公告)号：US20100279450A1

公开(公告)日：2010-11-04

申请号：US12835874

申请日：2010-07-14

Applicant: Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Han-Tu Lin

Inventor： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Han-Tu Lin

IPC: H01L21/28

CPC classification number: H01L27/1288 ,  H01L27/124

Abstract: An active device array substrate and its fabricating method are provided. According to the subject invention, the elements of an array substrate such as the thin film transistors, gate lines, gate pads, data lines, data pads and storage electrodes, are provided by forming a patterned first metal layer, an insulating layer, a patterned semiconductor layer and a patterned metal multilayer. Furthermore, the subject invention uses the means of selectively etching certain layers. Using the aforesaid means, the array substrate of the subject invention has some layers with under-cut structures, and thus, the number of the time-consuming and complicated mask etching process involved in the production of an array substrate can be reduced. The subject invention provides a relatively simple and time-saving method for producing an array substrate.

Abstract translation: 提供一种有源器件阵列衬底及其制造方法。 根据本发明，诸如薄膜晶体管，栅极线，栅极焊盘，数据线，数据焊盘和存储电极之类的阵列基板的元件通过形成图案化的第一金属层，绝缘层，图案化 半导体层和图案化金属多层。 此外，本发明使用选择性蚀刻某些层的方法。 使用上述方法，本发明的阵列基板具有一些具有欠切割结构的层，因此可以减少在阵列基板的制造中涉及的耗时且复杂的掩模蚀刻工艺的数量。 本发明提供了用于制造阵列基板的相对简单且省时的方法。

公开(公告)号：US07808567B2

公开(公告)日：2010-10-05

申请号：US11941534

申请日：2007-11-16

Applicant: Hsiang-Lin Lin ,  Seok-Lyul Lee ,  Tun-Chun Yang

Inventor： Hsiang-Lin Lin ,  Seok-Lyul Lee ,  Tun-Chun Yang

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/139

CPC classification number: G02F1/133707 ,  G02F1/134336 ,  G02F2201/40 ,  H01L27/124 ,  H01L29/42384

Abstract: A pixel structure is provided. The pixel structure comprises a lower substrate with a transistor and pixel area; a first patterned conductive layer, which has a data line and a gate within the transistor area that is disposed on the lower substrate; a patterned insulator layer covering the first patterned conductive layer; an active layer disposed on the patterned insulator layer above the gate; a second patterned conductive layer with a gate line disposed on the patterned insulator layer, source and drain, wherein the source and the drain are disposed on the active layer; a pixel electrode disposed on the patterned insulator layer and electrically connected to the drain; a patterned passivation layer disposed on the patterned insulator layer, gate line, source, drain and pixel electrode; and a third patterned conductive layer, which has a data line connecting electrode, a gate line connecting electrode, at least one alignment electrode and a common electrode. The data line is electrically connected to the source through the data line connecting electrode; the gate line is electrically connected to the gate through the gate line connecting electrode; the alignment electrode is electrically connected to the pixel electrode; and a portion of the common electrode is disposed above the data line.

Abstract translation: 提供像素结构。 像素结构包括具有晶体管和像素区域的下基板; 第一图案化导电层，其具有设置在下基板上的晶体管区域内的数据线和栅极; 覆盖所述第一图案化导电层的图案化绝缘体层; 设置在栅极上方的图案化绝缘体层上的有源层; 第二图案化导电层，其栅极线设置在图案化绝缘体层，源极和漏极上，其中源极和漏极设置在有源层上; 设置在所述图案化绝缘体层上并电连接到所述漏极的像素电极; 布置在图案化绝缘体层，栅极线，源极，漏极和像素电极上的图案化钝化层; 以及具有数据线连接电极，栅极线连接电极，至少一个取向电极和公共电极的第三图案化导电层。 数据线通过数据线连接电极与源极电连接; 栅极线通过栅极线连接电极电连接到栅极; 对准电极电连接到像素电极; 并且公共电极的一部分设置在数据线的上方。

公开(公告)号：US07754547B2

公开(公告)日：2010-07-13

申请号：US12102027

申请日：2008-04-14

Applicant: Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

Inventor： Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

IPC: H01L21/00

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L27/1288

Abstract: An active matrix array structure, disposed on a substrate, includes a first patterned conductive layer, a patterned gate insulating layer, a patterned semiconductor layer, a second patterned conductive layer, a patterned overcoat layer and a transparent conductive layer. The patterned gate insulating layer has first openings that expose a part of the first patterned conductive layer. The patterned semiconductor layer is disposed on the patterned gate insulating layer. The second patterned conductive layer is disposed on the patterned semiconductor layer. The patterned overcoat layer has second openings that expose a part of the first patterned conductive layer and a part of the second patterned conductive layer. The transparent conductive layer is completely disposed on the substrate. The transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.

Abstract translation: 设置在基板上的有源矩阵阵列结构包括第一图案化导电层，图案化栅极绝缘层，图案化半导体层，第二图案化导电层，图案化外涂层和透明导电层。 图案化栅极绝缘层具有暴露第一图案化导电层的一部分的第一开口。 图案化的半导体层设置在图案化的栅极绝缘层上。 第二图案化导电层设置在图案化的半导体层上。 图案化的外涂层具有暴露第一图案化导电层的一部分和第二图案化导电层的一部分的第二开口。 透明导电层完全设置在基板上。 设置在第一开口和第二开口中的透明导电层在基板和图案化外涂层之间的位置处断开。

公开(公告)号：US20100091230A1

公开(公告)日：2010-04-15

申请号：US12493253

申请日：2009-06-29

Applicant: Sung-Kao Liu ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Jen Hu

Inventor： Sung-Kao Liu ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Jen Hu

IPC: G02F1/1337

CPC classification number: G02F1/133788 ,  G02F2001/133715

Abstract: A liquid crystal display (LCD) panel and a manufacturing method thereof are provided. The manufacturing method includes providing a panel including a first substrate having scan lines, data lines, an active device electrically connecting the scan and data lines, and a pixel electrode electrically connecting the active device, a second substrate having an opposite electrode, and a liquid crystal (LC) layer disposed between the first and the second substrates and having a monomer material. A first curing voltage and a second curing voltage are applied to the scan and data lines, respectively. The second curing voltage is thus transmitted to the pixel electrode. The first curing voltage is higher than an absolute value of the second curing voltage. The monomer material is polymerized to form a first polymer stabilized alignment (PSA) layer between the LC layer and the first substrate and a second PSA layer between the LC layer and the second substrate. The electrical field is then removed.

Abstract translation: 提供一种液晶显示器（LCD）面板及其制造方法。 该制造方法包括提供一种面板，其包括具有扫描线的第一基板，数据线，电连接扫描线和数据线的有源器件，以及电连接有源器件的像素电极，具有相对电极的第二基板和液体 晶体（LC）层，设置在第一和第二基板之间并具有单体材料。 第一固化电压和第二固化电压分别施加到扫描和数据线。 因此，第二固化电压被传输到像素电极。 第一固化电压高于第二固化电压的绝对值。 聚合单体材料以在LC层和第一基底之间形成第一聚合物稳定取向（PSA）层，在LC层和第二基底之间形成第二PSA层。 然后去除电场。

公开(公告)号：US07687289B2

公开(公告)日：2010-03-30

申请号：US11863283

申请日：2007-09-28

Applicant: Hsiang-Lin Lin ,  Sung-Kao Liu

Inventor： Hsiang-Lin Lin ,  Sung-Kao Liu

IPC: H01L21/00

CPC classification number: G02F1/136227 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2001/136218

Abstract: A method of manufacturing a pixel structure is provided. A first patterned conductive layer including a gate and a data line is formed on a substrate. A gate insulating layer is formed to cover the first patterned conductive layer and a semiconductor channel layer is formed on the gate insulating layer above the gate. A second patterned conductive layer including a scan line, a common line, a source and a drain is formed on the gate insulating layer and the semiconductor channel layer. The scan line is connected to the gate and the common line is located above the data line. The source and drain are located on the semiconductor channel layer, and the source is connected to the data line. A passivation layer is formed on the substrate to cover the second patterned conductive layer. A pixel electrode connected to the drain is formed on the passivation layer.

Abstract translation: 提供了一种制造像素结构的方法。 在基板上形成包括栅极和数据线的第一图案化导电层。 形成栅极绝缘层以覆盖第一图案化导电层，并且在栅极上方的栅极绝缘层上形成半导体沟道层。 包括扫描线，公共线，源极和漏极的第二图案化导电层形成在栅极绝缘层和半导体沟道层上。 扫描线连接到栅极，公共线位于数据线上方。 源极和漏极位于半导体沟道层上，源极连接到数据线。 在衬底上形成钝化层以覆盖第二图案化导电层。 连接到漏极的像素电极形成在钝化层上。

公开(公告)号：US07683976B2

公开(公告)日：2010-03-23

申请号：US12043967

申请日：2008-03-07

Applicant: Ying-Ru Chen ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Ming Chang

Inventor： Ying-Ru Chen ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Ming Chang

IPC: G02F1/1343

CPC classification number: G02F1/133707 ,  G02F1/1362 ,  G02F2201/50

Abstract: A liquid crystal display panel is provided. The liquid crystal display panel includes an active device array substrate, an opposite substrate, a plurality of scan lines, a plurality of data patterns, a plurality of connecting patterns, a plurality of active devices, a plurality of transparent pixel electrodes, a plurality of common lines, at least one polymer layer, and a liquid crystal layer. The opposite substrate is disposed above the active device array substrate. The scan lines, the data patterns and the connecting patterns are disposed on the active device array substrate, and the data patterns and the connecting patterns form data lines via contact holes. The common lines are disposed between the transparent pixel electrodes and the data lines, and a part of each common line overlaps the corresponding data pattern. The polymer layer is disposed on at least one of the active device array substrate and the opposite substrate.

Abstract translation: 提供液晶显示面板。 液晶显示面板包括有源器件阵列基板，相对基板，多个扫描线，多个数据图案，多个连接图案，多个有源器件，多个透明像素电极，多个 共同线，至少一个聚合物层和液晶层。 相对的基板设置在有源器件阵列衬底上方。 扫描线，数据图案和连接图案设置在有源器件阵列基板上，数据图形和连接图案通过接触孔形成数据线。 公共线设置在透明像素电极和数据线之间，并且每条公共线的一部分与对应的数据图案重叠。 聚合物层设置在有源器件阵列衬底和相对衬底中的至少一个上。

公开(公告)号：US20090191652A1

公开(公告)日：2009-07-30

申请号：US12081515

申请日：2008-04-17

Applicant: Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

Inventor： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

IPC: H01L27/02 ,  H01L21/70

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L27/1288

Abstract: A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.

Abstract translation: 像素结构包括扫描线，数据线，有源元件，第一钝化层，第二钝化层和像素电极。 数据线包括第一数据金属段和第二数据金属层。 有源元件包括栅电极，绝缘层，沟道层，源极和漏极。 沟道层位于栅电极上方的绝缘层上。 源极和漏极位于沟道层上。 源耦合到数据线。 第一钝化层和第二钝化层覆盖有源元件并形成第一接触孔以暴露漏极的一部分。 第二钝化层覆盖漏极的一部分边缘。 像素电极跨越第二钝化层设置并且经由第一接触孔耦合到漏极。