公开(公告)号：US07191318B2

公开(公告)日：2007-03-13

申请号：US10249416

申请日：2003-04-07

Applicant: Tarun Kumar Tripathy ,  Millind Mittal ,  Kaushik L. Popat ,  Amod Bodas

Inventor： Tarun Kumar Tripathy ,  Millind Mittal ,  Kaushik L. Popat ,  Amod Bodas

IPC: G06F9/00

CPC classification number: H04L29/06 ,  H04L69/10 ,  H04L69/16 ,  H04L69/161 ,  H04L69/165

Abstract: A copy instruction executed by a functional-level instruction-set computing (FLIC) processor copies a variable-length data block from one resource to another resource through a cross-bar switch. Resources include general-purpose registers, input, output, and execution buffers, DRAM, SRAM, and other memory. A copy-with-validate instruction has an operand pointing to a first rule in an immediate rule table. The first rule controls validation of a first data-item in the data being copied. Validation includes range and equality checking of the data-item. The value of the data-item or the current offset can be written to a register. A format field in the rule indicates the size of the data-item, or the size is read from the data-item for variable-size formats. The current offset is incremented by the size. The next data-item is validated by a next rule, and other rules in the immediate table control validation of other data-items in the data block.

Abstract translation: 由功能级指令集计算（FLIC）处理器执行的复制指令通过交叉开关将可变长度数据块从一个资源复制到另一个资源。 资源包括通用寄存器，输入，输出和执行缓冲器，DRAM，SRAM和其他存储器。 具有验证复制指令的操作数指向立即规则表中的第一条规则。 第一个规则控制要复制的数据中第一个数据项的验证。 验证包括数据项的范围和等式检查。 可以将数据项或当前偏移量的值写入寄存器。 规则中的格式字段指示数据项的大小，或从可变大小格式的数据项中读取大小。 当前的偏移量增加大小。 下一个数据项由下一个规则验证，立即表中的其他规则控制数据块中其他数据项的验证。

公开(公告)号：US20070028019A1

公开(公告)日：2007-02-01

申请号：US11230242

申请日：2005-09-19

Applicant: Millind Mittal

Inventor： Millind Mittal

IPC: G06F13/38 ,  G06F13/12

CPC classification number: G06F3/0233 ,  H04M2250/70

Abstract: Systems and methods are disclosed for entering data into a keypad having a plurality of keys, each key used to select one character from at least first, second and third characters designated for each key. The method includes providing disambiguation information on a current key and subsequently selecting a next key covering a desired character. In another aspect, for the keyboards where touching and key, and subsequent untouching or pressing a key are taken as two separate events. In this case the disambiguation information is provided by key touched immediately prior to the key pressed or untouched. In yet another method where the touching of a key when there was no prior touched key (first-touch key), and touching a new key without untouching the keypad are taken as two separate events, the first-touch key is taken as a selection of key with one of the desired characters, and a subsequent touching of an adjacent key without untouching of the keypad is used to index and select the characters on the selected key.

Abstract translation: 公开了用于将数据输入到具有多个键的键盘中的系统和方法，每个键用于从为每个键指定的至少第一，第二和第三字符中选择一个字符。 该方法包括提供关于当前密钥的消歧信息，随后选择覆盖期望字符的下一个密钥。 在另一方面，对于触摸和键的键盘以及随后的不触摸或按键被视为两个单独的事件。 在这种情况下，消歧信息是通过紧接按键或未触摸之前立即触摸的键来提供的。 在另一种方法中，当没有先前触摸的键（第一触摸键）时触摸一个键，并且触摸一个新的键而不触摸键盘则被视为两个单独的事件，将第一触摸键作为选择 使用所需字符之一的键，并且随后触摸相邻的键而不用触摸小键盘来索引并选择所选择的键上的字符。

公开(公告)号：US07149882B2

公开(公告)日：2006-12-12

申请号：US10844606

申请日：2004-05-11

Applicant: Andrew F. Glew ,  Larry M. Mennemeier ,  Alexander D. Peleg ,  David Bistry ,  Millind Mittal ,  Carole Dulong ,  Eiichi Kowashi ,  Benny Eitan ,  Derrik Lin ,  Romamohan R. Vakkalagadda

Inventor： Andrew F. Glew ,  Larry M. Mennemeier ,  Alexander D. Peleg ,  David Bistry ,  Millind Mittal ,  Carole Dulong ,  Eiichi Kowashi ,  Benny Eitan ,  Derrik Lin ,  Romamohan R. Vakkalagadda

IPC: G06F7/38

CPC classification number: G06F9/3017 ,  G06F9/30036 ,  G06F9/30105 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30134 ,  G06F9/30189 ,  G06F9/384 ,  G06F9/462

Abstract: A processor with instructions to operate on different data types stored in a single logical register file. According to one embodiment of the invention, a processor includes a number of physical registers, a memory unit, and a decode/execution unit. The memory unit is to make the number of physical registers appear to software as a single software-visible register file. The decode/execution unit is to execute on the contents of the single software-visible register file instructions of a first instruction type and of a second instruction type, wherein the single software-visible register file is to be operated as a flat register file during execution of instructions of the second instruction type and as a stack referenced register file during execution of instructions of the first instruction type.

Abstract translation: 具有对存储在单个逻辑寄存器文件中的不同数据类型进行操作的指令的处理器。 根据本发明的一个实施例，处理器包括多个物理寄存器，存储器单元和解码/执行单元。 存储单元是将物理寄存器的数量作为单个软件可见的寄存器文件显示在软件上。 解码/执行单元执行第一指令类型和第二指令类型的单个软件可见寄存器文件指令的内容，其中单个软件可见寄存器文件将作为平坦寄存器文件操作 在执行第一指令类型的指令期间执行第二指令类型的指令和作为堆栈引用的寄存器堆栈。

公开(公告)号：US07117232B2

公开(公告)日：2006-10-03

申请号：US11140454

申请日：2005-05-27

Applicant: Derrick Chu Lin ,  Punit Minocha ,  Alexander D. Peleg ,  Yaakov Yaari ,  Millind Mittal ,  Larry M. Mennemeier ,  Benny Eitan

Inventor： Derrick Chu Lin ,  Punit Minocha ,  Alexander D. Peleg ,  Yaakov Yaari ,  Millind Mittal ,  Larry M. Mennemeier ,  Benny Eitan

IPC: G06F5/01

CPC classification number: G06F7/762 ,  G06F5/01 ,  G06F7/49994 ,  G06F7/76 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30109 ,  G06F9/3013 ,  G06F9/30167 ,  G06F9/3885

Abstract: A method and apparatus for providing, in a processor, a shift operation on a packed data element having multiple values. The apparatus having multiple muxes, each of the multiple muxes having a first input, a second input, a select input and an output. Each of the multiple bits that represent a shifted packed intermediate result on a first bus is coupled to the corresponding first input. Each of the multiple bits representing a replacement bit for one of the multiple values is coupled to a corresponding second input. Each of the multiple bits driven by a correction circuit is coupled to a corresponding select input. Each output corresponds to a bit of a shifted packed result.

公开(公告)号：US20060200680A1

公开(公告)日：2006-09-07

申请号：US09672602

申请日：2001-02-26

Applicant: Carl Ellison ,  Roger Golliver ,  Howard Herbert ,  Derrick Lin ,  Francis McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James Sutton ,  Shreekant Thakkar ,  Millind Mittal

Inventor： Carl Ellison ,  Roger Golliver ,  Howard Herbert ,  Derrick Lin ,  Francis McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James Sutton ,  Shreekant Thakkar ,  Millind Mittal

IPC: G06F12/14

CPC classification number: G06F12/1491 ,  G06F21/57 ,  G06F2221/2105

Abstract: In an embodiment of the present invention, a technique is provided for remote attestation. An interface maps a device via a bus to an address space of a chipset in a secure environment for an isolated execution mode. The secure environment is associated with an isolated memory area accessible by at least one processor. The at least one processor operates in one of a normal execution mode and the isolated execution mode. A communication storage corresponding to the address space allows the device to exchange security information with the at least one processor in the isolated execution mode in a remote attestation.

Abstract translation: 在本发明的实施例中，提供了用于远程证明的技术。 接口将设备通过总线映射到安全环境中的芯片组的地址空间，用于隔离执行模式。 安全环境与由至少一个处理器可访问的隔离存储器区域相关联。 所述至少一个处理器以正常执行模式和隔离执行模式之一进行操作。 对应于地址空间的通信存储器允许设备在远程证明中以隔离执行模式与至少一个处理器交换安全信息。

公开(公告)号：US07082615B1

公开(公告)日：2006-07-25

申请号：US09668610

申请日：2000-09-22

Applicant: Carl M. Ellison ,  Roger A. Golliver ,  Howard C. Herbert ,  Derrick C. Lin ,  Francis X. McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James A. Sutton ,  Shreekant S. Thakkar ,  Millind Mittal

Inventor： Carl M. Ellison ,  Roger A. Golliver ,  Howard C. Herbert ,  Derrick C. Lin ,  Francis X. McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James A. Sutton ,  Shreekant S. Thakkar ,  Millind Mittal

IPC: G06F7/04

CPC classification number: G06F21/53 ,  G06F9/468 ,  G06F21/562 ,  G06F21/57 ,  G06F21/74 ,  G06F2221/2105

Abstract: The present invention is a method and apparatus to protect a subset of a software environment. A key generator generates an operating system nub key (OSNK). The OSNK is unique to an operating system (OS) nub. The OS nub is part of an operating system in a secure platform. A usage protector uses the OSNK to protect usage of a subset of the software environment.

Abstract translation: 本发明是一种保护软件环境子集的方法和装置。 密钥生成器生成操作系统nub（OSNK）。 OSNK是操作系统（OS）nub所独有的。 OS nub是安全平台中操作系统的一部分。 使用保护程序使用OSNK来保护软件环境的子集的使用。

公开(公告)号：US20060015749A1

公开(公告)日：2006-01-19

申请号：US11229669

申请日：2005-09-20

Applicant: Millind Mittal

Inventor： Millind Mittal

IPC: G06F11/30

CPC classification number: G06F21/72 ,  G06F12/1408 ,  G06F12/1441 ,  G06F12/1491 ,  G06F21/60 ,  G06F21/602 ,  G06F21/78 ,  G06F2221/2107 ,  G06F2221/2125

Abstract: A processor capable of secure execution. The processor contains an execution unit and secure partition logic that secures a partition in memory. The processor also contains cryptographic logic coupled to the execution unit that encrypts and decrypts secure data and code.

公开(公告)号：US20060015719A1

公开(公告)日：2006-01-19

申请号：US11203538

申请日：2005-08-12

Applicant: Howard Herbert ,  David Grawrock ,  Carl Ellison ,  Roger Golliver ,  Derrick Lin ,  Francis McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James Sutton ,  Shreekant Thakkar ,  Millind Mittal

Inventor： Howard Herbert ,  David Grawrock ,  Carl Ellison ,  Roger Golliver ,  Derrick Lin ,  Francis McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James Sutton ,  Shreekant Thakkar ,  Millind Mittal

IPC: H04L9/00

CPC classification number: G06F21/305 ,  G06F9/30189 ,  G06F12/1491 ,  G06F21/35 ,  G06F21/53 ,  G06F21/57 ,  G06F21/575 ,  G06F21/64 ,  G06F21/74 ,  G06F2221/2101 ,  G06F2221/2103 ,  G06F2221/2105 ,  G06F2221/2149

Abstract: In one embodiment, a method of remote attestation for a special mode of operation. The method comprises storing an audit log within protected memory of a platform. The audit log is a listing of data representing each of a plurality of IsoX software modules loaded into the platform. The audit log is retrieved from the protected memory in response to receiving a remote attestation request from a remotely located platform. Then, the retrieved audit log is digitally signed to produce a digital signature for transfer to the remotely located platform.

公开(公告)号：US06952770B1

公开(公告)日：2005-10-04

申请号：US09525702

申请日：2000-03-14

Applicant: Millind Mittal ,  James Mi

Inventor： Millind Mittal ,  James Mi

IPC: G06F21/00 ,  H04L9/28

CPC classification number: G06F21/73 ,  G06F21/123

Abstract: A method and apparatus for enabling hardware platform identification while ensuring privacy protection. The apparatus comprises a computer-readable medium that stores computer-executable instructions. Those instructions, when executed by a microprocessor, cause an expected hash value, which is derived from a key and a first identifier for a computer system; to be compared with a hash value, which is derived from the key and a second identifier for a computer system. A microprocessor for executing those instructions may comprise an identifier that identifies the microprocessor, and embedded instructions for comparing a hash value, derived from the identifier and a key, to an expected hash value.

Abstract translation: 一种用于在确保隐私保护的同时实现硬件平台识别的方法和装置。 该装置包括存储计算机可执行指令的计算机可读介质。 这些指令在由微处理器执行时产生从计算机系统的密钥和第一标识符导出的预期散列值; 与从密钥导出的散列值和计算机系统的第二标识符进行比较。 用于执行这些指令的微处理器可以包括识别微处理器的标识符和用于将从标识符和密钥导出的哈希值与预期散列值进行比较的嵌入指令。

公开(公告)号：US06678825B1

公开(公告)日：2004-01-13

申请号：US09618738

申请日：2000-07-18

Applicant: Carl M. Ellison ,  Roger A. Golliver ,  Howard C. Herbert ,  Derrick C. Lin ,  Francis X. McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James A. Sutton ,  Shreekant S. Thakkar ,  Millind Mittal

Inventor： Carl M. Ellison ,  Roger A. Golliver ,  Howard C. Herbert ,  Derrick C. Lin ,  Francis X. McKeen ,  Gilbert Neiger ,  Ken Reneris ,  James A. Sutton ,  Shreekant S. Thakkar ,  Millind Mittal

IPC: G06F1760

CPC classification number: G06F12/145 ,  G06F12/0831 ,  G06F12/1009 ,  G06F12/1491 ,  G06F21/74 ,  G06F2212/1016 ,  G06F2212/1041 ,  G06F2212/1052

Abstract: The present invention provides a method, apparatus, and system for controlling memory accesses to multiple isolated memory areas in an isolated execution environment. A page manager is used to distribute a plurality of pages to a plurality of different areas of a memory, respectively. The memory is divided into non-isolated areas and isolated areas. The page manager is located in an isolated area of memory. Further, a memory ownership page table describes each page of memory and is also located in an isolated area of memory. The page manager assigns an isolated attribute to a page if the page is distributed to an isolated area of memory. On the other hand, the page manager assigns a non-isolated attribute to a page if the page is distributed to a non-isolated area of memory. The memory ownership page table records the attribute for each page. In one embodiment, a processor having a normal execution mode and an isolated execution mode generates an access transaction. The access transaction is configured using a configuration storage that contains configuration settings related to a page and access information. An access checking circuit coupled to the configuration storage checks the access transaction using at least one of the configuration settings and the access information and generates an access grant signal if the access transaction is valid.

Abstract translation: 本发明提供一种用于控制对隔离执行环境中的多个隔离存储器区域的存储器访问的方法，装置和系统。 页面管理器用于分别将多个页面分发到存储器的多个不同区域。 记忆分为非隔离区和隔离区。 页面管理器位于隔离区内。 此外，存储器所有权页表描述了存储器的每一页，并且还位于存储器的隔离区域中。 页面管理器将一个隔离的属性分配给页面，如果该页面被分发到一个隔离的内存区域。 另一方面，如果页面被分发到存储器的非隔离区域，则页面管理器将非隔离属性分配给页面。 内存所有权页表记录每个页面的属性。 在一个实施例中，具有正常执行模式和隔离执行模式的处理器生成访问事务。 访问事务使用包含与页面和访问信息相关的配置设置的配置存储进行配置。 耦合到配置存储器的访问检查电路使用配置设置和访问信息中的至少一个来检查访问事务，并且如果访问事务有效则生成访问许可信号。