Full-path circuit delay measurement device for field-programmable gate array (FPGA) and measurement method

    公开(公告)号:US11762015B2

    公开(公告)日:2023-09-19

    申请号:US17801266

    申请日:2021-09-22

    CPC classification number: G01R31/31725

    Abstract: A full-path circuit delay measurement device for a field-programmable gate array (FPGA) and a measurement method are provided. The measurement device includes two shadow registers and a phase-shifted clock, where the two shadow registers take an output of a measured combinational logic circuit as a clock and sample the phase-shifted clock SCLK as data; the two shadow registers are respectively triggered on rising and falling edges of the output of the measured combinational logic circuit to sample the phase-shifted clock; outputs of the two shadow registers are delivered by an OR gate as an input into a synchronization register; a clock of the synchronization register serves as a clock MCLK of the measured combinational logic circuit; an output of the synchronization register serves as that of the circuit delay measurement device; the phase-shifted clock SCLK and the clock MCLK of the measured combinational logic circuit have the same frequency.

    STATIC RANDOM-ACCESS MEMORY (SRAM) CELL FOR HIGH-SPEED CONTENT-ADDRESSABLE MEMORY AND IN-MEMORY BOOLEAN LOGIC OPERATION

    公开(公告)号:US20230197154A1

    公开(公告)日:2023-06-22

    申请号:US17802968

    申请日:2021-09-22

    Inventor: Jian CHEN Yajun HA

    CPC classification number: G11C15/04

    Abstract: A static random-access memory (SRAM) cell for high-speed content-addressable memory (CAM) and in-memory Boolean logic operations includes a standard 6T-SRAM and two additional PMOS access transistors, where read word lines of the two positive-channel metal oxide semiconductor (PMOS) access transistors P1 and P2 are RWLR and RWLL respectively, and under the control thereof, a differential read port RBL/RBL is formed. The SRAM cell is suitable for multi-row address selection, and typically applied to in-memory high-speed CAM and in-memory Boolean logic operations. Due to PMOS device characteristics, the structure design of the SRAM cell can avoid read disturbance generated by an in-memory SRAM, and ensure that the SRAM can perform in-memory CAM and in-memory Boolean logic operations stably at a high speed. In addition, this SRAM-based IMC solution supports commercial CMOS technology, and has an opportunity to leverage a large number of existing on-chip SRAM caches.

    PURE INTEGER QUANTIZATION METHOD FOR LIGHTWEIGHT NEURAL NETWORK (LNN)

    公开(公告)号:US20230196095A1

    公开(公告)日:2023-06-22

    申请号:US17799933

    申请日:2021-09-22

    CPC classification number: G06N3/08

    Abstract: A pure integer quantization method for a lightweight neural network (LNN) is provided. The method includes the following steps: acquiring a maximum value of each pixel in each of the channels of the feature map of a current layer; dividing a value of each pixel in each of the channels of the feature map by a t-th power of the maximum value, t∈[0,1]; multiplying a weight in each of the channels by the maximum value of each pixel in each of the channels of the corresponding feature map; and convolving the processed feature map with the processed weight to acquire the feature map of a next layer. The algorithm is verified on SkyNet and MobileNet respectively, and lossless INT8 quantization on SkyNet and maximum quantization accuracy so far on MobileNetv2 are achieved.

    NORMAL DISTRIBUTIONS TRANSFORM (NDT) METHOD FOR LIDAR POINT CLOUD LOCALIZATION IN UNMANNED DRIVING

    公开(公告)号:US20230192123A1

    公开(公告)日:2023-06-22

    申请号:US17802148

    申请日:2021-09-22

    CPC classification number: B60W60/001 B60W2420/52 B60W2554/4049

    Abstract: A normal distributions transform (NDT) method for LiDAR point cloud localization in unmanned driving is provided. The method proposes a non-recursive, memory-efficient data structure occupation-aware-voxel-structure (OAVS), which speeds up each search operation. Compared with a tree-based structure, the proposed data structure OAVS is easy to parallelize and consumes only about 1/10 of memory. Based on the data structure OAVS, the method proposes a semantic-assisted OAVS-based (SEO)-NDT algorithm, which significantly reduces the number of search operations, redefines a parameter affecting the number of search operations, and removes a redundant search operation. In addition, the method proposes a streaming field-programmable gate array (FPGA) accelerator architecture, which further improves the real-time and energy-saving performance of the SEO-NDT algorithm. The method meets the real-time and high-precision requirements of smart vehicles for three-dimensional (3D) lidar localization.

    OPTIMIZED RECONFIGURATION ALGORITHM BASED ON DYNAMIC VOLTAGE AND FREQUENCY SCALING

    公开(公告)号:US20220309217A1

    公开(公告)日:2022-09-29

    申请号:US17595194

    申请日:2021-06-09

    Inventor: Rui LI Yajun HA

    Abstract: An optimized reconfiguration algorithm based on dynamic voltage and frequency scaling (DVFS) is provided, which mainly has the following contributions. The optimized reconfiguration algorithm based on DVFS proposes a DVFS-based reconfiguration method, which schedules user tasks according to a degree of parallelism (DOP) of the user tasks so as to reconfigure more parallel user tasks, thereby achieving higher reliability. The optimized reconfiguration algorithm based on DVFS proposes a K-means-based heuristic approximation algorithm, which minimizes the delay of the DVFS-based reconfiguration scheduling algorithm. The optimized reconfiguration algorithm based on DVFS proposes a K-means-based method, which reduces memory overhead caused by DVFS-based reconfiguration scheduling. The optimized reconfiguration algorithm based on DVFS improves the reliability of a field programmable gate array (FPGA) system and minimizes the area overhead of a hardware circuit.

    Reaction control and mass spectrometry workstation for coupling an X-ray spectroscopic characterization instrument with an in-situ reaction cell

    公开(公告)号:US11435301B2

    公开(公告)日:2022-09-06

    申请号:US16613801

    申请日:2018-05-25

    Abstract: A reaction control and mass spectrometry workstation for coupling an X-ray spectroscopic characterization instrument with an in-situ reaction cell, including a reactant gas composition control module and an online gas composition analyzing module. The workstation further involves a modification based on the original vacuum pipeline section. After the modification, the original vacuum pipeline section is connected to three customized gas ports, and the modification is characterized in that the vacuum manifold unit is additionally provided with a mass spectrometer sampling port, a sampling capillary, and control valves. The present disclosure has the following advantages. The sampling time delay can be ignored in the mass spectrometry, and the sampling is continuous real-time in-situ analysis with high time resolution. Under the working conditions of the X-ray spectroscopic characterization instrument, the electronic structure/crystal structure information and the precise information of the ambient gas composition are obtained simultaneously.

    ANTIBODIES AGAINST SARS-COV-2 SPIKE PROTEIN

    公开(公告)号:US20220213176A1

    公开(公告)日:2022-07-07

    申请号:US17702710

    申请日:2022-03-23

    Abstract: The present disclosure provides human antibodies and fragments thereof having binding specificity to the SARS-CoV-2 spike protein's receptor binding domain (RBD). The antibodies and fragments have strong affinity and potent neutralization ability against the SARS-CoV-2 virus and various mutant forms. Also provided are trimeric antibodies which have further enhanced neutralization capabilities. The antibodies and fragments thus may be used for preventing or treating SARS-CoV-2 viral infection or detecting the presence of the virus in a sample.

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