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公开(公告)号：US20150355017A1
公开(公告)日：2015-12-10
申请号：US14297348
申请日：2014-06-05
Applicant: SunEdison Inc.
Inventor： Christopher Andrew Clarke , Stephen James Voss , Alemu Tadesse , Anastasios Golnas , Joseph Philip , Joseph Michael Bryan
CPC classification number: G01J1/42 , G01J1/0219 , G01J1/0295 , G01J2001/083 , G01J2001/086 , G01J2001/4266 , G01J2001/4285
Abstract: A method for calibrating irradiance sensors is performed by an irradiance analysis computing device in communication with a memory. The method includes receiving an irradiance estimate representing an expected amount of irradiance, receiving a first irradiance value associated with at least one irradiance sensor, processing the irradiance estimate and the first irradiance value to generate at least one irradiance metric, and determining a condition of said irradiance sensor based at least in part on the at least one irradiance metric.
Abstract translation: 用于校准辐照传感器的方法由与存储器通信的辐照度分析计算装置执行。 该方法包括接收表示辐射度的预期量的辐照度估计，接收与至少一个辐照传感器相关联的第一辐照度值，处理辐照度估计值和第一辐照度值以产生至少一个辐照度量度，以及确定所述 辐射传感器至少部分地基于至少一个辐照度量度。
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72.发明授权Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness 有权用于减少光点缺陷和表面粗糙度的绝缘体半导体晶片制造方法公开(公告)号：US09202711B2
公开(公告)日：2015-12-01
申请号：US14209083
申请日：2014-03-13
Applicant: SunEdison Inc.
Inventor： Qingmin Liu , Jeffrey L. Libbert
IPC: H01L21/324 , H01L21/762 , H01L21/322 , H01L21/302 , H01L21/3065
CPC classification number: H01L21/3247 , H01L21/302 , H01L21/3065 , H01L21/3226 , H01L21/76254
Abstract: A method for reducing light point defects of a semiconductor-on-insulator structure and a method for reducing the surface roughness of a semiconductor-on-insulator structure are disclosed. The methods can include a combination of thermally annealing the structure followed by a non-contact smoothing process.
Abstract translation: 公开了一种用于减少绝缘体上半导体结构的光点缺陷的方法和用于降低绝缘体上半导体结构的表面粗糙度的方法。 该方法可以包括对退火结构进行非接触平滑处理的组合。
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公开(公告)号：US09142616B2
公开(公告)日：2015-09-22
申请号：US14596269
申请日：2015-01-14
Applicant: SunEdison Inc.
Inventor： Robert J. Falster , Vladimir Voronkov
IPC: H01L21/324 , H01L29/16 , H01L21/322
CPC classification number: H01L29/16 , H01L21/3221 , H01L31/1804 , H01L31/1864 , Y02E10/547 , Y02P70/521
Abstract: Processes for suppressing minority carrier lifetime degradation in silicon wafers are disclosed. The processes involve quench cooling the wafers to increase the density of nano-precipitates in the silicon wafers and the rate at which interstitial atoms are consumed by the nano-precipitates.
Abstract translation: 公开了抑制硅晶片中的少数载流子寿命劣化的方法。 该方法包括骤冷冷却晶片以增加硅晶片中的纳米沉淀物的密度以及间隙原子被纳米沉淀物消耗的速率。
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公开(公告)号：US20150151977A1
公开(公告)日：2015-06-04
申请号：US14622326
申请日：2015-02-13
Applicant: SUNEDISON, INC.
Inventor： Puneet Gupta , Henry F. Erk , Alexis Grabbe
CPC classification number: C01B33/043 , B01J8/18 , B01J19/087 , B01J2208/00946 , B01J2219/0803 , C01B33/107 , C01B33/1071 , C01B33/10742 , C25B1/006
Abstract: Methods and systems for producing silane that use electrolysis to regenerate reactive components therein are disclosed. The methods and systems may be substantially closed-loop with respect to halogen, an alkali or alkaline earth metal and/or hydrogen.
Abstract translation: 公开了用于生产使用电解以再生其中的反应性组分的硅烷的方法和系统。 所述方法和系统可以相对于卤素，碱金属或碱土金属和/或氢基本上是闭环的。
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75.发明申请公开(公告)号：US20150144056A1
公开(公告)日：2015-05-28
申请号：US14087604
申请日：2013-11-22
Applicant: SunEdison, Inc.
Inventor： Tirumani N. Swaminathan , John David Hilker , Salvador Zepeda
CPC classification number: C30B15/12 , C30B11/002 , C30B15/002 , C30B29/06 , Y10T117/1052
Abstract: A system for growing an ingot from a melt includes an outer crucible, an inner crucible, and a weir. The outer crucible includes a first sidewall and a first base. The first sidewall and the first base define an outer cavity for containing the melt. The inner crucible is located within the outer cavity, and has a central longitudinal axis. The inner crucible includes a second sidewall and a second base having an opening therein. The opening in the second base is concentric with the central longitudinal axis. The weir is disposed between the outer crucible and the inner crucible for supporting the inner crucible.
Abstract translation: 用于从熔体生长锭的系统包括外坩埚，内坩埚和堰。 外坩埚包括第一侧壁和第一基座。 第一侧壁和第一基座限定用于容纳熔体的外部空腔。 内坩埚位于外腔内，并具有中心纵轴。 内坩埚包括第二侧壁和在其中具有开口的第二基部。 第二基座中的开口与中心纵向轴线同心。 堰体设置在外坩埚和用于支撑内坩埚的内坩埚之间。
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Patent Agency Ranking
76.发明申请公开(公告)号：US20150110702A1
公开(公告)日：2015-04-23
申请号：US14582256
申请日：2014-12-24
Applicant: SunEdison, Inc.
Inventor： Puneet Gupta , Yue Huang , Satish Bhusarapu
IPC: C01B33/027
CPC classification number: C01B33/027 , C01B33/03
Abstract: Production of polycrystalline silicon in substantially closed-loop processes and systems is disclosed. The processes and systems generally involve disproportionation of trichlorosilane to produce silane or dichlorosilane and thermal decomposition of silane or dichlorosilane to produce polycrystalline silicon.
Abstract translation: 公开了在基本闭环过程和系统中生产多晶硅。 方法和系统通常涉及三氯硅烷的歧化以产生硅烷或二氯硅烷以及硅烷或二氯硅烷的热分解以产生多晶硅。
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77.发明申请SEMICONDUCTOR-ON-INSULATOR WAFER MANUFACTURING METHOD FOR REDUCING LIGHT POINT DEFECTS AND SURFACE ROUGHNESS 有权用于减少光点缺陷和表面粗糙度的半导体绝缘体制造方法公开(公告)号：US20140273405A1
公开(公告)日：2014-09-18
申请号：US14209083
申请日：2014-03-13
Applicant: SunEdison Inc.
Inventor： Qingmin Liu , Jeffrey L. Libbert
IPC: H01L21/324 , H01L21/322
CPC classification number: H01L21/3247 , H01L21/302 , H01L21/3065 , H01L21/3226 , H01L21/76254
Abstract: A method for reducing light point defects of a semiconductor-on-insulator structure and a method for reducing the surface roughness of a semiconductor-on-insulator structure are disclosed. The methods can include a combination of thermally annealing the structure followed by a non-contact smoothing process.
Abstract translation: 公开了一种用于减少绝缘体上半导体结构的光点缺陷的方法和用于降低绝缘体上半导体结构的表面粗糙度的方法。 该方法可以包括对退火结构进行非接触平滑处理的组合。
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78.发明申请公开(公告)号：US20140188269A1
公开(公告)日：2014-07-03
申请号：US14136011
申请日：2013-12-20
Applicant: SunEdison, Inc.
Inventor： Benno Orschel , Mike Wolfram
IPC: G05B19/19
CPC classification number: G05B19/0426 , G05B19/418 , G05B2219/32096 , G05B2219/32097 , G05B2219/45031 , Y02P90/02 , Y02P90/20
Abstract: A method and system for computerized coordination of multiple operations to be performed by components of machines are provided. The computer system includes a memory device for storing data and a computer-controlled machine that includes a processor in communication with the memory device wherein the processor is programmed to read a recipe file from the memory device, the recipe file including operating parameter values for controlling the operation of the machine, extract a name of a meta-recipe file from the recipe file, the meta-recipe file including a first portion including parameter properties of operating parameter values used by the meta-recipe file, receive values for the meta-recipe having the parameter properties specified in the first portion, and operate the machine using code from a second portion of the meta-recipe and the received values.
Abstract translation: 提供了一种用于计算机化协调由机器部件执行的多个操作的方法和系统。 计算机系统包括用于存储数据的存储器装置和计算机控制的机器，其包括与存储器装置通信的处理器，其中处理器被编程为从存储器装置读取配方文件，该配方文件包括用于控制的操作参数值 机器的操作，从配方文件中提取元配方文件的名称，包括包括由元配方文件使用的操作参数值的参数属性的第一部分的元配方文件接收元配方文件的值， 配方具有在第一部分中指定的参数属性，并且使用来自元配方的第二部分的代码和接收的值来操作机器。
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79.发明申请PROTECTIVE COATING TO PREVENT REACTION BETWEEN GRAPHITE SUSCEPTOR AND QUARTZ CRUCIBLE 审中-公开保护涂层以防止石墨片和石墨碎片之间的反应公开(公告)号：US20140182511A1
公开(公告)日：2014-07-03
申请号：US14141101
申请日：2013-12-26
Applicant: SunEdison, Inc.
Inventor： Shailendra B. Rathod , Richard J. Phillips
CPC classification number: C30B15/10 , C09D1/00 , Y10T117/1032
Abstract: A susceptor for supporting a crucible includes a body with an interior surface defining a cavity. A coating is disposed on the interior surface to provide a barrier for preventing contact between the body of the susceptor and the crucible disposed within the cavity.
Abstract translation: 用于支撑坩埚的感受体包括具有限定空腔的内表面的主体。 涂层设置在内表面上以提供用于防止基座的主体和设置在空腔内的坩埚之间的接触的屏障。
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公开(公告)号：US20140174338A1
公开(公告)日：2014-06-26
申请号：US14134861
申请日：2013-12-19
Applicant: SunEdison, Inc.
Inventor： Richard J. Phillips , Shailendra B. Rathod
CPC classification number: C30B15/12 , C03B23/20 , C03C27/06 , C03C2217/213 , C30B15/002 , C30B15/20 , C30B29/06 , Y10T117/1052
Abstract: A method of bonding a first silica part to a second silica part includes coating contacting surfaces of the first and second silica parts with a solution having one of silica and silica precursors. The coated surfaces of the first silica part are placed adjacent to the coated surfaces of the second silica part to form an assembly, and the assembly is heated.
Abstract translation: 将第一二氧化硅部分结合到第二二氧化硅部分的方法包括第一和第二二氧化硅部分的涂层接触表面与具有二氧化硅和二氧化硅前体之一的溶液。 第一二氧化硅部分的涂覆表面被放置成与第二二氧化硅部分的涂覆表面相邻以形成组件，并且组件被加热。
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