公开(公告)号：US20070296741A1

公开(公告)日：2007-12-27

申请号：US11681632

申请日：2007-03-02

Applicant: Kyong-Tae Park ,  Beohm-Rock Choi ,  II-Nam Kim ,  Sung-Soo Lee ,  Ji-Hye Choi

Inventor： Kyong-Tae Park ,  Beohm-Rock Choi ,  II-Nam Kim ,  Sung-Soo Lee ,  Ji-Hye Choi

IPC: G09G5/10 ,  G09G3/32

CPC classification number: G09G3/2003 ,  G09G3/3233 ,  G09G2300/0452 ,  G09G2340/06

Abstract: A display device and a driving method using four color pixels, a signal processor that converts three input image signals having gray levels to four output image signals that display four colors based on a look-up table without separate gamma conversion; and a data driver that generates a data voltage based on the output image signal and that supplies the data voltage to the pixels, thereby simplifying signal processing.

Abstract translation: 一种使用四色像素的显示装置和驱动方法，将具有灰度级的三路输入图像信号转换为四路输出图像信号的信号处理器，该四路输出图像信号在没有单独伽马转换的情况下基于查找表显示四种颜色; 以及数据驱动器，其基于输出图像信号生成数据电压，并且将数据电压提供给像素，从而简化信号处理。

公开(公告)号：US07158246B1

公开(公告)日：2007-01-02

申请号：US09580221

申请日：2000-05-26

Applicant: Sung-Soo Lee

Inventor： Sung-Soo Lee

IPC: G06F15/00 ,  H04N1/00

CPC classification number: H04N1/33392 ,  H04N1/33315 ,  H04N2201/33314

Abstract: Disclosed is a method for controlling transmission of fax data according to a data outputting way of a receiving part, the method comprising the steps of: scanning and storing a document to be transmitted from a facsimile of a transmitting part to a facsimile of the receiving part; when the document is completely scanned, dialing a pre-inputted telephone number of the receiving part; after the receiving part telephone number is dialed, requiring and receiving the data outputting way from the receiving part facsimile, in the case that a call for transmitting data of the document is connected between the transmitting part facsimile and the receiving part facsimile; and transmitting the stored document data according to the received data outputting way.

Abstract translation: 公开了一种根据接收部分的数据输出方式控制传真数据传输的方法，所述方法包括以下步骤：扫描和存储要从发送部分的传真发送到接收部分的传真的文件 ; 当文档被完全扫描时，拨打接收部分的预先输入的电话号码; 在接收部分电话号码被拨打后，要求和接收来自接收部分传真的数据输出方式，在发送文件数据的呼叫被连接在发送部分传真和接收部分传真之间的情况下; 以及根据所接收的数据输出方式发送所存储的文档数据。

公开(公告)号：US20060120152A1

公开(公告)日：2006-06-08

申请号：US11228194

申请日：2005-09-19

Applicant: Sung-Soo Lee ,  Young-Ho Lim ,  Hyun-Chul Cho ,  Dong-Hyuk Chae

Inventor： Sung-Soo Lee ,  Young-Ho Lim ,  Hyun-Chul Cho ,  Dong-Hyuk Chae

IPC: G11C16/04

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C2211/5642

Abstract: According to one aspect, a memory cell array includes a bit line connected to a plurality of nonvolatile memory cells, where the nonvolatile memory cells are selectively programmable in any one of at least first, second, third and fourth threshold voltage states, and where the first, second, third and fourth threshold voltage states correspond to four different data values defined by first and second bits. A page buffer circuit stores a logic value as main latch data and is responsive to a main latch signal to selectively flip the logic value of the main latch data according to a voltage level of the bit line. A sub-latch circuit stores a logic value as sub-latch data and is responsive to a sub-latch signal to selectively flip the logic value of the sub-latch data according to the voltage level of the bit line. The memory device is operable in a read mode which reads the threshold voltage state of the non-volatile memory cells and a programming mode which programs the threshold voltage state of the non-volatile memory cells, wherein the page buffer circuit is selectively responsive to the sub-latch data to inhibit flipping of the logic value of the main latch data in the programming mode.

公开(公告)号：US20050270882A1

公开(公告)日：2005-12-08

申请号：US10915294

申请日：2004-08-10

Applicant: Wook-Ghee Han ,  Dae-Seok Byeon ,  Sung-Soo Lee ,  Young-Ho Lim

Inventor： Wook-Ghee Han ,  Dae-Seok Byeon ,  Sung-Soo Lee ,  Young-Ho Lim

IPC: G11C5/14 ,  G11C11/34 ,  G11C16/04 ,  G11C16/12 ,  G11C16/30

CPC classification number: G11C16/12 ,  G11C5/145

Abstract: High voltage generators include a charge pump and a ripple reduction circuit that includes an integrated discharge path. The ripple reduction circuit limits the voltage level from a charge pump when the charge pump is in a first operating mode and provides a discharge path that from the output terminal of the ripple reduction circuit to the output of the charge pump when the charge pump is in a second operating mode. Semiconductor memories incorporating such high voltage generators are also provided. Coupling circuits having an integrated discharge path are also provided.

Abstract translation: 高压发生器包括电荷泵和包括集成放电路径的纹波降低电路。 当电荷泵处于第一操作模式时，纹波降低电路限制来自电荷泵的电压电平，并且当电荷泵处于第一操作模式时提供从脉动降低电路的输出端子到电荷泵的输出的放电路径 第二种操作模式。 还提供了包括这种高电压发生器的半导体存储器。 还提供具有集成放电路径的耦合电路。

公开(公告)号：US06891754B2

公开(公告)日：2005-05-10

申请号：US10927716

申请日：2004-08-27

Applicant: Jae-Yong Jeong ,  Sung-Soo Lee

Inventor： Jae-Yong Jeong ,  Sung-Soo Lee

IPC: G11C16/02 ,  G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/24 ,  G11C7/00

CPC classification number: G11C16/24 ,  G11C16/0483 ,  G11C16/10

Abstract: The invention provides a method of programming in a nonvolatile semiconductor memory device, having a plurality of memory cell strings connected to a plurality of bitlines and constructed of a plurality of memory cell transistors whose gates are coupled to a plurality of wordlines, and a plurality of registers corresponding to the bitlines. The method involves applying a first voltage to a first one of the bitlines and applying a second voltage to a second one of the bitline, the first bitline being adjacent to the second bitline, the first and second voltages being supplied from the registers; electrically isolating the first and second bitlines from their corresponding registers; charging the first bitline up to a third voltage higher than the first voltage and lower than the second voltage; and applying a fourth voltage to a wordline after cutting off current paths into the first and second bitlines.

公开(公告)号：US06853585B2

公开(公告)日：2005-02-08

申请号：US10694920

申请日：2003-10-27

Applicant: Kyeong-Han Lee ,  Sung-Soo Lee

Inventor： Kyeong-Han Lee ,  Sung-Soo Lee

IPC: G11C16/02 ,  G11C11/34 ,  G11C16/04 ,  G11C16/06 ,  G11C16/12 ,  G11C16/34

CPC classification number: G11C16/3459 ,  G11C16/0483 ,  G11C16/3454 ,  G11C2216/14

Abstract: A flash memory device including a memory cell array block including a plurality of flash memory cells. A program verify voltage generating unit variably generates a program verify voltage that verifies flash memory cells programming. A wordline level selecting unit transfers the program verify voltage to the flash memory cells. And a page buffer, including a latch, stores flash memory cell data and resets the latch whenever the program verify voltage is lowered.

Abstract translation: 一种闪速存储器件，包括包括多个闪存单元的存储单元阵列块。 程序验证电压产生单元可变地产生验证闪存单元编程的程序验证电压。 字线电平选择单元将程序验证电压传送到闪存单元。 并且包括锁存器的页缓冲器存储闪存单元数据，并且每当程序验证电压降低时复位该锁存器。

公开(公告)号：US06807098B2

公开(公告)日：2004-10-19

申请号：US10659634

申请日：2003-09-09

Applicant: Jae-Yong Jeong ,  Sung-Soo Lee

Inventor： Jae-Yong Jeong ,  Sung-Soo Lee

IPC: G11C1604

CPC classification number: G11C16/24 ,  G11C16/0483 ,  G11C16/10

Abstract: The invention provides a method of programming in a nonvolatile semiconductor memory device, having a plurality of memory cell strings connected to a plurality of bitlines and constructed of a plurality of memory cell transistors whose gates are coupled to a plurality of wordlines, and a plurality of registers corresponding to the bitlines. The method involves applying a first voltage to a first one of the bitlines and applying a second voltage to a second one of the bitline, the first bitline being adjacent to the second bitline, the first and second voltages being supplied from the registers; electrically isolating the first and second bitlines from their corresponding registers; charging the first bitline up to a third voltage higher than the first voltage and lower than the second voltage; and applying a fourth voltage to a wordline after cutting off current paths into the first and second bitlines.

公开(公告)号：US06776598B2

公开(公告)日：2004-08-17

申请号：US10125402

申请日：2002-04-19

Applicant: Kyung-Soo Park ,  Sung-Soo Lee ,  Hee-Mo Koo

Inventor： Kyung-Soo Park ,  Sung-Soo Lee ,  Hee-Mo Koo

IPC: B29C4514

CPC classification number: B29C45/14655 ,  B29C43/18 ,  B29C43/36 ,  B29C43/58 ,  B29C45/842 ,  H01L21/565 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor chip molding apparatus includes an upper platen including an upper mold, a lower platen including a lower mold having a molding block configured to receive a lead frame, a controller, and an electrical detector for forming an electrical circuit between the controller and the lead frame when the lead frame is oriented improperly on the lower mold. A low-level test voltage is imparted to at least the lower mold. As a result, an electrical signal will flow from the detecting block when the lead frame rests on the detecting block. When such a signal is detected, therefore, the lead frame is determined as having been improperly set on the molding block. The signal generated is detected by a controller and used thereby to interrupt the operation of the molding apparatus.

公开(公告)号：US06531808B2

公开(公告)日：2003-03-11

申请号：US09792037

申请日：2001-02-26

Applicant: Sung-Soo Lee ,  Jae-Ho Lee ,  Jong-Sik Choi

Inventor： Sung-Soo Lee ,  Jae-Ho Lee ,  Jong-Sik Choi

IPC: H01J2934

CPC classification number: H04N9/24 ,  H01J31/20 ,  H01J2231/121 ,  H01J2231/1255

Abstract: A beam index type cathode ray tube having a screen divided into a plurality of areas and a plurality of electron guns corresponding to the divided screen areas. The beam index type cathode ray tube includes a tube of which inner atmosphere is maintained in a vacuum state and a screen formed at one side of an inner surface of the tube. The screen has phosphor stripes and index stripes. A plurality of electron guns are mounted in the tube facing the screen and a plurality of deflectors are mounted on the tube corresponding to the electron guns to deflect electron beams which are radiated from the electron guns to the screen. A plurality of detectors are mounted on the tube corresponding to the electron guns to sense lights emitted from the index stripes.

Abstract translation: 具有划分为多​​个区域的屏幕和对应于划分的屏幕区域的多个电子枪的光束折射率型阴极射线管。 光束折射型阴极射线管包括内部气氛保持在真空状态的管和形成在管的内表面的一侧的丝网。 屏幕上有荧光条纹和索引条纹。 多个电子枪安装在面向屏幕的管中，并且多个偏转器安装在对应于电子枪的管上，以将从电子枪辐射的电子束偏转到屏幕。 多个检测器安装在对应于电子枪的管上以感测从折射条纹发射的光。

公开(公告)号：US06195049B1

公开(公告)日：2001-02-27

申请号：US09393305

申请日：1999-09-10

Applicant: Young-eil Kim ,  Duck-su Kim ,  Sung-soo Lee

Inventor： Young-eil Kim ,  Duck-su Kim ,  Sung-soo Lee

IPC: H01Q138

CPC classification number: H01Q1/243 ,  H01Q1/38 ,  H01Q9/0407

Abstract: A micro-strip patch antenna for a radiotelephone transceiver includes a dielectric ceramic module for transmission and reception having a first ground plate, just one dielectric ceramic part for synchronizing frequencies, a conductive patch on the dielectric ceramic part for transmitting and receiving electromagnetic waves, transmission and reception power supply terminals projecting from different sides of the conductive patch. The antenna also has printed circuit board having a base, a second ground plate on the base to contact the first, and strip lines formed on the base so as to be adjacent but spaced from to the ground plates. The strip lines take care of impedance matching, and antenna provides for the use of a single channel power supply without modification.

Abstract translation: 用于无线电话收发器的微带贴片天线包括用于发射和接收的介电陶瓷模块，其具有第一接地板，仅一个用于同步频率的介电陶瓷部件，用于发射和接收电磁波的电介质陶瓷部件上的导电贴片，传输 以及从导电贴片的不同侧突出的接收电源端子。 该天线还具有印刷电路板，该印刷电路板具有底座，底座上的第二接地板与第一接触部分以及形成在基座上的带状线相邻，但与接地板间隔开。 带状线保护阻抗匹配，天线提供单通道电源的使用而无需修改。