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公开(公告)号:US20130321676A1
公开(公告)日:2013-12-05
申请号:US13889937
申请日:2013-05-08
Applicant: APPLE INC.
Inventor: D. Amnon Silverstein , Suk Hwan Lim , Sheng Lin , Guy Côté
IPC: H04N9/73
CPC classification number: H04N9/73 , H04N5/142 , H04N9/045 , H04N9/735 , H04N2209/046
Abstract: Systems and methods for correcting green channel non-uniformity (GNU) are provided. In one example, GNU may be corrected using energies between the two green channels (Gb and Gr) during green interpolation processes for red and green pixels. Accordingly, the processes may be efficiently employed through implementation using demosaic logic hardware. In addition, the green values may be corrected based on low-pass-filtered values of the green pixels (Gb and Gr). Additionally, green post-processing may provide some defective pixel correction on interpolated greens by correcting artifacts generated through enhancement algorithms.
Abstract translation: 提供了校正绿色通道不均匀性(GNU)的系统和方法。 在一个示例中,可以在用于红色和绿色像素的绿色插值处理期间使用两个绿色通道(Gb和Gr)之间的能量来校正GNU。 因此,可以通过使用去马赛克逻辑硬件的实现来有效地采用该过程。 此外,绿色值可以基于绿色像素的低通滤波值(Gb和Gr)来校正。 此外,绿色后处理可以通过校正通过增强算法产生的伪影来对内插果实提供一些缺陷像素校正。
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公开(公告)号:US20250097596A1
公开(公告)日:2025-03-20
申请号:US18970459
申请日:2024-12-05
Applicant: Apple Inc.
Inventor: Guy Cote , D. Amnon Silverstein , Suk Hwan Lim , Sheng Lin , Haitao Guo
IPC: H04N25/67
Abstract: The present disclosure generally relates to systems and methods for image data processing. In certain embodiments, an image processing pipeline may be configured to receive a frame of the image data having a plurality of pixels acquired using a digital image sensor. The image processing pipeline may then be configured to determine a first plurality of correction factors that may correct each pixel in the plurality of pixels for fixed pattern noise. The first plurality of correction factors may be determined based at least in part on fixed pattern noise statistics that correspond to the frame of the image data. After determining the first plurality of correction factors, the image processing pipeline may be configured to configured to apply the first plurality of correction factors to the plurality of pixels, thereby reducing the fixed pattern noise present in the plurality of pixels.
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公开(公告)号:US12022213B2
公开(公告)日:2024-06-25
申请号:US17829363
申请日:2022-06-01
Applicant: Apple Inc.
Inventor: Sheng Lin , D. Amnon Silverstein , David R. Pope
CPC classification number: H04N25/46 , G06T5/70 , H04N9/646 , H04N23/67 , H04N23/84 , H04N25/445 , H04N25/68
Abstract: Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
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公开(公告)号:US20220303480A1
公开(公告)日:2022-09-22
申请号:US17829363
申请日:2022-06-01
Applicant: Apple Inc.
Inventor: Sheng Lin , D. Amnon Silverstein , David R. Pope
Abstract: Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
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公开(公告)号:US20210235054A1
公开(公告)日:2021-07-29
申请号:US17227187
申请日:2021-04-09
Applicant: Apple Inc.
Inventor: D. Amnon Silverstein
IPC: H04N13/117 , G02B27/01 , G06F3/01
Abstract: Methods and apparatus for focusing in virtual reality (VR) or augmented reality (AR) devices based on gaze tracking information are described. Embodiments of a VR/AR head-mounted display (HMD) may include a gaze tracking system for detecting position and movement of the user's eyes. For AR applications, gaze tracking information may be used to direct external cameras to focus in the direction of the user's gaze so that the cameras focus on objects at which the user is looking. For AR or VR applications, the gaze tracking information may be used to adjust the focus of the eye lenses so that the virtual content that the user is currently looking at on the display has the proper vergence to match the convergence of the user's eyes.
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公开(公告)号:US10979685B1
公开(公告)日:2021-04-13
申请号:US15965539
申请日:2018-04-27
Applicant: Apple Inc.
Inventor: D. Amnon Silverstein
IPC: H04N13/117 , G02B27/01 , G06F3/01
Abstract: Methods and apparatus for focusing in virtual reality (VR) or augmented reality (AR) devices based on gaze tracking information are described. Embodiments of a VR/AR head-mounted display (HMD) may include a gaze tracking system for detecting position and movement of the user's eyes. For AR applications, gaze tracking information may be used to direct external cameras to focus in the direction of the user's gaze so that the cameras focus on objects at which the user is looking. For AR or VR applications, the gaze tracking information may be used to adjust the focus of the eye lenses so that the virtual content that the user is currently looking at on the display has the proper vergence to match the convergence of the user's eyes.
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公开(公告)号:US10375368B2
公开(公告)日:2019-08-06
申请号:US15198376
申请日:2016-06-30
Applicant: Apple Inc.
Inventor: D. Amnon Silverstein
Abstract: Embodiments of the present disclosure relate to an apparatus for converting image data from a Bayer format image to a four-plane image format using two memory channels. An example apparatus includes an interface for receiving the Bayer image including repeating pixel groups, where each pixel group includes a first pixel type, a second pixel type, a third pixel type, and a fourth pixel type. The apparatus also includes a memory and a circuit to write the Bayer image to the memory as four-plane data. The four-plane data includes pixels of the first type and the third type in the Bayer image that are written via the first memory channel, and pixels of the second type and the fourth type in the Bayer image that are written via the second memory channel. Embodiments also relate to converting three sensor image data to a Bayer format image using the two memory channels.
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公开(公告)号:US20180315172A1
公开(公告)日:2018-11-01
申请号:US15499659
申请日:2017-04-27
Applicant: Apple Inc.
Inventor: Maxim W. Smirnov , D. Amnon Silverstein
CPC classification number: G06T5/10 , G06T7/0002 , G06T2207/20028 , G06T2207/20172
Abstract: Embodiments of the present disclosure relate to performing noise reduction on an input image by first filtering the input image based on coarse noise models of pixels and then subsequently filtering the filtered input image based on finer noise models. The finer noise models use the same or more number of neighboring pixels than the coarse noise filters. The first filtering and subsequent filtering of a pixel in the input image use Mahalanobis distances between the pixel and its neighboring pixels. By performing iterations of filtering using more refined noise models, the noise reduction in the input image can be performed more efficiently and effectively.
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公开(公告)号:US10038845B2
公开(公告)日:2018-07-31
申请号:US15414866
申请日:2017-01-25
Applicant: Apple Inc.
Inventor: D. Amnon Silverstein , Shun Wai Go , Suk Hwan Lim , Timothy J. Millet , Ting Chen , Bin Ni
CPC classification number: H04N5/23245 , H04N1/212 , H04N5/23216 , H04N5/23232 , H04N5/23293 , H04N7/0122 , H04N9/87
Abstract: In an embodiment, an electronic device may be configured to capture still frames during video capture, but may capture the still frames in the 4×3 aspect ratio and at higher resolution than the 16×9 aspect ratio video frames. The device may interleave high resolution, 4×3 frames and lower resolution 16×9 frames in the video sequence, and may capture the nearest higher resolution, 4×3 frame when the user indicates the capture of a still frame. Alternatively, the device may display 16×9 frames in the video sequence, and then expand to 4×3 frames when a shutter button is pressed. The device may capture the still frame and return to the 16×9 video frames responsive to a release of the shutter button.
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公开(公告)号:US09992467B2
公开(公告)日:2018-06-05
申请号:US15198907
申请日:2016-06-30
Applicant: Apple Inc.
Inventor: Suk Hwan Lim , D. Amnon Silverstein , David R. Pope
IPC: H04N5/228 , H04N9/73 , H04N5/76 , H04N9/64 , G06T1/20 , H04N5/262 , G06T3/40 , G06T5/00 , G06T5/40
CPC classification number: H04N9/646 , G06T1/20 , G06T3/4015 , G06T5/009 , G06T5/40 , G06T2207/10024 , G06T2207/20072 , H04N5/2628
Abstract: Embodiments relate to an architecture of a vision pipe included in an image signal processor. The architecture includes a front-end portion that includes a pair of image signal pipelines that generate an updated luminance image data. A back-end portion of the vision pipe architecture receives the updated luminance images from the front-end portion and performs, in parallel, scaling and various computer vision operations on the updated luminance image data. The back-end portion may repeatedly perform this parallel operation of computer vision operations on successively scaled luminance images to generate a pyramid image.
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