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    Method for forming semiconductor devices with active silicon height variation
    71.
    发明授权
    Method for forming semiconductor devices with active silicon height variation 有权
    用于形成活性硅高度变化的半导体器件的方法

    公开(公告)号：US07666735B1

    公开(公告)日：2010-02-23

    申请号：US11053935

    申请日：2005-02-10

    申请人： David E. Brown ,  Hans Van Meer ,  Sey-Ping Sun

    发明人： David E. Brown ,  Hans Van Meer ,  Sey-Ping Sun

    IPC分类号： H01L21/8238

    CPC分类号： H01L29/0684 ,  H01L21/84 ,  H01L27/1203

    摘要： A method for forming different active thicknesses on the same silicon layer includes masking the silicon layer and exposing selected regions of the silicon layer. The thickness of the silicon layer at the exposed regions is changed, either by adding silicon or subtracting silicon from the layer at the exposed regions. Once the mask is removed, the silicon layer has regions of different active thicknesses, respectively suitable for use in different types of devices, such as diodes and transistors.

    摘要翻译： 在同一硅层上形成不同有源厚度的方法包括掩蔽硅层并暴露硅层的选定区域。 通过在曝光区域从层中添加硅或从中减去硅来改变暴露区域处的硅层的厚度。 一旦去除掩模，硅层就具有不同有源厚度的区域，分别适用于不同类型的器件，例如二极管和晶体管。

    METHOD OF CONTROLLING EMBEDDED MATERIAL/GATE PROXIMITY
    72.
    发明申请
    METHOD OF CONTROLLING EMBEDDED MATERIAL/GATE PROXIMITY 有权
    控制嵌入材料/栅格近似的方法

    公开(公告)号：US20090280579A1

    公开(公告)日：2009-11-12

    申请号：US12119196

    申请日：2008-05-12

    申请人： Rohit Pal ,  David E. Brown ,  Alok Vaid ,  Kevin Lensing

    发明人： Rohit Pal ,  David E. Brown ,  Alok Vaid ,  Kevin Lensing

    IPC分类号： H01L21/66

    CPC分类号： H01L29/7848 ,  H01L22/12 ,  H01L22/20 ,  H01L29/66636 ,  H01L29/78

    摘要： A method that includes forming a gate of a semiconductor device on a substrate and forming a recess for an embedded silicon-straining material in source and drain regions for the gate. In this method, a proximity value, which is defined as a distance between the gate and a closest edge of the recess, is controlled by controlling formation of an oxide layer provided beneath the gate. The method can also include feedforward control of process steps in the formation of the recess based upon values measured during the formation of the recess. The method can also apply feedback control to adjust a subsequent recess formation process performed on a subsequent semiconductor device based on the comparison between a measured proximity value and a target proximity value to decrease a difference between a proximity value of the subsequent semiconductor device and the target proximity value.

    摘要翻译： 一种方法，包括在衬底上形成半导体器件的栅极，并在栅极的源极和漏极区域中形成嵌入的硅应变材料的凹部。 在该方法中，通过控制形成在栅极下方的氧化物层来控制被定义为栅极和凹部的最近边缘之间的距离的接近值。 该方法还可以包括基于在形成凹部期间测量的值来形成凹部中的工艺步骤的前馈控制。 该方法还可以基于测量的接近度值和目标接近值之间的比较来应用反馈控制来调整对随后的半导体器件执行的随后的凹陷形成处理，以减小随后的半导体器件的接近值与目标之间的差异 接近值。

    Methods for producing a black matrix on a lenticular lens
    75.
    发明授权
    Methods for producing a black matrix on a lenticular lens 失效
    在双凸透镜上制造黑色矩阵的方法

    公开(公告)号：US07317577B2

    公开(公告)日：2008-01-08

    申请号：US10846906

    申请日：2004-05-14

    申请人： M. Zaki Ali ,  David E. Brown ,  Elsie A. Fohrenkamm

    发明人： M. Zaki Ali ,  David E. Brown ,  Elsie A. Fohrenkamm

    IPC分类号： G02B27/10

    CPC分类号： G03B21/625

    摘要： An opaque matrix that defines transparent apertures may be formed on a lenticular lens by applying an infrared radiation sensitive material to the flat surface of the lenticular lens, projecting infrared radiation through the lenticular lens onto the infrared radiation sensitive material to create exposed and unexposed areas of the infrared radiation sensitive material, and removing the exposed areas of the infrared radiation sensitive material from the flat surface of the lenticular lens. The infrared radiation sensitive material includes an infrared absorbing dye and a colorant. The infrared radiation sensitive material may also include a binder. A barrier layer may be disposed between the flat surface of the lenticular lens and the infrared radiation sensitive material. The barrier layer may include a binder, an infrared absorbing dye, and a crosslinking agent. The resulting lenticular lens may be used in a rear projection television screen or monitor.

    摘要翻译： 限定透明孔的不透明矩阵可以通过将红外辐射敏感材料施加到双凸透镜的平坦表面上而形成在双凸透镜上，将红外辐射通过双凸透镜投射到红外辐射敏感材料上，以产生暴露和未曝光的区域 红外辐射敏感材料，以及从双凸透镜的平坦表面去除红外辐射敏感材料的暴露区域。 红外辐射敏感材料包括红外吸收染料和着色剂。 红外辐射敏感材料还可以包括粘合剂。 阻挡层可以设置在双凸透镜的平坦表面和红外辐射敏感材料之间。 阻挡层可以包括粘合剂，红外吸收染料和交联剂。 所得到的双凸透镜可以用在背投电视屏幕或监视器中。

    Method, system and apparatus to detect defects in semiconductor devices
    76.
    发明授权
    Method, system and apparatus to detect defects in semiconductor devices 有权
    检测半导体器件缺陷的方法，系统和装置

    公开(公告)号：US06943569B1

    公开(公告)日：2005-09-13

    申请号：US10121252

    申请日：2002-04-12

    申请人： Laura Pressley ,  David E. Brown ,  Travis Lewis ,  Edward E. Ehrichs ,  Paul R. Besser

    发明人： Laura Pressley ,  David E. Brown ,  Travis Lewis ,  Edward E. Ehrichs ,  Paul R. Besser

    IPC分类号： G01R27/08 ,  G01R31/302 ,  G01R31/305

    CPC分类号： G01R31/307 ,  G06T7/0006 ,  G06T2207/10056 ,  G06T2207/20068 ,  G06T2207/30148 ,  H01J2237/2817 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method and system to locate and detect voids in films that are involved in critical dimension (CD) structures and non-critical dimension structures in semiconductor devices are presented. One or more test structures (resolution devices) are formed on a semiconductor wafer. A scanning electron microscope is operated in voltage contrast mode to obtain a digital representation of the test structure. The voltage contrast image of the test structure is then analyzed with a system which automates the location, identification, and categorization of voids in the test structure. Additionally, the method is more sensitive to electrical marginalities caused by voids than other wafer electrical testing methods. The method is suitable inline monitoring during a manufacturing process by utilizing the automation of void identification, location, and categorization as a process monitoring parameter.

    摘要翻译： 提出了一种在半导体器件中涉及关键尺寸（CD）结构和非关键尺寸结构的薄膜中定位和检测空隙的方法和系统。 在半导体晶片上形成一个或多个测试结构（分辨率器件）。 扫描电子显微镜以电压对比模式工作，以获得测试结构的数字表示。 然后用自动化测试结构中空隙的位置，识别和分类的系统分析测试结构的电压对比图像。 此外，该方法比其他晶片电气测试方法对由空隙引起的电气边界更敏感。 该方法通过利用空白识别，位置和分类的自动化作为过程监控参数，在制造过程中适合于在线监测。

    Test structure to monitor the effects of polysilicon pre-doping
    78.
    发明授权
    Test structure to monitor the effects of polysilicon pre-doping 失效
    测试结构来监测多晶硅预掺杂的影响

    公开(公告)号：US06469316B1

    公开(公告)日：2002-10-22

    申请号：US09756523

    申请日：2001-01-08

    申请人： John J. Bush ,  Mark I. Gardner ,  David E. Brown

    发明人： John J. Bush ,  Mark I. Gardner ,  David E. Brown

    IPC分类号： H01L2358

    CPC分类号： H01L22/34

    摘要： Various embodiments of a test circuit and methods of fabricating and using the same are provided. In one aspect, a test circuit includes a semiconductor substrate and a mask thereon that has an opening to enable impurity doping of selected portions of the test circuit. A plurality of circuit devices are provided on the substrate that have respective active regions positioned at staggered known distances from the mask opening. Each of the plurality of circuit devices has a gate electrode that extends to the opening and has a first impurity region of a first conductivity type and a second impurity region of a second and opposite conductivity type. Where the predicted on-state output current of a given circuit device exceeds an actual output current of the given circuit device, there is indication of an overlap between the first and second impurity regions of the gate electrode of the given device.

    摘要翻译： 提供了测试电路的各种实施例及其制造和使用方法。 在一个方面，测试电路包括半导体衬底及其上的掩模，该半导体衬底和掩模具有开口以使得能够对测试电路的选定部分进行杂质掺杂。 多个电路装置设置在基板上，其各自的有源区域以与掩模开口交错的已知距离定位。 多个电路装置中的每一个具有延伸到开口的栅电极，并且具有第一导电类型的第一杂质区和第二导电类型和相反导电类型的第二杂质区。 在给定电路装置的预测导通状态输出电流超过给定电路装置的实际输出电流的情况下，存在给定装置的栅电极的第一和第二杂质区之间重叠的指示。

    Electrochemical organic synthesis
    80.
    发明授权
    Electrochemical organic synthesis 失效
    电化学有机合成

    公开(公告)号：US4474652A

    公开(公告)日：1984-10-02

    申请号：US578665

    申请日：1984-02-09

    申请人： David E. Brown ,  Stephen M. Hall ,  Mahmood N. Mahmood

    发明人： David E. Brown ,  Stephen M. Hall ,  Mahmood N. Mahmood

    IPC分类号： C25B3/04 ,  C25B1/00

    CPC分类号： C25B3/04

    摘要： The present invention relates to an electrochemical process for synthesizing carboxylic acids by reduction of gaseous oxides of carbon in which a gas transfer electrode is used as the cathode.The gas transfer electrodes are preferably used as hydrophobic gas transfer electrodes. In carrying out the process it is particularly preferred to use porous, hydrophobic gas transfer electrodes made from an electrocatalyst e.g. carbon, bound in a polymer such as polyethylene or polytetrafluoroethylene (PTFE). In the case of some reactions another electro-catalyst may be added to the carbon/polymer mixture.The process is particularly suited to producing acids such as formic acid and oxalic acid.

    摘要翻译： 本发明涉及通过还原其中使用气体转移电极作为阴极的碳的气态氧化物来合成羧酸的电化学方法。 气体转移电极优选用作疏水性气体转移电极。 在进行该方法时，特别优选使用由电催化剂制成的多孔疏水性气体转移电极。 碳，结合在聚合物如聚乙烯或聚四氟乙烯（PTFE）中。 在一些反应的情况下，可以向碳/聚合物混合物中加入另一种电催化剂。 该方法特别适用于生产酸如甲酸和草酸。