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公开(公告)号：US20100265771A1
公开(公告)日：2010-10-21
申请号：US12829885
申请日：2010-07-02
CPC分类号： G11C16/0483 , G11C16/10 , G11C16/3454
摘要： Method of programming memory cells of series strings of memory cells include programming a target memory cell of a series string of memory cells after programming each memory cell of the string located between the target memory cell and a first end of the string, and verifying the programming of the target memory cell by applying a bias at a second end of the string opposite the first end and sensing a voltage developed at the first end in response to the bias.
摘要翻译： 编程存储器单元串的存储器单元的方法包括在对位于目标存储器单元和串的第一端之间的串的每个存储器单元进行编程之后对存储单元的串联串的目标存储器单元进行编程，以及验证编程 通过在与第一端相对的串的第二端处施加偏压并且响应于该偏压感测在第一端产生的电压来实现目标存储器单元。
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72.发明授权Analog sensing of memory cells with a source follower driver in a semiconductor memory device 有权在半导体存储器件中用源极跟随器驱动器对存储器单元进行模拟感测公开(公告)号：US07751253B2
公开(公告)日：2010-07-06
申请号：US12049604
申请日：2008-03-17
IPC分类号： G11C16/06
CPC分类号： G11C16/26 , G11C11/5642 , G11C16/0483 , G11C16/28 , G11C16/3481 , G11C27/02 , G11C27/024 , G11C2211/5634
摘要： Memory devices, methods, and sample and hold circuits are disclosed, including a memory device that includes a sample and hold circuit coupled to a bit line. One such sample and hold circuit includes a read circuit, a verify circuit, and a reference circuit. The read circuit stores a read threshold voltage that was read from a selected memory cell. The verify circuit stores a target threshold voltage that is compared to the read threshold voltage to generate an inhibit signal when the target and read threshold voltages are substantially equal. The reference circuit stores a reference threshold voltage that can be used to translate the read threshold voltage to compensate for a transistor voltage drop and/or temperature variations.
摘要翻译： 公开了存储器件，方法和采样和保持电路，包括包括耦合到位线的采样和保持电路的存储器件。 一个这样的采样和保持电路包括读取电路，验证电路和参考电路。 读取电路存储从所选存储单元读取的读取阈值电压。 验证电路存储与读取的阈值电压相比较的目标阈值电压，以在目标和读取阈值电压基本相等时产生禁止信号。 参考电路存储参考阈值电压，该参考阈值电压可用于转换读取阈值电压以补偿晶体管电压降和/或温度变化。
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公开(公告)号：US20100146329A1
公开(公告)日：2010-06-10
申请号：US12706409
申请日：2010-02-16
CPC分类号： G11C16/3404 , G11C11/5621 , G11C16/0483 , G11C27/005
摘要： Memory devices and methods adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices processing and generating only binary data signals indicative of individual bits. Programming of such memory devices includes programming to a target threshold voltage range representative of the desired bit pattern. Reading such memory devices includes generating an analog data signal indicative of a threshold voltage of a target memory cell. Warning of cell deterioration can be performed using reference cells programmed in accordance with a known pattern such as to approximate deterioration of non-volatile memory cells of the device.
摘要翻译： 适于处理和产生表示两个或更多位信息的数据值的模拟数据信号的存储器件和方法有助于相对于器件处理和仅产生指示各个位的二进制数据信号的数据传输速率的增加。 这种存储器件的编程包括编程到表示所需位图案的目标阈值电压范围。 读取这样的存储器件包括产生指示目标存储器单元的阈值电压的模拟数据信号。 可以使用根据已知图案编程的参考单元来执行电池劣化的警告，以便近似装置的非易失性存储单元的劣化。
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公开(公告)号：US07639532B2
公开(公告)日：2009-12-29
申请号：US11869868
申请日：2007-10-10
IPC分类号： G11C16/00
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C27/005
摘要： Memory devices adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices processing and generating only binary data signals indicative of individual bits. Programming of such memory devices includes programming to a target threshold voltage range representative of the desired bit pattern. Reading such memory devices includes generating an analog data signal indicative of a threshold voltage of a target memory cell. Threshold voltage ranges of the memory cells have a larger range size for ranges that include lower threshold voltages and a smaller range size for ranges that include higher threshold voltages since program disturb is lower at higher threshold voltages.
摘要翻译： 适于处理和产生表示两个或更多位信息的数据值的模拟数据信号的存储器件有助于相对于器件处理和仅产生指示各个位的二进制数据信号的数据传输速率的增加。 这种存储器件的编程包括编程到表示所需位图案的目标阈值电压范围。 读取这样的存储器件包括产生指示目标存储器单元的阈值电压的模拟数据信号。 存储器单元的阈值电压范围对于包括较低阈值电压的范围具有较大的范围尺寸，并且对于包括较高阈值电压的范围的较小范围尺寸，因为在较高阈值电压下编程干扰较低。
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公开(公告)号：US20090106482A1
公开(公告)日：2009-04-23
申请号：US11873894
申请日：2007-10-17
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： In one or more embodiments, a memory device is disclosed as having an adjustable programming window having a plurality of programmable levels. The programming window is moved to compensate for changes in reliable program and erase thresholds achievable as the memory device experiences factors such as erase/program cycles that change the program window. The initial programming window is determined prior to an initial erase/program cycle. The programming levels are then moved as the programming window changes, such that the plurality of programmable levels still remain within the program window and are tracked with the program window changes.
摘要翻译： 在一个或多个实施例中，公开了存储器件具有可编程窗口，其具有多个可编程级。 移动编程窗口以补偿由于存储器件经历改变程序窗口的擦除/编程周期等因素而可实现的可靠程序和擦除阈值的变化。 在初始擦除/编程周期之前确定初始编程窗口。 然后随着编程窗口的改变，编程级别被移动，使得多个可编程级别仍然保留在程序窗口内并且随着程序窗口的改变而跟踪。
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76.发明申请ANALOG-TO-DIGITAL AND DIGITAL-TO-ANALOG CONVERSION WINDOW ADJUSTMENT BASED ON REFERENCE CELLS IN A MEMORY DEVICE 有权基于存储器件中的参考电池的模拟到数字和数字到模拟转换窗口调整公开(公告)号：US20090066547A1
公开(公告)日：2009-03-12
申请号：US11851649
申请日：2007-09-07
IPC分类号： H03M1/00
CPC分类号： G11C16/06 , G11C7/16 , G11C11/5621 , G11C16/0483 , G11C27/005 , G11C2211/5634
摘要： An analog-to-digital conversion window is defined by reference voltages stored in reference memory cells of a memory device. A first reference voltage is read to define an upper limit of the conversion window and a second reference voltage is read to define a lower limit of the conversion window. An analog voltage representing a digital bit pattern is read from a memory cell and converted to the digital bit pattern by an analog-to-digital conversion process using the conversion window as the limits for the sampling process. This scheme helps in real time tracking of the ADC window with changes in the program window of the memory array.
摘要翻译： 模数转换窗口由存储在存储器件的参考存储单元中的参考电压定义。 读取第一参考电压以限定转换窗口的上限，并且读取第二参考电压以定义转换窗口的下限。 表示数字位模式的模拟电压从存储单元读取，并通过使用转换窗口作为采样处理的限制的模数转换处理转换为数字位模式。 该方案通过存储器阵列的程序窗口的改变，有助于实时跟踪ADC窗口。
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公开(公告)号：US08281061B2
公开(公告)日：2012-10-02
申请号：US12059831
申请日：2008-03-31
申请人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
发明人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
CPC分类号： G06F11/1072 , G06F12/0246 , G06F2212/7205 , G06F2212/7208 , G11C11/5628 , G11C29/52 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data reliability during storage to higher density memory and methods for managing data across multiple memory arrays are also disclosed.
摘要翻译： 用于利用不同密度存储单元的存储器阵列来管理存储器件中的数据存储的方法和装置。 数据最初可以存储在较低密度的存储器中。 可以将数据进一步读取，压缩，调节并写入高密度存储器作为后台操作。 还公开了用于在存储到更高密度存储器期间提高数据可靠性的数据调节方法以及用于跨多个存储器阵列管理数据的方法。
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公开(公告)号：US20130007355A1
公开(公告)日：2013-01-03
申请号：US13616486
申请日：2012-09-14
申请人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
发明人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
IPC分类号： G06F12/00
CPC分类号： G06F11/1072 , G06F12/0246 , G06F2212/7205 , G06F2212/7208 , G11C11/5628 , G11C29/52 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data reliability during storage to higher density memory and methods for managing data across multiple memory arrays are also disclosed.
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公开(公告)号：US20090248952A1
公开(公告)日：2009-10-01
申请号：US12059831
申请日：2008-03-31
申请人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
发明人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
IPC分类号： G06F12/00
CPC分类号： G06F11/1072 , G06F12/0246 , G06F2212/7205 , G06F2212/7208 , G11C11/5628 , G11C29/52 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data reliability during storage to higher density memory and methods for managing data across multiple memory arrays are also disclosed.
摘要翻译： 用于利用不同密度存储单元的存储器阵列来管理存储器件中的数据存储的方法和装置。 数据最初可以存储在较低密度的存储器中。 可以将数据进一步读取，压缩，调节并写入高密度存储器作为后台操作。 还公开了用于在存储到更高密度存储器期间提高数据可靠性的数据调节方法以及用于跨多个存储器阵列管理数据的方法。
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公开(公告)号：US08762629B2
公开(公告)日：2014-06-24
申请号：US13616486
申请日：2012-09-14
申请人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
发明人： William H. Radke , Vishal Sarin , Jung-Sheng Hoei
CPC分类号： G06F11/1072 , G06F12/0246 , G06F2212/7205 , G06F2212/7208 , G11C11/5628 , G11C29/52 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data reliability during storage to higher density memory and methods for managing data across multiple memory arrays are also disclosed.
摘要翻译： 用于利用不同密度存储单元的存储器阵列来管理存储器件中的数据存储的方法和装置。 数据最初可以存储在较低密度的存储器中。 可以将数据进一步读取，压缩，调节并写入高密度存储器作为后台操作。 还公开了用于在存储到更高密度存储器期间提高数据可靠性的数据调节方法以及用于跨多个存储器阵列管理数据的方法。
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