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    Semiconductor device
    73.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07635891B2

    公开(公告)日：2009-12-22

    申请号：US11946606

    申请日：2007-11-28

    申请人： Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Masayuki Tanaka ,  Kazuaki Nakajima ,  Yoshio Ozawa ,  Akihito Yamamoto

    发明人： Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Masayuki Tanaka ,  Kazuaki Nakajima ,  Yoshio Ozawa ,  Akihito Yamamoto

    IPC分类号： H01L27/115

    CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/513 ,  H01L29/7881

    摘要： A semiconductor device includes a semiconductor substrate, and a memory cell array provided on the semiconductor substrate and including a plurality of memory cells arranged on the semiconductor substrate, each of the plurality of the memory cells including a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer, and a control electrode containing metal or metal silicide provided on the charge storage layer via the second insulating film, wherein a corner of a lower part of the control electrode includes semiconductor and fails to contain the metal or the metal silicide in a channel width direction view of the memory cell.

    摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上并且包括布置在半导体衬底上的多个存储单元的存储单元阵列，多个存储单元中的每一个包括设置在半导体衬底上的第一绝缘膜， 设置在所述第一绝缘膜上的电荷存储层，设置在所述电荷存储层上的第二绝缘膜，以及经由所述第二绝缘膜设置在所述电荷存储层上的含有金属或金属硅化物的控制电极， 的控制电极包括半导体，并且在存储单元的沟道宽度方向视图中不能容纳金属或金属硅化物。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    74.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体存储器件及其制造方法

    公开(公告)号：US20090001448A1

    公开(公告)日：2009-01-01

    申请号：US12118328

    申请日：2008-05-09

    申请人： Katsuyuki Sekine ,  Masayuki Tanaka ,  Katsuaki Natori ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Yoshio Ozawa ,  Akihito Yamamoto

    发明人： Katsuyuki Sekine ,  Masayuki Tanaka ,  Katsuaki Natori ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Yoshio Ozawa ,  Akihito Yamamoto

    IPC分类号： H01L29/00 ,  H01L21/3205

    CPC分类号： H01L21/3105 ,  H01L21/02126 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/31612 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/42324

    摘要： A semiconductor memory device having a cell size of 60 nm or less includes a tunnel insulation film formed in a channel region of a silicon substrate containing a burying insulation film, a first conductive layer formed on the tunnel insulation film, an inter-electrode insulation film formed on the burying insulation film and the first conductive layer, a second conductive layer formed on the inter-electrode insulation film, a side wall insulation film formed on the side walls of the first conductive layer, the second conductive layer, and the inter-electrode insulation film, and an inter-layer insulation film formed on the side wall insulation film. The tunnel insulation film or the inter-electrode insulation film contains a high-dielectric insulation film. The side wall insulation film contains a predetermined concentration of carbon and nitrogen as well as chlorine having a concentration of 1×1019 atoms/cm3 or less.

    摘要翻译： 具有60nm以下的单元尺寸的半导体存储器件包括形成在包含掩埋绝缘膜的硅衬底的沟道区域中的隧道绝缘膜，形成在隧道绝缘膜上的第一导电层，电极间绝缘膜 形成在掩埋绝缘膜和第一导电层上的第二导电层，形成在电极间绝缘膜上的第二导电层，形成在第一导电层，第二导电层和第二导电层的侧壁上的侧壁绝缘膜， 电极绝缘膜和形成在侧壁绝缘膜上的层间绝缘膜。 隧道绝缘膜或电极间绝缘膜包含高介电绝缘膜。 侧壁绝缘膜含有预定浓度的碳氮，以及浓度为1×1019原子/ cm3以下的氯。

    Semiconductor device and method for manufacturing the same
    75.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08110865B2

    公开(公告)日：2012-02-07

    申请号：US12888140

    申请日：2010-09-22

    申请人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    发明人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7883

    摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.

    摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 ，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质 大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

    Semiconductor device
    77.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07612404B2

    公开(公告)日：2009-11-03

    申请号：US11783933

    申请日：2007-04-13

    申请人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujisuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    发明人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujisuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/513

    摘要： A semiconductor device includes semiconductor substrate, isolation insulating film, nonvolatile memory cells, each of the cells including tunnel insulating film, FG electrode, CG electrode, interelectrode insulating film between the CG and FG electrodes and including a first insulating film and a second insulating film on the first insulating film and having higher permittivity than the first insulating film, the interelectrode insulating film being provided on a side wall of the floating gate electrode in a cross-section view of a channel width direction of the cell, thickness of the interelectrode insulating film increasing from an upper portion of the side wall toward a lower portion of the side wall, thickness of the second insulating film on an upper corner of the FG electrode being thicker than thickness of the second insulating film on the other portions of the side wall in the cross-section view of the channel width direction.

    摘要翻译： 半导体器件包括半导体衬底，隔离绝缘膜，非易失性存储单元，每个单元包括隧道绝缘膜，FG电极，CG电极，CG和FG电极之间的电极间绝缘膜，并且包括第一绝缘膜和第二绝缘膜 在第一绝缘膜上并且具有比第一绝缘膜高的介电常数，电极间绝缘膜设置在浮栅电极的侧壁上，在电池的沟道宽度方向的横截面图中，绝缘电极的绝缘层的厚度 膜从侧壁的上部向侧壁的下部增加，FG电极的上角上的第二绝缘膜的厚度比侧壁的其他部分上的第二绝缘膜的厚度厚 在通道宽度方向的横截面视图中。

    Semiconductor device
    78.
    发明申请
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US20070241388A1

    公开(公告)日：2007-10-18

    申请号：US11783933

    申请日：2007-04-13

    申请人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    发明人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/513

    摘要： A semiconductor device includes semiconductor substrate, isolation insulating film, nonvolatile memory cells, each of the cells including tunnel insulating film, FG electrode, CG electrode, interelectrode insulating film between the CG and FG electrodes and including a first insulating film and a second insulating film on the first insulating film and having higher permittivity than the first insulating film, the interelectrode insulating film being provided on a side wall of the floating gate electrode in a cross-section view of a channel width direction of the cell, thickness of the interelectrode insulating film increasing from an upper portion of the side wall toward a lower portion of the side wall, thickness of the second insulating film on an upper corner of the FG electrode being thicker than thickness of the second insulating film on the other portions of the side wall in the cross-section view of the channel width direction.

    摘要翻译： 半导体器件包括半导体衬底，隔离绝缘膜，非易失性存储单元，每个单元包括隧道绝缘膜，FG电极，CG电极，CG和FG电极之间的电极间绝缘膜，并且包括第一绝缘膜和第二绝缘膜 在第一绝缘膜上并且具有比第一绝缘膜高的介电常数，电极间绝缘膜设置在浮栅电极的侧壁上，在电池的沟道宽度方向的横截面图中，绝缘电极的绝缘层的厚度 膜从侧壁的上部向侧壁的下部增加，FG电极的上角上的第二绝缘膜的厚度比侧壁的其他部分上的第二绝缘膜的厚度厚 在通道宽度方向的横截面视图中。

    Semiconductor device and method for manufacturing the same
    79.
    再颁专利
    Semiconductor device and method for manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：USRE44630E1

    公开(公告)日：2013-12-10

    申请号：US13616208

    申请日：2012-09-14

    申请人： Tetsuya Kai ,  Ryuji Ohba ,  Yoshio Ozawa

    发明人： Tetsuya Kai ,  Ryuji Ohba ,  Yoshio Ozawa

    IPC分类号： H01L21/331

    CPC分类号： H01L21/28273 ,  B82Y10/00 ,  H01L21/28282 ,  H01L27/11521 ,  H01L29/42332 ,  H01L29/7881

    摘要： A semiconductor device includes a semiconductor substrate, and a nonvolatile memory cell provided on the semiconductor substrate, the nonvolatile memory cell including a tunnel insulating film provided on a surface of the semiconductor substrate, the tunnel insulating film including semiconductor grains, the semiconductor grains included in both end portions of the tunnel insulating film having smaller grain size than the semiconductor grains included in other portions of the tunnel insulating film, a charge storage layer provided on the tunnel insulating film, an insulating film provided on the charge storage layer, and a control gate electrode provided on the insulating film.

    摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上的非易失性存储单元，所述非易失性存储单元包括设置在所述半导体衬底的表面上的隧道绝缘膜，所述隧道绝缘膜包括半导体晶粒，所述半导体晶粒包括在 隧道绝缘膜的两端部比隧道绝缘膜的其他部分所包含的半导体晶粒小的晶粒尺寸，隧道绝缘膜上设置的电荷存储层，设置在电荷存储层上的绝缘膜，以及控制 栅电极设置在绝缘膜上。

    Semiconductor device and method of manufacturing the same
    80.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08604536B2

    公开(公告)日：2013-12-10

    申请号：US12406841

    申请日：2009-03-18

    申请人： Katsuyuki Sekine ,  Yoshio Ozawa

    发明人： Katsuyuki Sekine ,  Yoshio Ozawa

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/66833

    摘要： A semiconductor device includes a memory cell transistor including a first lower insulating film provided on a semiconductor substrate, a first intermediate insulating film provided on the first lower insulating film, a first upper insulating film provided on the first intermediate insulating film, and a first gate electrode provided on the first upper insulating film, and a select transistor including a second lower insulating film provided on the semiconductor substrate, a second intermediate insulating film provided on the second lower insulating film, a second upper insulating film provided on the second intermediate insulating film, and a second gate electrode provided on the second upper insulating film, wherein trap density of the second intermediate insulating film is lower than that of the first intermediate insulating film.

    摘要翻译： 半导体器件包括存储单元晶体管，其包括设置在半导体衬底上的第一下绝缘膜，设置在第一下绝缘膜上的第一中间绝缘膜，设置在第一中间绝缘膜上的第一上绝缘膜和第一栅极 设置在第一上绝缘膜上的电极和设置在半导体衬底上的第二下绝缘膜的选择晶体管，设置在第二下绝缘膜上的第二中间绝缘膜，设置在第二中间绝缘膜上的第二上绝缘膜 以及设置在第二上绝缘膜上的第二栅电极，其中第二中间绝缘膜的阱密度低于第一中间绝缘膜的陷阱密度。