Catheter product package and method of forming same
    71.
    发明授权
    Catheter product package and method of forming same 有权
    导管产品包装及其形成方法

    公开(公告)号:US08356457B2

    公开(公告)日:2013-01-22

    申请号:US12824792

    申请日:2010-06-28

    CPC classification number: B65D51/00 A61M25/002 A61M25/0111

    Abstract: A catheter product package and method of forming same in which the package comprises a sheet material wrapped about the catheter product to form a package for the catheter product. The catheter product extends generally longitudinally within the package, and the sheet material extends from a point beyond the proximal end to a point beyond the distal end of the catheter product. The sheet material of the package is wrapped about the catheter product in a manner defining confronting proximal end edges, confronting distal end edges, and confronting side edges. The confronting proximal end edges, distal end edges and side edges of the sheet material are joined by a seal after the sheet material is wrapped about the catheter product to define a sealed cavity. The sheet material has a tear strip affixed to it which causes the sheet material to tear along the tear strip to thereby cause the package to open along an intended opening line. A method of forming a package for a catheter product comprises the steps of providing a sheet material for the package and placing the catheter product on the sheet material. It also includes affixing a tear strip to the sheet material and wrapping the sheet material around the catheter product. Further, the method includes the step of sealing the sheet material to form a sealed cavity with the catheter product being disposed within the sealed cavity.

    Abstract translation: 导管产品包装及其形成方法,其中包装包括围绕导管产品缠绕的片材以形成用于导管产品的包装。 导管产品在包装内大致纵向地延伸,并且片材从超过近端的点延伸到超过导管产品的远端的点。 包装的片材以围绕近端边缘,面对远端边缘和面对侧边缘的方式围绕导管产品缠绕。 在片材围绕导管产品缠绕以限定密封空腔之后,片材的面对的近端边缘,远端边缘和侧边缘通过密封件接合。 片材具有固定到其上的撕裂条,其导致片材沿着撕裂带撕裂,从而使包装沿着预期的开口线打开。 形成用于导管产品的包装的方法包括以下步骤:提供用于包装的片材材料并将导管产品放置在片材上。 它还包括将撕裂带固定在片材上并将片材缠绕在导管产品周围。 此外,该方法包括密封片材以形成密封空腔的步骤,导管产品设置在密封腔内。

    Low Lead Alloy
    72.
    发明申请
    Low Lead Alloy 有权
    低铅合金

    公开(公告)号:US20120237393A1

    公开(公告)日:2012-09-20

    申请号:US13464631

    申请日:2012-05-04

    CPC classification number: C22C9/04 C22C1/02 C22C1/03 C22C9/00 C22C9/02 C22F1/08

    Abstract: A composition for a low lead ingot comprising primarily copper and including tin, zinc, sulfur, phosphorus, nickel. The composition may contain carbon. The low lead ingot, when solidified, includes sulfur or sulfur containing compounds such as sulfides distributed through the ingot. The presence and a substantially uniform distribution of these sulfur compounds imparts improved machinability and better mechanical properties.

    Abstract translation: 用于低铅锭的组合物,其主要包括铜并包括锡,锌,硫,磷,镍。 组合物可含有碳。 低铅锭在固化时包括硫或硫化合物,例如分布在锭中的硫化物。 这些硫化合物的存在和基本均匀的分布赋予了改善的机械加工性和更好的机械性能。

    Low lead ingot
    73.
    发明申请
    Low lead ingot 审中-公开
    低铅锭

    公开(公告)号:US20120121455A1

    公开(公告)日:2012-05-17

    申请号:US13317785

    申请日:2011-10-28

    CPC classification number: C22C1/02 C21C7/0006 C22C9/02 C22C9/04 C22F1/08

    Abstract: A composition for a low lead ingot comprising primarily copper and including tin, zinc, sulfur, phosphorus, nickel. The composition may contain manganese. The low lead ingot, when solidified, includes sulfur or sulfur containing compounds such as sulfides distributed through the ingot. The presence and a substantially uniform distribution of these sulfur compounds imparts improved machinability and better mechanical properties.

    Abstract translation: 用于低铅锭的组合物,其主要包括铜并包括锡,锌,硫,磷,镍。 组合物可含有锰。 低铅锭在固化时包括硫或硫化合物,例如分布在锭中的硫化物。 这些硫化合物的存在和基本均匀的分布赋予了改善的机械加工性和更好的机械性能。

    APPARATUS, METHODS, AND SYSTEM OF NAND DEFECT MANAGEMENT
    74.
    发明申请
    APPARATUS, METHODS, AND SYSTEM OF NAND DEFECT MANAGEMENT 有权
    NAND缺陷管理的设备,方法和系统

    公开(公告)号:US20110296261A1

    公开(公告)日:2011-12-01

    申请号:US13194212

    申请日:2011-07-29

    Applicant: Michael Murray

    Inventor: Michael Murray

    Abstract: Various embodiments comprise apparatus, methods, and systems including method comprising searching for a group address among a plurality of group addresses in a mapping table, and if a match is found, performing a memory operation on a first plurality of memory blocks indicated by the mapping table, and if a match is not found, performing a memory operation on a second plurality of memory blocks, the second plurality of memory blocks having the group address.

    Abstract translation: 各种实施例包括装置,方法和系统,包括在映射表中搜索多个组地址之中的组地址的方法,并且如果找到匹配,则对由映射指示的第一多个存储块执行存储器操作 表,并且如果没有找到匹配,则对第二多个存储块执行存储器操作,所述第二多个存储块具有组地址。

    Flash storage partial page caching
    75.
    发明授权
    Flash storage partial page caching 有权
    Flash存储部分页面缓存

    公开(公告)号:US07953954B2

    公开(公告)日:2011-05-31

    申请号:US11698456

    申请日:2007-01-26

    Abstract: Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurality of blocks for memory storage, fill some of the sectors by storing data bits associated with the allocation request in the at least one of the plurality of sectors, determine that the sectors are full, assigning a full page block from the plurality of blocks, and transfer the data bits associated with the allocation request from the partial page blocks to the full page block. Other apparatus, systems, and methods are disclosed.

    Abstract translation: 方法和装置可以操作以从配置成管理存储器的处理器接收分配请求,该存储器包括可配置为包括多个扇区的多个块的非易失性存储器件,从多个块中分配部分页块用于存储器存储,填充一些 通过将与分配请求相关联的数据位存储在多个扇区中的至少一个扇区中,确定扇区是满的,从多个块分配全页块,并传送与分配相关联的数据位 从部分页面块到全页块的请求。 公开了其他装置,系统和方法。

    Erase block data splitting
    76.
    发明授权
    Erase block data splitting 有权
    擦除块数据分割

    公开(公告)号:US07944748B2

    公开(公告)日:2011-05-17

    申请号:US12470183

    申请日:2009-05-21

    CPC classification number: G06F11/1008 G06F11/1068 G11C16/16

    Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

    Abstract translation: 使用分布式擦除块扇区用户/开销数据方案详细描述了闪存设备,系统和数据处理例程,其分割用户数据和开销数据并将它们存储在不同的相关联的擦除块中。 闪速存储器的擦除块被布置成“超级块”中的相关联的擦除块对,使得当用户数据被写入/读取超块对的擦除块的扇区的用户数据区时,开销数据 被写入到/从另一个相关联的擦除块的扇区的开销数据区读取。 这种数据分割增强了闪存设备的容错能力和可靠性。

    E-couponing
    77.
    发明授权
    E-couponing 有权
    电子优惠券

    公开(公告)号:US07783532B2

    公开(公告)日:2010-08-24

    申请号:US11750064

    申请日:2007-05-17

    Abstract: Handling electronic coupons includes accessing information indicating association of an electronic coupon with an account of a user that identifies multiple retail entities associated with the user. Information indicating association of electronic coupons with the user's account may be transmitted to respective computer systems associated with the multiple retail entities. The computer systems may associate electronic coupons with the user such that the user may redeem the electronic coupons at a retail store upon presentation of a user identifier. When the user redeems an electronic coupon, cancellation information for the electronic coupon may be transmitted to the computer systems of other retail entities associated with the user. Receipt of the cancellation information may cause the respective computer systems to cancel the redeemability of the electronic coupon such that the user is prevented from redeeming the electronic coupon at a retail store associated with the corresponding retail entity.

    Abstract translation: 处理电子优惠券包括访问指示电子优惠券与识别与用户相关联的多个零售实体的用户的帐户的关联的信息。 指示电子优惠券与用户帐户的关联的信息可以被发送到与多个零售实体相关联的相应的计算机系统。 计算机系统可以将电子优惠券与用户相关联,使得用户可以在呈现用户标识符时在零售商店兑换电子优惠券。 当用户兑换电子优惠券时,电子优惠券的取消信息可以被发送到与用户相关联的其他零售实体的计算机系统。 接收取消信息可能导致相应的计算机系统取消电子优惠券的可兑换性,使得用户被阻止在与相应的零售实体相关联的零售商店兑换电子优惠券。

    ERASE BLOCK DATA SPLITTING
    78.
    发明申请
    ERASE BLOCK DATA SPLITTING 有权
    擦除数据分割

    公开(公告)号:US20090225606A1

    公开(公告)日:2009-09-10

    申请号:US12470183

    申请日:2009-05-21

    CPC classification number: G06F11/1008 G06F11/1068 G11C16/16

    Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

    Abstract translation: 使用分布式擦除块扇区用户/开销数据方案详细描述了闪存设备,系统和数据处理例程,其分割用户数据和开销数据并将它们存储在不同的相关联的擦除块中。 闪速存储器的擦除块被布置成“超级块”中的相关联的擦除块对,使得当用户数据被写入/读取超块对的擦除块的扇区的用户数据区时,开销数据 被写入到/从另一个相关联的擦除块的扇区的开销数据区读取。 这种数据分割增强了闪存设备的容错能力和可靠性。

    TWO-BIT PER I/O LINE WRITE DATA BUS FOR DDR1 AND DDR2 OPERATING MODES IN A DRAM
    79.
    发明申请
    TWO-BIT PER I/O LINE WRITE DATA BUS FOR DDR1 AND DDR2 OPERATING MODES IN A DRAM 审中-公开
    用于DRAM中DDR1和DDR2操作模式的I / O线写入数据总线的两位

    公开(公告)号:US20080137462A1

    公开(公告)日:2008-06-12

    申请号:US12020352

    申请日:2008-01-25

    CPC classification number: G11C7/1078 G11C7/1072 G11C7/1093 G11C7/1096

    Abstract: A data bus circuit for an integrated circuit memory includes a 4-bit bus per I/O pad that is used to connect the memory with an I/O block, but only two bits per I/O are utilized for writing. Four bits per I/O pad are used for reading. At every falling edge of an input data strobe, the last two bits are transmitted over the bus, which eliminates the need for the precise counting of input data strobe pulses. The data bus circuit is compatible with both DDR1 and DDR2 operating modes.

    Abstract translation: 用于集成电路存储器的数据总线电路包括用于将存储器与I / O块连接的每个I / O焊盘的4位总线,但每个I / O仅使用两位用于写入。 使用四位每个I / O焊盘进行读取。 在输入数据选通的每个下降沿,最后两位通过总线发送,这样就不需要精确计数输入数据选通脉冲。 数据总线电路兼容DDR1和DDR2工作模式。

    Two-bit per I/O line write data bus for DDR1 and DDR2 operating modes in a DRAM
    80.
    发明授权
    Two-bit per I/O line write data bus for DDR1 and DDR2 operating modes in a DRAM 有权
    在DRAM中为DDR1和DDR2工作模式写入数据总线的两位I / O线

    公开(公告)号:US07349289B2

    公开(公告)日:2008-03-25

    申请号:US11177537

    申请日:2005-07-08

    CPC classification number: G11C7/1078 G11C7/1072 G11C7/1093 G11C7/1096

    Abstract: A data bus circuit for an integrated circuit memory includes a 4-bit bus per I/O pad that is used to connect the memory with an I/O block, but only two bits per I/O are utilized for writing. Four bits per I/O pad are used for reading. At every falling edge of an input data strobe, the last two bits are transmitted over the bus, which eliminates the need for the precise counting of input data strobe pulses. The data bus circuit is compatible with both DDR1 and DDR2 operating modes.

    Abstract translation: 用于集成电路存储器的数据总线电路包括用于将存储器与I / O块连接的每个I / O焊盘的4位总线,但每个I / O仅使用两位用于写入。 使用四位每个I / O焊盘进行读取。 在输入数据选通的每个下降沿,最后两位通过总线发送,这样就不需要精确计数输入数据选通脉冲。 数据总线电路兼容DDR1和DDR2工作模式。

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