公开(公告)号：US20050157245A1

公开(公告)日：2005-07-21

申请号：US10995635

申请日：2004-11-22

Applicant: Ming-Tien Lin ,  Tean-Sen Jen

Inventor： Ming-Tien Lin ,  Tean-Sen Jen

IPC: G02F1/1339

CPC classification number: G02F1/13394

Abstract: A liquid crystal display (LCD) substrate and a fabrication method thereof are provided. The LCD substrate comprises a substrate, a spacer definition layer formed on the substrate comprising a first step, and a spacer formed along a profile of the first step of spacer definition layer and adjacent to the first step, thereby forming a second step on the spacer. The invention utilizes a single photolithographic process to form spacers with steps, thus, effectively lowering the probability of mura defects caused by gravity, contact, or an uneven cell gap.

Abstract translation: 提供一种液晶显示器（LCD）基板及其制造方法。 LCD基板包括基板，形成在基板上的间隔物定义层，包括第一台阶，以及沿着间隔物定义层的第一台阶的轮廓形成并与第一台阶相邻的间隔物，从而在间隔件上形成第二台阶 。 本发明利用单一的光刻工艺来形成具有台阶的间隔物，从而有效地降低由重力，接触或不均匀的单元间隙引起的凹凸不平的概率。

公开(公告)号：US20050105021A1

公开(公告)日：2005-05-19

申请号：US10885435

申请日：2004-07-06

Applicant: Seok-Lyul Lee ,  Tean-Sen Jen ,  Ming-Tien Lin

Inventor： Seok-Lyul Lee ,  Tean-Sen Jen ,  Ming-Tien Lin

IPC: G02F1/1347 ,  G02F1/1335

CPC classification number: G02F1/133553 ,  G02F2001/133342

Abstract: A reflective liquid crystal display panel for dual display. The panel has a plurality of pixels and each pixel having first and second display regions. Each pixel includes a first substrate and a second substrate opposite thereto, wherein the first substrate includes a pixel driving device. A first reflective layer is formed overlying the first substrate in the first display region. A second reflective layer is formed overlying an interior of the second substrate in the second display region. A liquid crystal layer is interposed between the first substrate and the second substrate.

Abstract translation: 一种用于双显示的反射式液晶显示面板。 面板具有多个像素，每个像素具有第一和第二显示区域。 每个像素包括第一衬底和与之相对的第二衬底，其中第一衬底包括像素驱动装置。 在第一显示区域中形成覆盖第一基板的第一反射层。 第二反射层形成在第二显示区域中覆盖第二基板的内部。 液晶层介于第一基板和第二基板之间。

公开(公告)号：US20050052382A1

公开(公告)日：2005-03-10

申请号：US10838496

申请日：2004-05-03

Applicant: Ming-Tien Lin ,  Yi-Lun Chou ,  Tean-Sen Jen

Inventor： Ming-Tien Lin ,  Yi-Lun Chou ,  Tean-Sen Jen

IPC: G02F1/1362 ,  G09G3/36

CPC classification number: G02F1/13624 ,  G09G3/3659 ,  G09G2320/0261

Abstract: A liquid crystal display is suitable for displaying images with rapid motions, and comprises an active matrix substrate equipped with a plurality of thin film transistors. The active matrix substrate comprises a plurality of pixels that are placed at the encircled areas of a plurality of scanning lines and a plurality of data lines. Each pixel consists of two thin film transistors and one pixel electrode. The data lines connected electrodes of the thin film transistors are connected to two adjoining data lines respectively, whereas the pixel connected electrodes of the two thin film transistors are together connected to the pixel electrode. The gate electrodes of the two thin film transistors are connected to two adjoining scanning lines respectively.

Abstract translation: 液晶显示器适用于显示具有快速运动的图像，并且包括配备有多个薄膜晶体管的有源矩阵基板。 有源矩阵基板包括放置在多条扫描线和多条数据线的环绕区域的多个像素。 每个像素由两个薄膜晶体管和一个像素电极组成。 薄膜晶体管的数据线连接电极分别连接到两个相邻的数据线，而两个薄膜晶体管的像素连接电极一起连接到像素电极。 两个薄膜晶体管的栅电极分别连接到两个相邻的扫描线。

公开(公告)号：US06721026B2

公开(公告)日：2004-04-13

申请号：US09846462

申请日：2001-05-01

Applicant: Jia-Shyong Cheng ,  Tean-Sen Jen

Inventor： Jia-Shyong Cheng ,  Tean-Sen Jen

IPC: G02F11333

CPC classification number: G02F1/134363

Abstract: A process for forming an in-plane switching mode liquid crystal display (IPS-LCD), which defines pixel portions of the common and data electrodes by the same photo-masking and lithography procedure, is disclosed. Accordingly, the misalignment can be avoid. An in-plane switching mode liquid crystal display (IPS-LCD) is also disclosed. The IPS-LCD includes a storage capacitor consisting of storage-capacitor portions of the common and data electrode structures, which is disposed outside the pixel region so as to enhance the aperture ratio of the pixel region.

Abstract translation: 公开了通过相同的光掩模和光刻工艺来形成公共和数据电极的像素部分来形成平面内切换模式液晶显示器（IPS-LCD）的工艺。 因此，可以避免不对准。 还公开了一种面内切换模式液晶显示器（IPS-LCD）。 IPS-LCD包括由公共数据电极结构的存储电容器部分组成的存储电容器，其设置在像素区域的外部，以增强像素区域的开口率。

公开(公告)号：US06403418B2

公开(公告)日：2002-06-11

申请号：US09551535

申请日：2000-04-18

Applicant: Shiou-Yu Wang ,  Jia-Shyong Cheng ,  Tean-Sen Jen ,  Ming-Teng Hsieh

Inventor： Shiou-Yu Wang ,  Jia-Shyong Cheng ,  Tean-Sen Jen ,  Ming-Teng Hsieh

IPC: H01L218242

CPC classification number: H01L28/91 ,  H01L21/3143 ,  H01L21/31604 ,  H01L27/10855

Abstract: A method of fabricating cup shape cylindrical capacitor of high density Dynamic Random Access Memory (DRAM) cells is disclosed. The cup shape capacitor shape is achieved by first depositing a first polysilicon layer on a silicon substrate; a third dielectric layer is then formed overlaying the first polysilicon layer, and defined third dielectric crowns by the conventional lithography and etching techniques; a second polysilicon layer is deposited overlaying the third dielectric crowns and first polysilicon layer; the first polysilicon and second polysilicon layers are then vertically anisotropically etchback to define storage nodes of the cylindrical capacitors; the third dielectric crowns are removed; finally, the capacitor dielectric layer and the polysilicon top plate of the capacitor are formed to complete the cup shape cylindrical capacitor formation for high density DRAM applications.

Abstract translation: 公开了一种制造高密度动态随机存取存储器（DRAM）单元的杯形圆柱形电容器的方法。 杯状电容器形状通过首先在硅衬底上沉积第一多晶硅层来实现; 然后通过常规的光刻和蚀刻技术形成覆盖第一多晶硅层和限定的第三介电冠的第三介电层; 沉积覆盖第三介电冠和第一多晶硅层的第二多晶硅层; 然后第一多晶硅和第二多晶硅层垂直各向异性回蚀以限定圆柱形电容器的存储节点; 去除第三介质冠; 最后，电容器的电容器电介质层和多晶硅顶板形成为完成用于高密度DRAM应用的杯形圆柱形电容器形成。

公开(公告)号：US06387740B1

公开(公告)日：2002-05-14

申请号：US09627142

申请日：2000-07-24

Applicant: Tean-Sen Jen ,  Jia-Shyong Cheng

Inventor： Tean-Sen Jen ,  Jia-Shyong Cheng

IPC: H01L2100

CPC classification number: H01L27/1288 ,  G02F1/136227 ,  G02F2001/136231 ,  H01L27/1214

Abstract: A simplified tri-layer process for forming a thin film transistor matrix for a liquid crystal display is disclosed. By using a backside exposure technique, the masking step for patterning an etch stopper layer can be omitted. After forming an active region including a gate electrode and a scan line on the front side of a substrate, and sequentially applying an etch stopper layer and a photoresist layer over the resulting structure, the backside exposure is performed by exposing from the back side of the substrate. A portion of photoresist is shielded by the active region from exposure so that an etch stopper structure having a shape similar to the shape of the active region is formed without any photo-masking and lithographic procedure. Therefore, the above self-aligned effect allows one masking step to be reduced so as to simplify the process.

Abstract translation: 公开了用于形成用于液晶显示器的薄膜晶体管矩阵的简化三层工艺。 通过使用背面曝光技术，可以省略用于图案化蚀刻停止层的掩模步骤。 在衬底的前侧形成包括栅电极和扫描线的有源区，并在所得结构上依次施加蚀刻停止层和光致抗蚀剂层，通过从背面曝光 基质。 一部分光致抗蚀剂被有源区域遮蔽而不被曝光，从而形成具有类似于有源区形状的蚀刻停止结构，而没有任何光掩模和光刻工艺。 因此，上述自对准效果允许减少一个掩模步骤，从而简化处理。

公开(公告)号：US06337173B2

公开(公告)日：2002-01-08

申请号：US09208452

申请日：1998-12-10

Applicant: Tean-Sen Jen ,  Shiou-Yu Wang ,  Jia-Shyong Cheng

Inventor： Tean-Sen Jen ,  Shiou-Yu Wang ,  Jia-Shyong Cheng

IPC: G03F726

CPC classification number: H01L28/92 ,  H01L21/76213 ,  H01L27/10852

Abstract: A method for fabricating a capacitor electrode on a semiconductor substrate includes the steps of: forming a conducting layer over the semiconductor substrate; forming a photoresist layer over the conducting layer; pattering the photoresist layer through an interfering exposure step; and pattering the conducting layer using the patterned photoresist layer as a mask, thereby forming a capacitor electrode.

Abstract translation: 一种在半导体衬底上制造电容器电极的方法包括以下步骤：在半导体衬底上形成导电层; 在所述导电层上形成光致抗蚀剂层; 通过干涉曝光步骤图案化光致抗蚀剂层; 并使用图案化的光致抗蚀剂层作为掩模图案化导电层，从而形成电容器电极。

公开(公告)号：US06180993B2

公开(公告)日：2001-01-30

申请号：US09153870

申请日：1998-09-15

Applicant: Shiou-Yu Wang ,  Tean-Sen Jen

Inventor： Shiou-Yu Wang ,  Tean-Sen Jen

IPC: H01L2900

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An ion repulsion structure for a fuse window is provided. The ion repulsion structure includes multi-level metallic layers and a P-type silicon semiconductor substrate having a plurality of wells. The P-type silicon semiconductor substrate includes an N-type well, a P-type well formed in the N-type well and a plurality of P+ type diffusion regions formed in the P-type well. A fuse element is formed on the P-type silicon semiconductor substrate. A fuse window layer is formed over the fuse element. Multi-level metallic layers surrounding the fuse window are formed. A plurality of contact plugs is electrically connected between the P+ type diffusion regions of the semiconductor substrate and the lowest metallic layer. A plurality of via plugs electrically connect the multi-level metallic layers to each other.

Abstract translation: 提供了一种用于保险丝窗的离子排斥结构。 离子斥力结构包括多层金属层和具有多个阱的P型硅半导体衬底。 P型硅半导体衬底包括N型阱，在N型阱中形成的P型阱以及形成在P型阱中的多个P +型扩散区。 在P型硅半导体基板上形成熔丝元件。 保险丝窗口层形成在保险丝元件上。 形成围绕保险丝窗的多层金属层。 多个接触插塞电连接在半导体衬底的P +型扩散区和最下层的金属层之间。 多个通孔塞将多层金属层彼此电连接。

公开(公告)号：US5923989A

公开(公告)日：1999-07-13

申请号：US81598

申请日：1998-05-20

Applicant: Shian-Jyh Lin ,  Tsu-An Lin ,  Wen-Chieh Chang ,  Shiou-Yu Wang ,  Tean-Sen Jen ,  Hui-Jen Yang ,  Jia-Shyong Cheng ,  Ming-Teng Hsieh

Inventor： Shian-Jyh Lin ,  Tsu-An Lin ,  Wen-Chieh Chang ,  Shiou-Yu Wang ,  Tean-Sen Jen ,  Hui-Jen Yang ,  Jia-Shyong Cheng ,  Ming-Teng Hsieh

IPC: H01L21/02 ,  H01L21/8242

CPC classification number: H01L27/10852 ,  H01L28/84

Abstract: A method of fabricating a rugged capacitor structure of high density Dynamic Random Access Memory (DRAM) cells is disclosed. First, MOSFETs, wordlines and bitlines are formed on a semiconductor silicon substrate. Next, a dielectric layer and a doped polysilicon layer are sequentially deposited over the entire silicon substrate. The dielectric layer and doped polysilicon layer are then partially etched to open source contact windows. Then, a polysilicon layer is deposited overlaying the doped polysilicon layer and filling into the source contact windows. Next, the polysilicon layer and doped polysilicon layers are partially etched to define bottom electrodes of the capacitors. Next, tilt angle implantation is performed to implant impurities into top surface and four sidewalls of the polysilicon layer and doped polysilicon layer. Next, a rugged polysilicon layer is deposited overlaying the polysilicon, doped polysilicon and third dielectric layers. Next, the polysilicon layer is anisotropically etched by using the rugged polysilicon layer as an etching mask to transfer rugged surface profile from the rugged polysilicon layer to the polysilicon layer. Finally, an interelectrode dielectric layer and a third polysilicon layer as top electrodes of the capacitors are sequentially formed to complete the rugged capacitor for high density DRAM applications.

Abstract translation: 公开了一种制造高密度动态随机存取存储器（DRAM）单元的坚固电容器结构的方法。 首先，在半导体硅衬底上形成MOSFET，字线和位线。 接下来，在整个硅衬底上依次沉积介电层和掺杂多晶硅层。 然后将电介质层和掺杂多晶硅层部分地蚀刻到开源接触窗口。 然后，沉积覆盖掺杂多晶硅层并填充到源极接触窗口中的多晶硅层。 接下来，部分蚀刻多晶硅层和掺杂多晶硅层以限定电容器的底部电极。 接下来，进行倾斜角注入以将杂质植入多晶硅层的顶表面和四个侧壁以及掺杂多晶硅层。 接下来，沉积覆盖多晶硅，掺杂多晶硅和第三介电层的坚固的多晶硅层。 接下来，通过使用坚固的多晶硅层作为蚀刻掩模来将多晶硅层各向异性地蚀刻，以将粗糙的表面轮廓从坚固的多晶硅层转移到多晶硅层。 最后，依次形成作为电容器顶电极的电极间电介质层和第三多晶硅层，以完成用于高密度DRAM应用的坚固电容器。