公开(公告)号：US07000051B2

公开(公告)日：2006-02-14

申请号：US10403158

申请日：2003-03-31

申请人： William Joseph Armstrong ,  Richard Louis Arndt ,  Naresh Nayar

发明人： William Joseph Armstrong ,  Richard Louis Arndt ,  Naresh Nayar

IPC分类号： G06F13/24 ,  G06F9/45

CPC分类号： G06F13/24 ,  G06F9/45541 ,  G06F9/4812 ,  G06F9/5077

摘要： A resource and partition manager virtualizes interrupts without using any additional hardware in a way that does not disturb the interrupt processing model of operating systems running on a logical partition. In other words, the resource and partition manager supports virtual interrupts in a logically partitioned computer system that may include share processors with no changes to a logical partition's operating system. A set of virtual interrupt registers is created for each virtual processor in the system. The resource and partition manager uses the virtual interrupt registers to process interrupts for the corresponding virtual processor. In this manner, from the point of view of the operating system, the interrupt processing when the operating system is running in a logical partition that may contain shared processors and virtual interrupts is no different that the interrupt processing when the operating system is running in computer system that only contains dedicated processor partitions.

摘要翻译： 资源和分区管理器以不干扰在逻辑分区上运行的操作系统的中断处理模型的方式，虚拟化中断而不使用任何附加硬件。 换句话说，资源和分区管理器支持逻辑分区的计算机系统中的虚拟中断，其可以包括共享处理器，而不改变逻辑分区的操作系统。 为系统中的每个虚拟处理器创建一组虚拟中断寄存器。 资源和分区管理器使用虚拟中断寄存器来处理相应虚拟处理器的中断。 以这种方式，从操作系统的观点来看，当操作系统在可能包含共享处理器和虚拟中断的逻辑分区中运行时的中断处理与操作系统在计算机中运行时的中断处理没有区别 只包含专用处理器分区的系统。

公开(公告)号：US20050027960A1

公开(公告)日：2005-02-03

申请号：US10631535

申请日：2003-07-31

申请人： Jonathan DeMent ,  Cathy May ,  Naresh Nayar ,  Edward Silha

发明人： Jonathan DeMent ,  Cathy May ,  Naresh Nayar ,  Edward Silha

IPC分类号： G06F12/08 ,  G06F12/10

CPC分类号： G06F12/1036 ,  G06F2212/152

摘要： The present invention provides for storing and using a stored logical partition indicia in a TLB. A partition in a microprocessor architecture is employed. A virtual page number is selected. A stored LPID indicia corresponding to the selected page number is read from a TLB. The stored logical partition indicia from the TLB is compared to a logical partition indicia associated with the employed partition. If the stored logical partition indicia and the logical partition indicia associated with the employed partition match, a corresponding page table entry stored in the translation look-aside buffer is read. If they do not match, a page table entry from a page table entry source is retrieved and stored in the TLB. If a partition is to invalidate an entry in the TLB, a TLB entry command is generated and used to invalidate a memory entry.

摘要翻译： 本发明提供了在TLB中存储和使用存储的逻辑分区标记。 采用微处理器架构中的分区。 选择虚拟页码。 从TLB中读取对应于所选页码的存储的LPID标记。 将来自TLB的存储的逻辑分区标记与与所使用的分区相关联的逻辑分区标记进行比较。 如果所存储的逻辑分区标记和与所采用分区相关联的逻辑分区标记匹配，则读取存储在转换后备缓冲器中的相应页表条目。 如果它们不匹配，则从页表入口源中的页表项被检索并存储在TLB中。 如果分区要使TLB中的条目无效，则会生成TLB条目命令，并将其用于使内存条目无效。

公开(公告)号：US20050021936A1

公开(公告)日：2005-01-27

申请号：US10624808

申请日：2003-07-22

申请人： David Bailey ,  William Armstrong ,  Naresh Nayar ,  Gregory Nordstrom

发明人： David Bailey ,  William Armstrong ,  Naresh Nayar ,  Gregory Nordstrom

IPC分类号： G06F9/00

CPC分类号： G06F9/5077

摘要： A partition manager includes an I/O reconfiguration mechanism and a logical partition suspend/resume mechanism that work together to perform autonomic I/O reconfiguration in a logically partitioned computer system. When I/O reconfiguration is required, the affected logical partitions are suspended, the I/O is reconfigured, and the affected logical partitions are resumed. Because the logical partitions are suspended during I/O reconfiguration, any ghost packet that may occur when the I/O is reconfigured is ignored.

摘要翻译： 分区管理器包括I / O重新配置机制和逻辑分区挂起/恢复机制，其协同工作以在逻辑分区的计算机系统中执行自主I / O重新配置。 当需要I / O重新配置时，受影响的逻辑分区将被挂起，重新配置I / O，并恢复受影响的逻辑分区。 因为逻辑分区在I / O重新配置期间被挂起，所以当I / O被重新配置时可能发生的任何ghost数据包被忽略。

公开(公告)号：US08127086B2

公开(公告)日：2012-02-28

申请号：US12403447

申请日：2009-03-13

申请人： Stuart Z. Jacobs ,  David A. Larson ,  Naresh Nayar ,  Wade B. Ouren

发明人： Stuart Z. Jacobs ,  David A. Larson ,  Naresh Nayar ,  Wade B. Ouren

IPC分类号： G06F12/00

CPC分类号： G06F11/0793 ,  G06F11/0712 ,  G06F11/0724 ,  G06F11/073 ,  G06F11/0745

摘要： Transparent hypervisor pinning of critical memory areas is provided for a shared memory partition data processing system. The transparent hypervisor pinning includes receiving at a hypervisor a hypervisor call initiated by a logical partition to register a logical memory area of the logical partition with the hypervisor. Responsive to this hypervisor call, the hypervisor transparently determines whether the logical memory is a critical memory area for access by the hypervisor. If the logical memory area is a critical memory area, then the hypervisor automatically pins the logical memory area to physical memory of the shared memory partition data processing system, thereby ensuring that the memory area will not be paged-out from physical memory to external storage, and thus ensuring availability of the logic memory area to the hypervisor.

公开(公告)号：US08099522B2

公开(公告)日：2012-01-17

申请号：US12135943

申请日：2008-06-09

申请人： Gary D. Anderson ,  Carol B. Hernandez ,  Naresh Nayar ,  James A. Pafumi ,  Veena Patwari ,  Morgan J. Rosas

发明人： Gary D. Anderson ,  Carol B. Hernandez ,  Naresh Nayar ,  James A. Pafumi ,  Veena Patwari ,  Morgan J. Rosas

IPC分类号： G06F3/00

CPC分类号： G06F9/5016 ,  G06F9/45558 ,  G06F11/1482 ,  G06F2009/45583 ,  G06F2201/815

摘要： A method for controlling input and output of a virtualized computing platform is disclosed. The method can include creating a device interface definition, assigning an identifier to a paging device and configuring commands useable by a virtual input output server. The commands can be sent to the input output server and can be converted by the input output server into paging device commands. A hypervisor can assist in facilitating the communication configuration. Other embodiments are also disclosed.

摘要翻译： 公开了一种用于控制虚拟化计算平台的输入和输出的方法。 该方法可以包括创建设备接口定义，将标识符分配给寻呼设备并配置虚拟输入输出服务器可使用的命令。 命令可以发送到输入输出服务器，并且可以由输入输出服务器转换成寻呼设备命令。 管理程序可以帮助促进通信配置。 还公开了其他实施例。

公开(公告)号：US20110320840A1

公开(公告)日：2011-12-29

申请号：US12821789

申请日：2010-06-23

申请人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III

发明人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F9/5077 ,  G06F9/5094 ,  Y02D10/22 ,  Y02D10/36

摘要： A mechanism is provided for transparently consolidating resources of logical partitions. Responsive to the existence of the non-folded resource on an originating resource chip, the virtualization mechanism determines whether there is a destination resource chip to either exchange operations of the non-folded resource with a folded resource on the destination chip or migrate operations of the non-folded resource to a non-folded resource on the destination chip. Responsive to the existence of the folded resource on the destination resource chip, the virtualization mechanism transparently exchanges the operations of the non-folded resource from the originating resource chip to the folded resource on the destination resource chip, where the folded resource remains folded on the originating resource chip after the exchange. Responsive to the absence of another non-folded resource on the originating resource chip, the vitalization mechanism places the originating resource chip into a deeper power saving mode.

摘要翻译： 提供了一种用于透明地整合逻辑分区资源的机制。 响应于原始资源芯片上的非折叠资源的存在，虚拟化机制确定是否存在目的地资源芯片，以在目的地芯片上用折叠资源来交换非折叠资源的操作，或者迁移操作 非折叠资源到目标芯片上的非折叠资源。 响应于目标资源芯片上折叠资源的存在，虚拟化机制透明地将未折叠资源的操作从始发资源芯片交换到目的地资源芯片上的折叠资源，其中折叠资源保持折叠在 交换后的源资源芯片。 响应于起始资源芯片上不存在另一非折叠资源，激活机制将始发资源芯片置于更深的省电模式。

公开(公告)号：US07996346B2

公开(公告)日：2011-08-09

申请号：US11959520

申请日：2007-12-19

申请人： Robert H. Bell, Jr. ,  Louis Bennie Capps, Jr. ,  Thomas Edward Cook ,  Thomas J. Dewkett ,  Naresh Nayar ,  Ronald Edward Newhart ,  Bernadette Ann Pierson ,  Michael Jay Shapiro

发明人： Robert H. Bell, Jr. ,  Louis Bennie Capps, Jr. ,  Thomas Edward Cook ,  Thomas J. Dewkett ,  Naresh Nayar ,  Ronald Edward Newhart ,  Bernadette Ann Pierson ,  Michael Jay Shapiro

IPC分类号： G06F15/18 ,  G06F9/46 ,  G06F9/48 ,  G06F9/50

CPC分类号： G06F9/5083

摘要： A multiprocessor system which includes automatic workload distribution. As threads execute in the multiprocessor system, an operating system or hypervisor continuously learns the execution characteristics of the threads and saves the information in thread-specific control blocks. The execution characteristics are used to generate thread performance data. As the thread executes, the operating system continuously uses the performance data to steer the thread to a core that will execute the workload most efficiently.

摘要翻译： 一个包含自动工作负载分配的多处理器系统。 当线程在多处理器系统中执行时，操作系统或管理程序将持续学习线程的执行特性，并将信息保存在线程特定的控制块中。 执行特性用于生成线程性能数据。 当线程执行时，操作系统会持续使用性能数据来将线程引导到最高效执行工作负载的内核。

公开(公告)号：US20110145555A1

公开(公告)日：2011-06-16

申请号：US12637808

申请日：2009-12-15

申请人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Todd J. Rosedahl ,  Malculm S. Ware

发明人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Todd J. Rosedahl ,  Malculm S. Ware

IPC分类号： G06F1/26 ,  G06F12/00 ,  G06F12/02 ,  G06F15/177

CPC分类号： G06F1/3203 ,  G06F1/324 ,  Y02D10/126

摘要： A mechanism is provided for controlling power management policies on a per logical partition basis. A power management mechanism in a data processing system receives a notification that the logical partition has been generated, a set of processing units associated with the logical partition, and a current power management policy to be implemented for the logical partition. The power management mechanism adds the logical partition and the set of processing units to a list of logical partitions. The power management mechanism initializes the set of processing units based on settings for the set of processing units in the current power management policy. The power management mechanism notifies a virtualization mechanism that the set of processing units are running at a specified performance level in order for the logical partition to start executing tasks on the set of processing units.

摘要翻译： 提供了一种用于在每个逻辑分区的基础上控制功率管理策略的机制。 数据处理系统中的电源管理机制接收到已经生成逻辑分区的通知，与逻辑分区相关联的一组处理单元以及要为逻辑分区实现的当前功率管理策略。 电源管理机制将逻辑分区和一组处理单元添加到逻辑分区列表中。 电源管理机制根据当前电源管理策略中的一组处理单元的设置初始化一组处理单元。 电源管理机制通知虚拟化机构，该组处理单元以指定的性能级别运行，以使逻辑分区开始在该组处理单元上执行任务。

公开(公告)号：US07870337B2

公开(公告)日：2011-01-11

申请号：US11946249

申请日：2007-11-28

申请人： Robert H. Bell, Jr. ,  Louis B. Capps, Jr. ,  Thomas E. Cook ,  Michael J. Shapiro ,  Naresh Nayar

发明人： Robert H. Bell, Jr. ,  Louis B. Capps, Jr. ,  Thomas E. Cook ,  Michael J. Shapiro ,  Naresh Nayar

IPC分类号： G06F13/00 ,  G06F13/28 ,  G01R21/00 ,  G01R21/06 ,  G01R19/00

CPC分类号： G06F12/0831 ,  G06F2212/1028 ,  Y02D10/13

摘要： A snoop coherency method, system and program are provided for intervening a requested cache line from a plurality of candidate memory sources in a multiprocessor system on the basis of the sensed temperature or power dissipation value at each memory source. By providing temperature or power dissipation sensors in each of the candidate memory sources (e.g., at cores, cache memories, memory controller, etc.) that share a requested cache line, control logic may be used to determine which memory source should source the cache line by using the power sensor signals to signal only the memory source with acceptable power dissipation to provide the cache line to the requester.

摘要翻译： 提供窥探一致性方法，系统和程序，用于基于每个存储器源处的感测温度或功率耗散值，在多处理器系统中从多个候选存储器源插入所请求的高速缓存行。 通过在共享所请求的高速缓存行的每个候选存储器源（例如，在内核，高速缓冲存储器，存储器控制器等）中提供温度或功率耗散传感器，可以使用控制逻辑来确定哪个存储器源应该来源于高速缓存 通过使用功率传感器信号仅以可接受的功率消耗信号通知存储器源，以向请求器提供高速缓存线。

公开(公告)号：US20090282300A1

公开(公告)日：2009-11-12

申请号：US12115625

申请日：2008-05-06

申请人： Peter Joseph Heyrman ,  Naresh Nayar ,  Gary Ross Ricard

发明人： Peter Joseph Heyrman ,  Naresh Nayar ,  Gary Ross Ricard

IPC分类号： G06F11/07

CPC分类号： G06F11/2082 ,  G06F11/2094

摘要： A method and apparatus for transparently handling recurring correctable errors and uncorrectable errors in a mirrored memory system prevents costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, a memory relocation mechanism in the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. When a correctable error occurs, the memory relocation mechanism uses data from a partner mirrored memory block as a data source for the memory block with the uncorrectable error and then relocates the data to a newly allocated memory block to replace the memory block with the uncorrectable error.

摘要翻译： 用于透明地处理镜像存储器系统中的可重复校正错误和不可校正错误的方法和装置防止由于不可校正的存储器错误而导致的可校正存储器错误或系统故障的昂贵的系统关闭。 当对于给定的存储器位置检测到大量的可校正错误时，管理程序中的存储器重定位机制将与存储器位置相关联的数据透明地移动到备用物理存储器位置到分区，使得分区不知道物理 内存实现内存位置已更改。 当发生可纠正错误时，内存重定位机制使用来自伙伴镜像内存块的数据作为具有不可校正错误的存储器块的数据源，然后将数据重新定位到新分配的存储器块以用不可校正的错误来替换存储器块 。