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公开(公告)号：US20210305391A1
公开(公告)日：2021-09-30
申请号：US16831746
申请日：2020-03-26
发明人： YUDI SETIAWAN , HANDOKO LINEWIH
摘要： A semiconductor device is provided. The semiconductor device comprises a substrate having a first surface and a second surface, the substrate comprising a wide bandgap semiconductor material. An epitaxial layer is on the first surface of the substrate and a metal germanosilicide layer is above the second surface of the substrate. The metal germanosilicide layer forms an ohmic contact to the substrate.
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公开(公告)号：US20210288205A1
公开(公告)日：2021-09-16
申请号：US16817691
申请日：2020-03-13
IPC分类号： H01L31/107 , H01L29/861 , H01L29/66 , H01L31/18
摘要： According to various embodiments, there is provided a diode device including a semiconductor substrate of a first conductivity type, a first semiconductor region formed within the semiconductor substrate, an epitaxial region of the first conductivity type, and a second semiconductor region of a second conductivity type different from the first conductivity type. The first semiconductor region includes a chalcogen. The epitaxial region is formed over the first semiconductor region. The second semiconductor region is formed over the epitaxial region.
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公开(公告)号：US20210273160A1
公开(公告)日：2021-09-02
申请号：US16802562
申请日：2020-02-27
摘要： A memory device may be provided including one or more bottom electrodes, one or more mask elements, one or more top electrodes and a switching layer. The bottom electrode(s) may include a first bottom electrode, the mask element(s) may include a first mask element and the top electrode(s) may include a first top electrode. The first mask element may be arranged over a first part of the first bottom electrode. The first top electrode may be arranged over and in contact with the first mask element. The switching layer may be arranged to extend over a second part of the first bottom electrode, and along a first side surface of the first mask element and further along a first side surface of the first top electrode. The first side surfaces of the first mask element and the first top electrode may face a same direction.
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公开(公告)号：US20210257300A1
公开(公告)日：2021-08-19
申请号：US16792854
申请日：2020-02-17
发明人： XUESONG RAO , YUN LING TAN , YUDI SETIAWAN , SIOW LEE CHWA
IPC分类号： H01L23/535 , H01L23/532 , H01L21/768
摘要： A structure comprises a substrate and a conductive pad disposed over the substrate. A conductive layer overlies the conductive pad. A via is disposed over the conductive pad. The via penetrates through the conductive layer and touches a surface of the conductive pad.
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公开(公告)号：US20210225936A1
公开(公告)日：2021-07-22
申请号：US16744223
申请日：2020-01-16
发明人： Lanxiang WANG , Shyue Seng TAN , Eng Huat TOH , Benfu LIN
摘要： A memory device may be provided, including a substrate; one or more bottom electrodes arranged over the substrate; one or more switching layers arranged over the one or more bottom electrodes; and a plurality of top electrodes arranged over the one or more switching layers. Each of the one or more bottom electrodes may include at least one corner tip facing the switching layer, and an angle of each of the at least one corner tip may be less than ninety degrees.
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公开(公告)号：US11063158B2
公开(公告)日：2021-07-13
申请号：US16716419
申请日：2019-12-16
IPC分类号： H01L31/02 , H01L31/107 , H01L45/00 , H01L31/18
摘要： A sensor is provided, which includes a semiconductor substrate, a photodiode region, and a multi-layered resistive element. The photodiode region is arranged in the semiconductor substrate. The multi-layered resistive element is arranged over the semiconductor substrate and is coupled with the photodiode region.
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公开(公告)号：US20210184059A1
公开(公告)日：2021-06-17
申请号：US16716419
申请日：2019-12-16
IPC分类号： H01L31/02 , H01L31/107 , H01L45/00 , H01L31/18
摘要： A sensor is provided, which includes a semiconductor substrate, a photodiode region, and a multi-layered resistive element. The photodiode region is arranged in the semiconductor substrate. The multi-layered resistive element is arranged over the semiconductor substrate and is coupled with the photodiode region.
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公开(公告)号：US20210164845A1
公开(公告)日：2021-06-03
申请号：US16700358
申请日：2019-12-02
发明人： Bin Liu , Eng Huat Toh , Shyue Seng Tan , Kiok Boone Elgin Quek
IPC分类号： G01K7/01 , G11C11/406 , G11C7/04 , G11C11/4072
摘要： Structures including non-volatile memory elements and methods of forming such structures. The structure includes a first non-volatile memory element, a second non-volatile memory element, and temperature sensing electronics coupled to the first non-volatile memory element and the second non-volatile memory element.
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公开(公告)号：US20210159234A1
公开(公告)日：2021-05-27
申请号：US16695725
申请日：2019-11-26
IPC分类号： H01L27/11519 , H01L27/11521
摘要： Structures for a non-volatile memory bit cell and methods of forming a structure for a non-volatile memory bit cell. A field-effect transistor has a channel region and a first gate electrode positioned over the channel region. A capacitor includes a second gate electrode that is coupled to the first gate electrode to define a floating gate. The first gate electrode has a non-rectangular shape.
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公开(公告)号：US11004972B2
公开(公告)日：2021-05-11
申请号：US16438574
申请日：2019-06-12
发明人： Bo Yu , Shaoqiang Zhang
IPC分类号： H01L29/78 , H01L27/12 , H01L23/528 , H01L21/768 , H01L23/522 , H01L21/762 , H01L21/8234 , H01L29/06 , H01L29/66 , H01L29/786
摘要： A device may include a semiconductor-on-insulator (SOI) structure that may include a substrate, an insulator layer over the substrate, and a semiconductor layer over the insulator layer. The semiconductor layer may include a first conductivity region and a second conductivity region at least partially arranged within the semiconductor layer. The device may further include a gate structure arranged over the semiconductor layer and between the first conductivity region and the second conductivity region; a first conductor element arranged through the semiconductor layer and the insulator layer of the SOI structure to electrically contact the substrate; a second conductor element arranged to electrically contact the gate structure; and a conducting member connecting the first conductor element and the second conductor element to electrically couple the first conductor element and the second conductor element.
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