公开(公告)号：US06839252B2

公开(公告)日：2005-01-04

申请号：US10442077

申请日：2003-05-21

Applicant: Liang-Pin Tai ,  Shwu-Liang Hsieh ,  Hung-I Wang ,  Jing-Meng Liu

Inventor： Liang-Pin Tai ,  Shwu-Liang Hsieh ,  Hung-I Wang ,  Jing-Meng Liu

IPC: H02M3/158 ,  H02M7/00 ,  G05F1/40

CPC classification number: H02M3/1584 ,  H02M2001/0029

Abstract: A two-step ripple-free multi-phase buck converter and method thereof comprises a first-stage voltage regulator to convert an input voltage to an intermediate voltage and a second-stage voltage regulator with a phase number not less than two to further convert the intermediate voltage to an output voltage by a split phase control, in which the ratio of the intermediate voltage to the output voltage is intended to the phase number such that the steady state output current of the converter approaches to be ripple-free, and hence the drivers and MOSFETs for the second-stage voltage regulator are lower cost, the efficiency of the second-stage voltage regulator is improved, and a higher slew rate current is obtained for transient driving capabilities.

Abstract translation: 两级无纹波多相降压转换器及其方法包括将输入电压转换为中间电压的第一级电压调节器和相位数不少于2的第二级稳压器，以进一步转换 通过分相控制将中间电压输出到输出电压，其中中间电压与输出电压的比率旨在达到相位数，使得转换器的稳态输出电流接近无波纹，因此 第二级稳压器的驱动器和MOSFET的成本较低，二级稳压器的效率得到提高，瞬态驱动能力可获得更高的转换速率电流。

公开(公告)号：US20240430618A1

公开(公告)日：2024-12-26

申请号：US18827834

申请日：2024-09-08

Applicant: Richtek Technology Corp.

Inventor： Tsung-Han Yang ,  Yen-Chih Wang ,  Ming-Jun Hsiao ,  Tsung-Nan Wu

IPC: H04R3/12 ,  H04R1/24 ,  H04R3/04 ,  H04R5/04

Abstract: An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.

公开(公告)号：US20240413749A1

公开(公告)日：2024-12-12

申请号：US18241232

申请日：2023-08-31

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Kuo-Chi Liu ,  Ta-Yung Yang ,  Yi-Min Shiu

IPC: H02M3/158

Abstract: A multilevel buck converter includes a plurality of switches, an inductor, a flying capacitor, and a control circuit. The plurality of switches are coupled between an input terminal and a ground. The input terminal has an input voltage. The inductor is coupled between the plurality of switches and an output terminal for generating an inductor-current signal. The flying capacitor is coupled to the plurality of switches for generating a flying capacitor voltage. The control circuit is coupled to the output terminal and the plurality of switches for generating a plurality of switching signals according a feedback voltage and the inductor-current signal. The control circuit operates in a valley current mode with dual slope compensation.

公开(公告)号：US20240077543A1

公开(公告)日：2024-03-07

申请号：US18132427

申请日：2023-04-10

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Hsu-Kai Hou ,  Po-Ching Lee ,  Tseng-Chuan Wu

IPC: G01R31/3842 ,  H01M50/204

CPC classification number: G01R31/3842 ,  H01M50/204

Abstract: A battery pack includes a group of cells, a current path switch coupled to the group of cells, and a current monitoring system. The current monitoring system includes a signal detection unit, a logic unit and a current path control unit. The signal detection unit is coupled to the group of cells and/or a positive terminal of the battery pack, and used to detect at least one voltage signal of the group of cells and/or of the positive terminal of the battery pack. The logic unit is coupled to the signal detection unit, and used to generate a calculated value of a voltage signal of the at least one voltage signal and generate a logic signal according to the calculated value. The current path control unit is coupled to the logic unit and the current path switch, and used to control the current path switch according to the logic signal.

公开(公告)号：US20230336074A1

公开(公告)日：2023-10-19

申请号：US18123961

申请日：2023-03-20

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Kuo-Chi Liu ,  Ta-Yung Yang ,  Wei-Hsu Chang

IPC: H02M1/00 ,  H02M3/07

CPC classification number: H02M3/07 ,  H02M1/0012

Abstract: A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch is used to receive an input voltage. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. When the input voltage is less than an input voltage threshold, the control circuit is used to switch the first to fourth switches according to a resonant frequency. When the input voltage exceeds the input voltage threshold, the control circuit switch is used to the first to fourth switches according to a regulated frequency exceeding the resonant frequency.

公开(公告)号：US20230267090A1

公开(公告)日：2023-08-24

申请号：US17867665

申请日：2022-07-18

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Tzu-Hsuan Tseng ,  Tzu-Hsien Chuang ,  Sheng-Chun Lin ,  Hao-Chun Yang ,  Chien-Chih Huang ,  Heng-Min Chang ,  Tsung-Jung Wu ,  Yen-Tung Hung

IPC: G06F13/40

CPC classification number: G06F13/4072 ,  G06F13/4022

Abstract: A charging system includes a source terminal and a sink terminal. The control method of the charging system includes transmitting a bus voltage by the source terminal, determining whether the sink terminal has entered a sink attached state when the sink terminal receives the bus voltage, enabling a message transceiver of the sink terminal if the sink terminal has entered the sink attached state, transmitting a source message to the transceiver of the sink terminal by the source terminal, transmitting a request message to the source terminal by the message transceiver of the sink terminal while the source terminal transmits the source message, and continuing to enable a communication function for communicating with the sink terminal and continuing to transmit the bus voltage to the sink terminal by the source terminal when the source terminal receives the request message.

公开(公告)号：US11683025B1

公开(公告)日：2023-06-20

申请号：US17849747

申请日：2022-06-27

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Yu-Hsuan Liu ,  Yung-Chun Chuang

IPC: H03K3/00 ,  H03K3/017 ,  H03K5/24 ,  H03K3/037 ,  H03K19/20

CPC classification number: H03K3/017 ,  H03K3/037 ,  H03K5/24 ,  H03K19/20

Abstract: A timing generator includes a first current source, a first switch, a second current source, a second switch, a third switch, a capacitor, a signal synthesizer, and a timing difference extractor. The first current source is for generating a first current according to the input voltage. The second current source is for generating a second current according to the input voltage. The first switch includes a control terminal for receiving a charging signal. The second switch includes a control terminal for receiving a timing difference signal. The third switch includes a control terminal for receiving a reset signal. The capacitor is coupled between a charging terminal and a ground terminal. The signal synthesizer is for generating a timing signal according to a charging voltage and a reference voltage. The timing difference extractor is for generating a timing difference signal according to the timing signal and a deformed timing signal.

公开(公告)号：US20230141723A1

公开(公告)日：2023-05-11

申请号：US17973526

申请日：2022-10-25

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Ching-Yi Chen ,  Hsing-Shen Huang

IPC: H05B45/325 ,  H05B45/10

CPC classification number: H05B45/325 ,  H05B45/10

Abstract: A dimmer circuit includes a light emitting module, a first current source, a digital-to-analog converter, a switch, a second current source and a pulse width modulation generator. The light emitting module is for emitting light according to a driving current. The first current source includes a first terminal coupled to a second terminal of the light emitting module. The digital-to-analog converter is for generating a DC voltage according to a DC dimming code signal to control the first current source. The switch includes a first terminal coupled to a second terminal of the light emitting module. The second current source includes a first terminal coupled to a second terminal of the switch. The PWM generator is for generating a PWM voltage according to the PWM dimming code signal to control the second current source.

公开(公告)号：US10103632B2

公开(公告)日：2018-10-16

申请号：US15270994

申请日：2016-09-20

Applicant: Richtek Technology Corporation

Inventor： Hung-Shou Nien ,  Ting-Hung Wang ,  Cheng-Ching Hsu ,  Shang-Ying Chung

IPC: H02M3/158 ,  H02M1/00

Abstract: A multiphase power converter has a plurality of phase circuits, each of which provides a phase current when being active. During single-phase operation of the multiphase power converter, an enhanced phase control circuit and method monitor the summation of the phase currents, and when the summation becomes higher than a threshold, switch the multiphase power converter to a higher power zone to increase the number of active phases. A high efficiency and high reliability multiphase power converter is thus accomplished.

公开(公告)号：US09858225B2

公开(公告)日：2018-01-02

申请号：US14978819

申请日：2015-12-22

Applicant: Richtek Technology Corp.

Inventor： Chien-Chih Huang ,  Chia-Hwa Chan ,  Tsung-Nan Wu

IPC: G06K19/00 ,  G06F13/38 ,  G06F1/00 ,  G06F3/06 ,  G06F13/42

CPC classification number: G06F13/385 ,  G06F1/00 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/4282 ,  G06F2213/0042 ,  G06F2213/3804

Abstract: A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.