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公开(公告)号：US11454669B2
公开(公告)日：2022-09-27
申请号：US16680114
申请日：2019-11-11
Applicant: STMicroelectronics International N.V. , STMicroelectronics (Crolles 2) SAS , STMicroelectronics (Grenoble 2) SAS
Inventor： Manoj Kumar , Lionel Courau , Geeta , Olivier Le-Briz
IPC: G01R31/28 , H05K1/02 , H01L21/66 , H01L23/525
Abstract: An integrated circuit die has a peripheral edge and a seal ring extending along the peripheral edge and surrounding a functional integrated circuit area. A test logic circuit located within the functional integrated circuit area generates a serial input data signal for application to a first end of a sensing conductive wire line extending around the seal ring between the seal ring and the peripheral edge of the integrated circuit die. Propagation of the serial input data signal along the sensing conductive wire line produces a serial output data signal at a second end of the sensing conductive wire line. The test logic circuit compares data patterns of the serial input data signal and serial output data signal to detect damage at the peripheral edge of the integrated circuit die.
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公开(公告)号：US20220214430A1
公开(公告)日：2022-07-07
申请号：US17568317
申请日：2022-01-04
Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Rousset) SAS , STMicroelectronics Application GmbH
Inventor： Romeo LETOR , Roberto TIZIANI , Alfio RUSSO , Antoine PAVLIN , Nadia LECCI , Manuel GAERTNER
Abstract: An electronic module for generating light pulses includes an electronic card or interposer, a LASER-diode lighting module, and a LASER-diode driver module. The interposer has an edge recess in which the lighting module is completely inserted. The driver module is arranged on top of the interposer and the lighting module. The electrical connections for driving the LASER diodes are obtained without resorting to wire bonding in order to reduce the parasitic inductances.
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公开(公告)号：US20220191402A1
公开(公告)日：2022-06-16
申请号：US17122667
申请日：2020-12-15
Applicant: STMicroelectronics, Inc. , STMicroelectronics SA , STMicroelectronics (Research & Development) Limited
Inventor： Darin K. Winterton , Donald Baxter , Andrew Hodgson , Gordon Lunn , Olivier Pothier , Kalyan-Kumar Vadlamudi-Reddy
Abstract: A method includes dividing a field of view into a plurality of zones and sampling the field of view to generate a photon count for each zone of the plurality of zones, identifying a focal sector of the field of view and analyzing each zone to select a final focal object from a first prospective focal object and a second prospective focal object.
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公开(公告)号：US20210157668A1
公开(公告)日：2021-05-27
申请号：US16953993
申请日：2020-11-20
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics (Alps) SAS , STMicroelectronics (Grand Ouest) SAS
Inventor： Loic Pallardy , Nicolas Anquet , Dragos Davidescu
Abstract: In an embodiment a system on chip includes a plurality of microprocessors, a plurality of slave resources, an interconnection circuit coupled between the microprocessors and the slave resources, the interconnection circuit configured to route transactions between the microprocessors and the slave resources and a processing controller configured to allow a user of the system to implement within the system at least one configuration diagram of the system defined by a set of configuration pieces of information used to define an assignment of at least one microprocessor to at least some of the slave resources, select the at least one microprocessors, and authorise an external debugging tool to access, for debugging purposes, only the slave resources assigned to the at least one microprocessor.
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公开(公告)号：US10759169B2
公开(公告)日：2020-09-01
申请号：US16357100
申请日：2019-03-18
Applicant: STMICROELECTRONICS, INC. , STMICROELECTRONICS INTERNAITONAL N.V. , STMICROELECTRONICS S.R.L.
Inventor： Simon Dodd , David S. Hunt , Joseph Edward Scheffelin , Dana Gruenbacher , Stefan H. Hollinger , Uwe Schober , Peter Janouch
Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.
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Patent Agency Ranking
公开(公告)号：US20200150174A1
公开(公告)日：2020-05-14
申请号：US16680114
申请日：2019-11-11
Applicant: STMicroelectronics International N.V. , STMicroelectronics (Crolles 2) SAS , STMicroelectronics (Grenoble 2) SAS
Inventor： Manoj KUMAR , Lionel COURAU , GEETA , Olivier LE-BRIZ
IPC: G01R31/28 , H05K1/02 , H01L21/66 , H01L23/525
Abstract: An integrated circuit die has a peripheral edge and a seal ring extending along the peripheral edge and surrounding a functional integrated circuit area. A test logic circuit located within the functional integrated circuit area generates a serial input data signal for application to a first end of a sensing conductive wire line extending around the seal ring between the seal ring and the peripheral edge of the integrated circuit die. Propagation of the serial input data signal along the sensing conductive wire line produces a serial output data signal at a second end of the sensing conductive wire line. The test logic circuit compares data patterns of the serial input data signal and serial output data signal to detect damage at the peripheral edge of the integrated circuit die.
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公开(公告)号：US20200081776A1
公开(公告)日：2020-03-12
申请号：US16562025
申请日：2019-09-05
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Alps) SAS , STMicroelectronics (Rousset) SAS
Inventor： Gerald BRIAT , Antoine DE-MUYNCK , Alessandro BASTONI , Stephane MARMEY
Abstract: An error-correction code memory includes memory locations for storing data. The memory is programmed to store one or more intentionally invalid words. Testing of an error correction circuit for the memory is performed by accessing the one or more intentionally invalid words and performing an error detection and error correction operation.
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公开(公告)号：US20190191536A1
公开(公告)日：2019-06-20
申请号：US16285615
申请日：2019-02-26
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics Application GmbH , STMicroelectronics S.r.l.
Inventor： Philippe SIRITO-OLIVIER , Giovanni Luca TORRISI , Manuel GAERTNER , Fritz BURKHARDT
CPC classification number: H05B39/02 , B60Q1/00 , B60Q3/80 , H05B33/0806 , H05B33/0815 , H05B39/047
Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
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公开(公告)号：US10264353B2
公开(公告)日：2019-04-16
申请号：US15473812
申请日：2017-03-30
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics Design and Application S.R.O. , STMicroelectronics (Alps) SAS
Inventor： Jean Claude Bini , Dragos Davidescu , Igor Cesko , Jonathan Cottinet
Abstract: Several first digital streams of first digital samples at a first sampling frequency are processed to issue corresponding stream that are converted into second digital streams sampled at a second sampling frequency lower than said first sampling frequency. At least one delay to be applied to at least one first digital stream to satisfy a condition on the second digital streams is determined and applied to at least one first digital stream before converting. The converting operation performed is decimation filtering of the first digital streams. The application of the at least one delay to at least one first steam involves skipping a number of first digital samples in the at least one first digital stream. The number skipped depends on the value of the at least one delay. Samples that are skipped are not delivered for decimation filtering.
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公开(公告)号：US10127966B2
公开(公告)日：2018-11-13
申请号：US15389751
申请日：2016-12-23
Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Crolles 2) SAS , STMicroelectronics (Rousset) SAS
Inventor： Antonino Conte , Enrico Castaldo , Raul Andres Bianchi , Francesco La Rosa
Abstract: A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.
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