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2431 条记录 (耗时 0.032 秒)

    Boost converter for tracking input voltages
    81.
    发明授权
    Boost converter for tracking input voltages 有权
    用于跟踪输入电压的升压转换器

    公开(公告)号：US09080911B2

    公开(公告)日：2015-07-14

    申请号：US13558742

    申请日：2012-07-26

    申请人： Eric J. Holland

    发明人： Eric J. Holland

    IPC分类号： G01G23/36 ,  H02M3/156 ,  G05F1/10 ,  G01G23/00 ,  G01G23/18 ,  H05B33/08 ,  G01G23/01 ,  H02M1/00

    CPC分类号： G01G23/007 ,  G01G23/01 ,  G01G23/18 ,  G01G23/36 ,  G05F1/10 ,  H02M3/156 ,  H02M2001/0025 ,  H05B33/0815 ,  H05B33/0851

    摘要： A boost converter is provided for tracking change in input voltage. The boost converter comprises at least one input for connection to a DC voltage source for supplying an input voltage; at least one output configured to supply an output voltage having a value that is greater than a value of said input voltage by at least a predetermined offset value; feedback means adapted to provide a feedback voltage, based on said output voltage, to a switching element of said boost converter, and a feedback voltage regulator means adapted to combine said feedback voltage with an input voltage characteristic so as to adjust said output voltage to be offset and proportional to said input voltage characteristic.

    摘要翻译： 提供升压转换器用于跟踪输入电压的变化。 升压转换器包括用于连接到用于提供输入电压的DC电压源的至少一个输入; 至少一个输出被配置为将具有大于所述输入电压值的值的输出电压提供至少预定的偏移值; 反馈装置，其适于基于所述输出电压向所述升压转换器的开关元件提供反馈电压;以及反馈电压调节器装置，其适于将所述反馈电压与输入电压特性组合，以便将所述输出电压调整为 偏移并与所述输入电压特性成比例。

    Display device
    84.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号：US09078341B2

    公开(公告)日：2015-07-07

    申请号：US13849561

    申请日：2013-03-25

    申请人： Japan Display Inc.

    发明人： Yuuji Suzuki

    IPC分类号： G02F1/1333 ,  H05K5/00 ,  H05B33/02 ,  G02B1/10

    CPC分类号： H05K5/0017 ,  G02B1/105 ,  G02F1/133308 ,  H05B33/02

    摘要： An upper frame covers a periphery of a liquid crystal display panel, and a cover plate is bonded onto the upper frame and an upper polarizing plate of the liquid crystal display panel. A step is formed on the cover plate in a portion where the upper frame is bonded to the cover plate. This can reduce a thickness of resin between the upper polarizing plate and the cover plate, thereby reducing an extrusion of the resin in between the cover plate and the upper frame. Thus, a chamfer on a lower side of the cover plate can be reduced in size, and stray light from the lower side of the cover plate can be prevented. This can prevent a white line around a screen.

    摘要翻译： 上框架覆盖液晶显示面板的周边，并且盖板粘合到液晶显示面板的上框架和上偏振板上。 在上框架结合到盖板的部分中，在盖板上形成台阶。 这可以减小上偏振板和盖板之间的树脂厚度，从而减少在盖板和上框架之间的树脂的挤出。 因此，能够减小盖板的下侧的倒角，能够防止从盖板的下侧发出的杂散光。 这可以防止屏幕周围的白线。

    Resistor arrangement and method of use
    85.
    发明授权
    Resistor arrangement and method of use 有权
    电阻布置及使用方法

    公开(公告)号：US09076577B2

    公开(公告)日：2015-07-07

    申请号：US13619225

    申请日：2012-09-14

    申请人： Alan Roth ,  Alexander Kalnitsky ,  Chien-Chung Tseng

    发明人： Alan Roth ,  Alexander Kalnitsky ,  Chien-Chung Tseng

    IPC分类号： H01C7/10 ,  H01C7/13 ,  H01C13/02 ,  H01C1/16

    CPC分类号： H01C13/02 ,  H01C1/16

    摘要： This disclosure relates to a semiconductor device including resistor arrangement including a first resistor electrically connected to a ground voltage and a second resistor in direct physical contact with the first resistor. The second resistor is configured to receive a temperature independent current and the second resistor has thermal properties similar to those of the first resistor. This disclosure also relates to a semiconductor device including a load configured to receive an operating voltage and a voltage source configured to supply the operating voltage. The semiconductor device further includes a resistor arrangement between the load and the voltage source. This disclosure also relates to a method of using a resistor arrangement to calculate an operating current.

    摘要翻译： 本公开涉及包括电阻器装置的半导体器件，该电阻器装置包括电连接到接地电压的第一电阻器和与第一电阻器直接物理接触的第二电阻器。 第二电阻器被配置为接收与温度无关的电流，并且第二电阻器具有与第一电阻器类似的热特性。 本公开还涉及包括被配置为接收工作电压的负载和被配置为提供工作电压的电压源的半导体器件。 半导体器件还包括负载和电压源之间的电阻器配置。 本公开还涉及使用电阻器装置来计算工作电流的方法。

    Delayed optical logic gates for boolean algebra
    86.
    发明授权
    Delayed optical logic gates for boolean algebra 有权
    用于布尔代数的延迟光逻辑门

    公开(公告)号：US09075250B2

    公开(公告)日：2015-07-07

    申请号：US13560644

    申请日：2012-07-27

    申请人： Byoung-Seung Ham

    发明人： Byoung-Seung Ham

    IPC分类号： G02F3/00 ,  G02F1/35

    CPC分类号： G02F3/00 ,  G02F1/3536 ,  H04Q11/0005 ,  H04Q2011/002

    摘要： A system, method, and apparatus for delayed optical logic gates based on slow light and enhanced nondegenerate four-wave mixing processes, where a single or multiple delayed optical routers are utilized for dark resonance interactions in which two-color lasers interact with a three-level nonlinear optical medium comprised of two ground states and one excited state through the nondegenerate four-wave mixing processes. The delayed optical logic mechanism is based on combination of single or multiple dark resonance-induced two-photon coherence conversion via slow light phenomenon. The two-photon coherence induced on the ground states is optically detected via nondegenerate four-wave mixing processes. The nondegenerate four-wave mixing generation is enhanced owing to dark resonance or electromagnetically induced transparency. The delayed optical logic gates have potential to keep up ultra-high-bandwidth optical information processing using relatively slow electronic processing devices.

    摘要翻译： 一种基于慢光和增强的非衰变四波混频过程的延迟光逻辑门的系统，方法和装置，其中单个或多个延迟光路由器用于暗谐振相互作用，其中双色激光器与三维激光器相互作用， 通过非衰变四波混合过程由两个基态和一个激发态组成的非线性非线性光学介质。 延迟光学逻辑机制是基于通过慢光现象的单个或多个暗谐振诱导的双光子相干转换的组合。 通过非衰变四波混合过程光学检测在基态诱发的双光子相干性。 由于暗谐振或电磁感应透明度，非衰减四波混频产生得到增强。 延迟的光逻辑门具有利用相对较慢的电子处理器件来保持超高带宽光信息处理的潜力。

    Apparatus for measuring the degree of vacuum of a multistage vacuum heat-insulating member, and measurement method using same
    87.
    发明授权
    Apparatus for measuring the degree of vacuum of a multistage vacuum heat-insulating member, and measurement method using same 有权
    用于测量多级真空绝热构件的真空度的装置及使用其的测量方法

    公开(公告)号：US09074958B2

    公开(公告)日：2015-07-07

    申请号：US13981549

    申请日：2012-04-09

    申请人： Jung Pil Han ,  Jong Kyon Jeong ,  Son Cheal Bang ,  Sung Seock Hwang

    发明人： Jung Pil Han ,  Jong Kyon Jeong ,  Son Cheal Bang ,  Sung Seock Hwang

    IPC分类号： G01L21/00 ,  G01B11/16

    CPC分类号： G01L21/00 ,  G01B11/16

    摘要： An apparatus for measuring the degree of vacuum of a multistage vacuum heat-insulating member and to a measurement method using the same includes a chamber in which a plurality of vacuum heat-insulating members are accommodated and which forms a sealed space; a shelf arranged within the chamber so as to support the plurality of vacuum heat-insulating members in a plurality of layers; a displacement sensor for sensing the displacement of each outer shell of the vacuum heat-insulating members stacked on the shelf; and a vacuum unit connected to the chamber so as to regulate the pressure of the internal space of the chamber.

    摘要翻译： 一种用于测量多级真空绝热构件的真空度的装置及使用其的测量方法包括容纳多个真空绝热构件并形成密封空间的室; 设置在所述室内的搁架，以便支撑所述多个真空绝热构件的多个层; 位移传感器，用于感测层叠在搁板上的真空绝热构件的每个外壳的位移; 以及连接到所述室的真空单元，以调节所述室的内部空间的压力。