公开(公告)号：US07350163B2

公开(公告)日：2008-03-25

申请号：US11308639

申请日：2006-04-15

Applicant: Chun-jen Chen

Inventor： Chun-jen Chen

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: A system for automatically calculating parameters of an MOSFET is disclosed. The parameter calculating system runs in a computer. The parameter calculating system is used for receiving values inputted, and for calculating parameters of the MOSFET according to the input values. The parameter calculating system includes an operation selecting module (110), a value receiving module (120), a judging module (130), a parameter calculating module (140), and a circuit netlist generating module (150). A related method is also disclosed.

Abstract translation: 公开了一种用于自动计算MOSFET参数的系统。 参数计算系统在计算机中运行。 参数计算系统用于接收输入的值，并根据输入值计算MOSFET的参数。 参数计算系统包括操作选择模块（110），值接收模块（120），判断模块（130），参数计算模块（140）和电路网表生成模块（150）。 还公开了相关方法。

公开(公告)号：US20080020766A1

公开(公告)日：2008-01-24

申请号：US11826878

申请日：2007-07-19

Applicant: Chun-Jen Chen ,  Ching-Yu Lin

Inventor： Chun-Jen Chen ,  Ching-Yu Lin

IPC: H04Q7/20

CPC classification number: H04W48/20 ,  H04W64/00

Abstract: A method for selecting a base station is applied to a mobile station. The mobile station sets a preset distance corresponding to a datum base station. The method comprises selecting a first base station to be a serving base station; and obtaining a first C2 parameter of a second base station corresponding to the mobile station, and obtaining a second C2 parameter as a base for the mobile station in selecting the serving base station when a distance between the second base station and the datum base station is determined to be smaller than the preset distance, wherein the second C2 parameter is equal to the first C2 parameter plus a threshold value.

Abstract translation: 将基站的选择方法应用于移动台。 移动站设置对应于基准基站的预设距离。 该方法包括：选择第一基站作为服务基站; 以及获得与所述移动站对应的第二基站的第一C 2参数，以及当所述第二基站与所述基准基站之间的距离时，获得作为所述移动台选择所述服务基站的基站的第二C 2参数 站被确定为小于预设距离，其中第二C 2参数等于第一C 2参数加上阈值。

公开(公告)号：US20070220050A1

公开(公告)日：2007-09-20

申请号：US11525445

申请日：2006-09-22

Applicant: Shou-Kuo Hsu ,  Chun-Jen Chen ,  Chun-Shan Hsiao

Inventor： Shou-Kuo Hsu ,  Chun-Jen Chen ,  Chun-Shan Hsiao

IPC: G06F17/00

CPC classification number: H03H1/0007 ,  H03H2260/00

Abstract: A method for selecting a ferrite bead for a filter to avoid a peak value in a frequency response curve of the filter is provided. The method includes the steps of: building an equivalent model database including parameters of equivalent models of ferrite beads, the parameters including an inductance and a capacitance of a corresponding equivalent model of each ferrite bead; calculating parameters of a desired ferrite bead in the filter based on parameters of the filter, the parameters of the ferrite bead including an inductance, a capacitance, and a resonant frequency; adjusting parameters of the filter until the calculated resonant frequency equals or approaches a desired resonant frequency, and finding an inductance and a capacitance respectively equaling or approaching the calculated inductance and the calculated capacitance in the database; and selecting a ferrite bead with the appropriate inductance and capacitance as found in the database for the filter.

Abstract translation: 提供了一种用于选择用于滤波器的铁氧体磁珠以避免滤波器的频率响应曲线中的峰值的方法。 该方法包括以下步骤：构建等效模型数据库，其中包括铁素体磁珠的等效模型参数，其参数包括每个铁氧体磁珠的相应等效模型的电感和电容; 基于滤波器的参数，包括电感，电容和谐振频率的铁氧体磁珠的参数来计算滤波器中期望的铁氧体磁珠的参数; 调整滤波器的参数，直到计算出的谐振频率等于或接近期望的谐振频率，并且找到分别等于或接近计算出的电感的电感和电容以及数据库中的计算电容; 并选择具有适当的电感和电容的铁氧体磁珠，如过滤器数据库中所述。

公开(公告)号：US20070205846A1

公开(公告)日：2007-09-06

申请号：US11309480

申请日：2006-08-11

Applicant: CHUN-JEN CHEN ,  SHOU-KUO HSU

Inventor： CHUN-JEN CHEN ,  SHOU-KUO HSU

IPC: H04B3/04

CPC classification number: H02M1/126

Abstract: A filter circuit includes a signal source, an inductor, a load, and a compensator. The inductor and the load are connected between two terminals of the signal source in series. The compensator is connected in parallel with the inductor.

Abstract translation: 滤波器电路包括信号源，电感器，负载和补偿器。 电感和负载连接在信号源的两个端子之间。 补偿器与电感并联。

公开(公告)号：US20060276433A1

公开(公告)日：2006-12-07

申请号：US10551414

申请日：2004-03-31

Applicant: Keiichi Kawagoe ,  Kayoko Motoki ,  Takashi Odagiri ,  Nobuyuki Suzuki ,  Chun-Jen Chen ,  Tetsuya Mimura

Inventor： Keiichi Kawagoe ,  Kayoko Motoki ,  Takashi Odagiri ,  Nobuyuki Suzuki ,  Chun-Jen Chen ,  Tetsuya Mimura

IPC: A61K31/695 ,  A61K31/537 ,  A61K31/445 ,  A61K31/40 ,  C07D211/56 ,  C07F7/00 ,  C07F7/10

CPC classification number: C07D263/58 ,  A61K31/15 ,  A61K31/417 ,  A61K31/421 ,  A61K31/427 ,  A61K31/437 ,  A61K31/44 ,  A61K31/4439 ,  A61K31/444 ,  A61K31/4545 ,  A61K31/4709 ,  A61K31/495 ,  A61K31/496 ,  A61K31/5377 ,  C07C251/86 ,  C07D213/53 ,  C07D263/32 ,  C07D401/12 ,  C07D413/12 ,  C07D417/12 ,  C07D471/04 ,  C07D487/04 ,  C07D487/12 ,  C07D513/04

Abstract: A compound represented by the following formula (I): wherein R1 represents hydrogen, aryl which may have a substituent, a saturated or unsaturated 5- to 7-membered heterocyclic group which may have a substituent, etc.; R2 represents hydrogen, aryl which may have a substituent, a saturated or unsaturated 5- to 7-membered heterocyclic group which may have a substituent, etc.; R3 represents hydrogen, etc.; Ar represents a divalent group derived from aromatic hydrocarbon, etc.; X represents a single bond, linear or branched alkylene having from 1 to 3 carbon atoms which may have a substituent, etc.; and G represents halogen, a saturated or unsaturated 5- or 6-membered cyclic hydrocarbon group which may have a substituent, a saturated or unsaturated 5- to 7-membered heterocyclic group which may have a substituent, etc., a salt thereof or a solvate thereof; and an agent for inhibiting aggregation and/or deposition of an amyloid protein or an amyloid-like protein, which comprises the compound, a salt thereof or a solvate thereof.

Abstract translation: 由下式（I）表示的化合物：其中R 1表示氢，可具有取代基的芳基，可具有取代基的饱和或不饱和5-至7-元杂环基等 。 R 2表示氢，可具有取代基的芳基，可具有取代基的饱和或不饱和的5至7元杂环基等; R 3表示氢等; Ar表示衍生自芳烃的二价基团等; X表示单键，可具有取代基的具有1〜3个碳原子的直链或支链亚烷基等; G表示卤素，可具有取代基的饱和或不饱和的5或6元环状烃基，可具有取代基的饱和或不饱和5〜7元杂环基等，其盐或 其溶剂合物; 以及用于抑制淀粉样蛋白或淀粉样蛋白样蛋白的聚集和/或沉积的试剂，其包含所述化合物，其盐或其溶剂合物。

公开(公告)号：US5951880A

公开(公告)日：1999-09-14

申请号：US877100

申请日：1997-05-26

Applicant: Chun-Jen Chen ,  Ming-Hung Su ,  Joseph C-C Hung ,  James Hsi-Tang Lee

Inventor： Chun-Jen Chen ,  Ming-Hung Su ,  Joseph C-C Hung ,  James Hsi-Tang Lee

IPC: G11B5/60 ,  G11B23/00 ,  G11B33/10 ,  B44C1/22

CPC classification number: G11B5/6005 ,  G11B23/0021 ,  G11B33/10

Abstract: A wet etching method for making calibration bump disks for use in providing quality control of production run magnetic hard disks is disclosed. It includes the steps of: (a) coating a layer of bump material on a substrate; (b) coating a photoresist layer on the layer of bump material; (c) exposing the photoresist layer to a light source under a photomask; (d) developing the photoresist layer using a developer solution to form an undeveloped photoresist layer; (e) etching the substrate containing the layer of bump material and the undeveloped photoresist layer to remove portions of the layer of bump material not covered by the undeveloped photoresist layer; and (f) stripping the undeveloped photoresist layer to leave at least a bump on the substrate which was originally covered by the undeveloped photoresist layer. The wet etching method eliminates many of the problems observed from the conventional metal mask method, including the elimination of the convex-shaped bump surface.

Abstract translation: 公开了一种用于制造用于提供生产运行磁性硬盘的质量控制的校准凸块的湿式蚀刻方法。 它包括以下步骤：（a）在衬底上涂覆一层凸块材料; （b）在凸块材料层上涂覆光致抗蚀剂层; （c）在光掩模下将光致抗蚀剂层曝光于光源; （d）使用显影剂溶液显影光致抗蚀剂层以形成未显影的光致抗蚀剂层; （e）蚀刻含有凸起材料层和未显影光致抗蚀剂层的基板以去除未被未显影光致抗蚀剂层覆盖的凸起材料层的部分; 和（f）剥离未显影的光致抗蚀剂层，以至少留下最初被未显影的光致抗蚀剂层覆盖的基底上的凸块。 湿蚀刻方法消除了从传统的金属掩模方法观察到的许多问题，包括消除凸形凸起表面。

公开(公告)号：US09671685B2

公开(公告)日：2017-06-06

申请号：US12976646

申请日：2010-12-22

Applicant: Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

Inventor： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC: G06F17/50 ,  G03F1/72 ,  G03F1/86

CPC classification number: G03F1/72 ,  G03F1/86

Abstract: The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the simulated design pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; and determining whether any defects in the mask are critical based on the virtual wafer pattern. The critical defects in the mask can be repaired.

公开(公告)号：US20130241755A1

公开(公告)日：2013-09-19

申请号：US13596744

申请日：2012-08-28

Applicant: Chun-Jen Chen ,  Tsung-Heng Tsai ,  Tzu-Yi Tang

Inventor： Chun-Jen Chen ,  Tsung-Heng Tsai ,  Tzu-Yi Tang

IPC: H03M1/10

CPC classification number: H03M1/1009 ,  H03M1/1215

Abstract: A timing calibration circuit for a time-interleaved analog-to-digital converter (ADC) is provided. The timing calibration circuit includes a correlation unit, an adaptive filter and a delay cell. The correlation unit generates a first correlation coefficient according to a first zero-crossing possibility distribution between a first digital data and a second digital data, and generates a second correlation coefficient according to a second zero-crossing possibility distribution between the second digital data and a third digital data. The adaptive filter generates a predicted time skew according to a difference between the first correlation coefficient and the second correlation coefficient. The delay cell calibrates a clock signal of the ADC according to the predicted time skew.

Abstract translation: 提供了一种用于时间交织的模数转换器（ADC）的定时校准电路。 定时校准电路包括相关单元，自适应滤波器和延迟单元。 相关单元根据第一数字数据和第二数字数据之间的第一过零可能性分布产生第一相关系数，并且根据第二数字数据和第二数字数据之间的第二过零可能性分布产生第二相关系数 第三个数字数据。 自适应滤波器根据第一相关系数和第二相关系数之间的差产生预测的时间偏差。 延迟单元根据预测的时间偏差来校准ADC的时钟信号。

公开(公告)号：US08519512B2

公开(公告)日：2013-08-27

申请号：US11525575

申请日：2006-09-22

Applicant: Hao-Yi Tsai ,  Chia-Lun Tsai ,  Shang-Yun Hou ,  Shin-Puu Jeng ,  Shih-Hsun Hsu ,  Wei-Ti Hsu ,  Lin-Ko Feng ,  Chun-Jen Chen

Inventor： Hao-Yi Tsai ,  Chia-Lun Tsai ,  Shang-Yun Hou ,  Shin-Puu Jeng ,  Shih-Hsun Hsu ,  Wei-Ti Hsu ,  Lin-Ko Feng ,  Chun-Jen Chen

IPC: H01L23/544

CPC classification number: H01L21/78 ,  H01L21/782 ,  H01L21/784 ,  H01L21/786 ,  H01L22/10 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor wafer structure includes a plurality of dies, a first scribe line extending along a first direction, a second scribe line extending along a second direction and intersecting the first scribe line, wherein the first and the second scribe lines have an intersection region. A test line is formed in the scribe line, wherein the test line crosses the intersection region. Test pads are formed in the test line and only outside a free region defined substantially in the intersection region.

公开(公告)号：US08468490B2

公开(公告)日：2013-06-18

申请号：US13315291

申请日：2011-12-09

Applicant: Dan-Chen Wu ,  Shou-Kuo Hsu ,  Cheng-Hsien Lee ,  Chun-Jen Chen

Inventor： Dan-Chen Wu ,  Shou-Kuo Hsu ,  Cheng-Hsien Lee ,  Chun-Jen Chen

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: In a method for checking layout of a printed circuit board (PCB) using an electronic device, a power line is selected from a layout diagram of the PCB. The method searches for one or more signal lines which are overlapping with the selected power line from the layout diagram of the PCB. The method further locates attribute data of the searched signal lines and the selected power line in the layout diagram of the PCB, and displays the attribute data of the searched signal lines and the selected power line on a display device of the electronic device.

Abstract translation: 在使用电子设备检查印刷电路板（PCB）的布局的方法中，从PCB的布局图中选择电力线。 该方法从PCB的布局图搜索与所选择的电力线重叠的一条或多条信号线。 该方法进一步在PCB的布局图中定位搜索到的信号线和所选电力线的属性数据，并将所搜索的信号线和所选电力线的属性数据显示在电子设备的显示装置上。