公开(公告)号：US10690947B2

公开(公告)日：2020-06-23

申请号：US16254753

申请日：2019-01-23

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Stephane Monfray ,  Frédéric Boeuf

IPC: G02F1/025 ,  H01L29/66

Abstract: In one aspect, a photonic device includes a first region having a first doping type, where the first region is divided into an upper portion made of silicon-germanium and a lower portion made of silicon. The device further includes a second region having a second doping type. The first region and the second region contact to form a vertical PN junction.

公开(公告)号：US10684326B2

公开(公告)日：2020-06-16

申请号：US16031395

申请日：2018-07-10

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sylvain Clerc ,  Gilles Gasiot

IPC: G01R31/3177 ,  G01R31/3185 ,  G01R31/3183 ,  G01R31/317

Abstract: A chain of flip-flops is tested by passing a reference signal through the chain. The reference signal is generated from a test pattern that is cyclically fed back at the cadence of a clock signal. The reference signal propagates through the chain of flip-flops at the cadence of the clock signal to output a test signal. A comparison is carried out at the cadence of the clock signal of the test signal and the reference signal, where the reference signal is delayed by a delay time taking into account the number of flip-flops in the chain and the length of the test pattern. An output signal is produced, at the cadence of the clock signal, as a result of the comparison.

公开(公告)号：US10658197B2

公开(公告)日：2020-05-19

申请号：US15390077

申请日：2016-12-23

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Nicolas Posseme ,  Maxime Garcia-Barros ,  Yves Morand

IPC: H01L21/324 ,  H01L21/3115 ,  H01L21/02 ,  H01L21/223 ,  H01L21/322 ,  H01L21/447 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/49 ,  H01L29/78

Abstract: There is provided a method for manufacturing a transistor from a stack including at least one gate pattern comprising at least one flank, the method including forming at least one gate spacer over at least the flank of the gate pattern; and reducing, after a step of exposure of the stack to a temperature greater than or equal to 600° C., of a dielectric permittivity of the at least one gate spacer, the reducing including at least one ion implantation in a portion at least of a thickness of the at least one gate spacer.

公开(公告)号：US20200150292A1

公开(公告)日：2020-05-14

申请号：US16677005

申请日：2019-11-07

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Gilles GASIOT ,  Fady ABOUZEID

IPC: G01T1/24 ,  H01L27/07 ,  H01L31/103

Abstract: A diode and a transistor are connected in parallel. The transistor is located on a first doped region forming a PN junction of the diode with a second doped region located under the first region. The circuit functions as an ionizing radiation detection cell by generating a current through the PN junction which changes by a voltage generated across the transistor. This change in voltage is compared to a threshold to detect the ionizing radiation.

公开(公告)号：US20200081476A1

公开(公告)日：2020-03-12

申请号：US16127771

申请日：2018-09-11

Applicant: STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Guenole LALLEMENT ,  Fady ABOUZEID

IPC: G05F3/20 ,  H03K19/0948 ,  H03K19/00 ,  G06F17/50 ,  H01L27/092 ,  H01L29/78

Abstract: A digital circuit includes logic circuitry formed by logic gates. Each logic gate includes a p-channel MOSFET and an n-channel MOSFET. A body bias generator circuit applies an n-body bias voltage to the n-body bias nodes of the p-channel MOSFETs and applies a p-body bias voltage to the p-body bias nodes of the n-channel MOSFETs. The body bias generator circuit operates in: a first mode to apply a ground supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply a positive supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage; and a second mode to apply the positive supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply the ground supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage.

公开(公告)号：US20200020589A1

公开(公告)日：2020-01-16

申请号：US16582576

申请日：2019-09-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Loic GABEN

IPC: H01L21/8234 ,  H01L21/48 ,  H01L27/088 ,  H01L23/52 ,  H01L21/02

Abstract: A strip made of a semiconductor material is formed over a substrate. Longitudinal portions of the strip having a same length are covered with sacrificial gates made of an insulating material and spaced apart from each other. Non-covered portions of the strip are doped to form source/drain regions. An insulating layer followed by a layer of a temporary material is then deposited. Certain ones of the sacrificial gates are left in place. Certain other ones of the sacrificial gates are replaced by a metal gate structure. The temporary material is then replaced with a conductive material to form contacts to the source/drain regions.

公开(公告)号：US10532379B2

公开(公告)日：2020-01-14

申请号：US15515856

申请日：2015-09-30

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMicroelectronics (Crolles 2) SAS ,  UNIVERSITE GRENOBLE ALPES

Inventor： Fabrice Casset ,  Skandar Basrour ,  Cédrick Chappaz ,  Jean-Sébastien Danel

IPC: H01L41/09 ,  B06B3/00 ,  B81B3/00 ,  B06B1/04 ,  B06B1/06 ,  H01L41/18 ,  H01L41/25

Abstract: A mechanical structure comprising a stack including an active substrate and at least one actuator designed to generate vibrations at the active substrate, the stack comprises an elementary structure for amplifying the vibrations: positioned between the actuator and the active substrate, the structure designed to transmit and amplify the vibrations; and comprising at least one trench, located between the actuator and the active substrate. A method for manufacturing the structure comprising the use of a temporary substrate is provided.

公开(公告)号：US20200013812A1

公开(公告)日：2020-01-09

申请号：US16451856

申请日：2019-06-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Axel Crocherie ,  Denis Rideau

IPC: H01L27/146 ,  H04N5/341

Abstract: A multispectral image sensor includes a semiconductor layer and a number of pixels formed inside and on top of the semiconductor layer. The pixels include a first pixel of a first type formed inside and on top of a first portion of the semiconductor layer and a second pixel of a second type formed inside and on top of a second portion of the semiconductor layer. The first pixel has a first thickness that defines a vertical cavity resonating at a first wavelength and the second pixel has a second thickness different from the first thickness. The second thickness defines a vertical cavity resonating at a second wavelength different than the first wavelength.

公开(公告)号：US20190393207A1

公开(公告)日：2019-12-26

申请号：US16562963

申请日：2019-09-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexandre AYRES ,  Bertrand BOROT

IPC: H01L27/02 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/088

Abstract: A three-dimensional integrated structure is formed by a first substrate with first components oriented in a first direction and a second substrate with second components oriented in a second direction. An interconnection level includes electrically conducting tracks that run in a third direction. One of the second direction and third direction forms a non-right and non-zero angle with the first direction. An electrical link formed by at least one of the electrically conducting tracks electrically connected two points of the first or of the second components.

公开(公告)号：US20190339551A1

公开(公告)日：2019-11-07

申请号：US16401956

申请日：2019-05-02

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat a l'Energie Atomique et aux Energies Alternatives

Inventor： Patrick Le Maitre ,  Nicolas Michit ,  Jean-Francois Carpentier ,  Benoit Charbonnier

IPC: G02F1/025 ,  G01R19/30

Abstract: A device, includes: a ring waveguide; a diode comprising a junction extending at least partly in the ring waveguide; and a first circuit configured to supply a signal representative of a leakage current in the diode.