公开(公告)号：US08451557B2

公开(公告)日：2013-05-28

申请号：US12871508

申请日：2010-08-30

申请人： Kazuyoshi Nagai ,  Hiroshi Iwai

发明人： Kazuyoshi Nagai ,  Hiroshi Iwai

IPC分类号： G11B5/82

CPC分类号： G11B33/08 ,  G11B19/2018 ,  G11B25/043 ,  H02K1/187

摘要： In a disk drive device, a magnetic recording disk is to be mounted on a hub. A base plate rotatably supports the hub through a bearing unit. A projecting portion is formed on the upper surface of the base plate having a cylindrical side surface centered along the rotational axis of the motor. A laminated core is formed by laminating magnetic steel sheets and has a ring portion and a plurality of teeth radially extending from the ring portion. The disk drive device has a tubular vibration-deadening ring. The outer surface of the vibration-deadening ring is press-fitted into the ring portion at least at a position, along the motor's rotational axis, closer to the upper surface than to the lower surface of the laminated core; and the inner surface of the vibration-deadening ring is fixed to the side surface of the projecting portion.

摘要翻译： 在磁盘驱动装置中，将磁记录盘安装在轮毂上。 基板通过轴承单元可旋转地支撑毂。 突起部分形成在基板的上表面上，其具有沿电动机的旋转轴线居中的圆柱形侧表面。 通过层压电磁钢板形成层叠铁芯，并且具有环形部分和从环形部分径向延伸的多个齿。 磁盘驱动装置具有管状振动消音环。 减震环的外表面至少在电动机的旋转轴线处至少位于比上述层叠铁芯的下表面更靠近上表面的环形部分中; 并且防振环的内表面固定到突出部分的侧表面。

公开(公告)号：US08213114B2

公开(公告)日：2012-07-03

申请号：US12545751

申请日：2009-08-21

申请人： Takanori Watanabe ,  Hiroshi Iwai ,  Tomoyuki Tashiro

发明人： Takanori Watanabe ,  Hiroshi Iwai ,  Tomoyuki Tashiro

IPC分类号： G11B17/02

CPC分类号： G11B19/2009 ,  G11B19/2045 ,  H02K3/28

摘要： The disk drive device includes a base member, a hub, a bearing unit which is arranged on the base member and which rotatably supports the hub, and a spindle drive unit which drives the hub to rotate. The spindle drive unit includes a stator core having a salient pole, a coil wound around the salient pole and a magnet opposed to the salient pole. The hub formed of magnetic material includes an outer cylinder portion engaged with an inner circumference of a recording disk and an inner cylinder portion to which an outer circumference of the magnet is fixed. The diameter of the inner cylinder portion is larger than the diameter of the outer cylinder portion.

摘要翻译： 盘驱动装置包括基座构件，轮毂，布置在基座构件上并且可旋转地支撑轮毂的轴承单元和驱动轮毂旋转的主轴驱动单元。 主轴驱动单元包括具有凸极的定子芯，缠绕在凸极上的线圈和与凸极相对的磁体。 由磁性材料构成的毂包括与记录盘的内周接合的外筒部和固定有磁体的外周的内筒部。 内筒部的直径大于外筒部的直径。

公开(公告)号：US08089312B2

公开(公告)日：2012-01-03

申请号：US12679503

申请日：2008-11-25

申请人： Motoyuki Okayama ,  Hiroshi Iwai ,  Motohiko Sako ,  Hidenori Kitamura ,  Yuta Yamamoto

发明人： Motoyuki Okayama ,  Hiroshi Iwai ,  Motohiko Sako ,  Hidenori Kitamura ,  Yuta Yamamoto

IPC分类号： H03F1/14

CPC分类号： H04B1/18

摘要： An amplifying circuit with a bypassing function includes an input terminal to which a signal is input from an antenna, an amplifier connected to the input terminal, a first inductor connected between the input port and a ground, and a bypass circuit connected between the input terminal and the output port of the amplifier. The bypass circuit includes a first port connected to the input terminal, a second port connected to the output port of the amplifier, a switch, a capacitor, and a second inductor. The switch is connected in series between the first and second ports. The capacitor is connected in series to the switch between the first and second ports. The second inductor is connected in series to the switch and the capacitor between the first and second ports. Signal power is not reduced drastically even when the signal passes through the bypass circuit.

摘要翻译： 具有旁路功能的放大电路包括从天线输入信号的输入端子，连接到输入端子的放大器，连接在输入端口和地之间的第一电感器以及连接在输入端子之间的旁路电路 和放大器的输出端口。 旁路电路包括连接到输入端的第一端口，连接到放大器的输出端口的第二端口，开关，电容器和第二电感器。 开关串联连接在第一和第二端口之间。 电容器与第一和第二端口之间的开关串联连接。 第二电感器串联连接到开关和第一和第二端口之间的电容器。 即使信号通过旁路电路，信号功率也不会急剧下降。

公开(公告)号：US08000379B2

公开(公告)日：2011-08-16

申请号：US11917792

申请日：2006-06-30

申请人： Takaaki Kishigami ,  Hiroshi Iwai

发明人： Takaaki Kishigami ,  Hiroshi Iwai

IPC分类号： H04B1/00

CPC分类号： H04B1/18 ,  H04B1/0458 ,  H04B2201/70701

摘要： An object of the invention is to stabilize the convergence operation at the automatic impedance matching time and ensure the reception quality in the convergence process in a fading environment in a radio communication apparatus which performs automatic impedance matching between an antenna and a Radio frequency section to decrease the impedance matching loss, for example, when the apparatus is brought close to a human body. A radio communication apparatus of the invention includes a Radio frequency section 3 which converts a received signal into a baseband signal, a variable impedance unit 2 which adjusts impedance between an antenna 1 and the Radio frequency section 3, a pilot signal extraction unit 4 which extracts a pilot signal from the baseband signal, a first channel compensation unit 5 which performs channel compensation using an output of the pilot signal extraction unit, an impedance control adequacy detection unit 7 which detects impedance control adequacy using an output of the first channel compensation unit, an impedance control unit 8 which controls the variable impedance unit 2 using an output of the impedance control adequacy detection unit, a second channel compensation unit 6 which performs channel compensation using the pilot signal, and a demodulation section 9 which performs the demodulation operation using an output of the second channel compensation unit.

摘要翻译： 本发明的一个目的是在自动阻抗匹配时间稳定收敛操作，并且确保在天线和射频部分之间进行自动阻抗匹配的无线电通信装置的衰落环境中的收敛过程中的接收质量降低 阻抗匹配损失，例如当该装置靠近人体时。 本发明的无线通信装置具有将接收信号转换为基带信号的射频部3，调整天线1与射频部3之间的阻抗的可变阻抗部2，提取出导频信号提取部4 来自基带信号的导频信号，使用导频信号提取单元的输出进行信道补偿的第一信道补偿单元5，使用第一信道补偿单元的输出来检测阻抗控制充分性的阻抗控制适合度检测单元7， 阻抗控制单元8，其使用阻抗控制充分性检测单元的输出来控制可变阻抗单元2;第二信道补偿单元6，其使用导频信号进行信道补偿;以及解调单元9，其使用 输出第二通道补偿单元。

公开(公告)号：US20080048250A1

公开(公告)日：2008-02-28

申请号：US11846369

申请日：2007-08-28

申请人： Hisayo MOMOSE ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

发明人： Hisayo MOMOSE ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

IPC分类号： H01L27/06

CPC分类号： H01L29/66575 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/28211 ,  H01L27/0629 ,  H01L27/088 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/78

摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 μm; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

摘要翻译： 半导体器件包括：p型半导体衬底（1）; 绝缘膜（3）; 经由所述绝缘膜形成在所述基板上的栅电极（2） 以及形成在形成在基板（1）上的栅电极（2）下方的沟道形成区域（4）的两侧的n型源极/漏极区域（5）。 特别地，在氧化硅膜的转换率（氧化硅当量厚度）下，确定绝缘膜（3）的厚度（T×OX ）小于2.5nm。 栅极（2）的栅极长度（L SUB）确定为等于或小于0.3μm; 并且进一步施加到栅极（2）和漏极区（6）的电压被确定为1.5V或更小。 因此，在具有隧穿栅极氧化膜（3）的MOSFET中，可以提高热载流子应力下的晶体管的可靠性，并且可以显着降低栅极漏电流，从而可以显着提高晶体管特性。

公开(公告)号：US06929990B2

公开(公告)日：2005-08-16

申请号：US10681318

申请日：2003-10-09

申请人： Hisayo Momose ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

发明人： Hisayo Momose ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

IPC分类号： H01L21/225 ,  H01L21/336 ,  H01L27/088 ,  H01L29/423 ,  H01L29/76 ,  H01L29/78

CPC分类号： H01L29/66575 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/28211 ,  H01L27/0629 ,  H01L27/088 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/78

摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 μm; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

摘要翻译： 半导体器件包括：p型半导体衬底（1）; 绝缘膜（3）; 经由所述绝缘膜形成在所述基板上的栅电极（2） 以及形成在形成在基板（1）上的栅电极（2）下方的沟道形成区域（4）的两侧的n型源极/漏极区域（5）。 特别地，在氧化硅膜的转换率（氧化硅当量厚度）下，确定绝缘膜（3）的厚度（T×OX ）小于2.5nm。 栅极（2）的栅极长度（L SUB）确定为等于或小于0.3μm; 并且进一步施加到栅极（2）和漏极区（6）的电压被确定为1.5V或更小。 因此，在具有隧穿栅极氧化膜（3）的MOSFET中，可以提高热载流子应力下的晶体管的可靠性，并且可以显着降低栅极漏电流，从而可以显着提高晶体管特性。

公开(公告)号：US06410952B1

公开(公告)日：2002-06-25

申请号：US09828205

申请日：2001-04-09

申请人： Hisayo Momose ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

发明人： Hisayo Momose ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

IPC分类号： H01L2976

摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 &mgr;m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

公开(公告)号：US5903027A

公开(公告)日：1999-05-11

申请号：US910222

申请日：1997-08-13

申请人： Takashi Yoshitomi ,  Masanobu Saito ,  Hisayo Momose ,  Hiroshi Iwai ,  Yukihiro Ushiku ,  Mizuki Ono ,  Yasushi Akasaka ,  Hideaki Nii ,  Satoshi Matsuda ,  Yasuhiro Katsumata ,  Tatsuya Ooguro ,  Claudio Fiegna

发明人： Takashi Yoshitomi ,  Masanobu Saito ,  Hisayo Momose ,  Hiroshi Iwai ,  Yukihiro Ushiku ,  Mizuki Ono ,  Yasushi Akasaka ,  Hideaki Nii ,  Satoshi Matsuda ,  Yasuhiro Katsumata ,  Tatsuya Ooguro ,  Claudio Fiegna

IPC分类号： H01L21/033 ,  H01L21/225 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/423 ,  H01L29/76

CPC分类号： H01L29/6659 ,  H01L21/0338 ,  H01L21/2255 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/823814 ,  H01L27/0928 ,  H01L29/0847 ,  H01L29/42376 ,  H01L29/66628

摘要： A MOS type semiconductor device has a gate whose length is 170 nm (0.17 .mu.m) or less, a junction depth of source and drain diffusion layers in the vicinity of a channel is 22 nm or less, and a concentration of impurities at the surface in the source and drain diffusion layers is made to 10.sup.20 cm.sup.-3 or more. Such structure is obtained using solid phase diffusion using heat range from 950.degree. C. to 1050.degree. C. and/or narrowing gate width by ashing or etching. The other MOS type semiconductor device is characterized in that the relationship between the junction depth x.sub.j �nm! in the source and drain diffusion layer regions and the effective channel length L.sub.eff �nm! is determined by L.sub.eff >0.69 x.sub.j -6.17.

摘要翻译： MOS型半导体器件具有长度为170nm（0.17μm）以下的栅极，沟道附近的源极和漏极扩散层的结深度为22nm以下，表面上的杂质浓度 在源极和漏极扩散层中形成1020cm-3以上。 这种结构使用从950℃到1050℃的热范围的固相扩散和/或通过灰化或蚀刻使栅极宽度变窄来获得。 其他MOS型半导体器件的特征在于源极和漏极扩散层区域中的结深度xj [nm]与有效沟道长度Leff [nm]之间的关系由Leff> 0.69×j-6.17确定。

公开(公告)号：US5637909A

公开(公告)日：1997-06-10

申请号：US581939

申请日：1996-01-02

申请人： Hiroomi Nakajima ,  Yasuhiro Katsumata ,  Hiroshi Iwai ,  Toshihiko Iinuma ,  Kazumi Inou ,  Mitsuhiko Kitagawa ,  Kouhei Morizuka ,  Akio Nakagawa ,  Ichiro Omura

发明人： Hiroomi Nakajima ,  Yasuhiro Katsumata ,  Hiroshi Iwai ,  Toshihiko Iinuma ,  Kazumi Inou ,  Mitsuhiko Kitagawa ,  Kouhei Morizuka ,  Akio Nakagawa ,  Ichiro Omura

IPC分类号： H01L21/331 ,  H01L27/12 ,  H01L29/73 ,  H01L29/786 ,  H01L21/76

CPC分类号： H01L29/66265 ,  H01L27/1203 ,  H01L29/66242 ,  H01L29/7317 ,  H01L29/78654

摘要： A bipolar transistor is formed on a silicon substrate having a silicon oxide film. An n-silicon layer having a top surface of a (100) plane is formed on the silicon oxide film and is used as a collector layer. An end face constituted by a (111) plane is formed on the end portion of the collector layer by etching, using an aqueous KOH solution. A B-doped p-silicon layer is formed on the end face by epitaxial growth and is used as a base layer. Furthermore, an As-doped n-silicon layer is formed on the base layer and is used as an emitter layer. Electrodes are respectively connected to the collector, base, and emitter layers.

摘要翻译： 在具有氧化硅膜的硅衬底上形成双极晶体管。 在氧化硅膜上形成具有（100）面的顶面的n型硅层，作为集电体层使用。 使用KOH水溶液通过蚀刻在集电体层的端部上形成由（111）面构成的端面。 通过外延生长在端面上形成B掺杂的p硅层，并用作基底层。 此外，在基极层上形成As掺杂的n硅层，并用作发射极层。 电极分别连接到集电极，基极和发射极层。

公开(公告)号：US4755863A

公开(公告)日：1988-07-05

申请号：US895599

申请日：1986-08-15

申请人： Satoshi Maeda ,  Hiroshi Iwai

发明人： Satoshi Maeda ,  Hiroshi Iwai

IPC分类号： H01L21/20 ,  H01L21/268 ,  H01L21/762 ,  H01L29/78 ,  H01L27/12 ,  H01L29/04 ,  H01L29/06

CPC分类号： H01L21/76294 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/268

摘要： A high-performance, high-integration, and a highly reliable semiconductor device has a semiconductor substrate, an element isolation layer of an insulating material which is formed on the semiconductor substrate, a monocrystalline semiconductor layer formed on the portion of the semiconductor substrate and isolated from the element isolation layer, and a semiconductor element formed in the monocrystalline semiconductor layer. The impurity concentration of at least the surface region of the semiconductor substrate which is covered with the element isolation layer is not less than 10.sup.16 /cm.sup.3.

摘要翻译： 高性能，高集成度和高​​可靠性的半导体器件具有半导体衬底，形成在半导体衬底上的绝缘材料的元件隔离层，形成在半导体衬底部分上并分离的单晶半导体层 从元件隔离层和形成在单晶半导体层中的半导体元件。 被元件隔离层覆盖的至少半导体衬底的表面区域的杂质浓度不小于1016 / cm3。