Method of manufacturing semiconductor memory device having a capacitor
    82.
    发明授权
    Method of manufacturing semiconductor memory device having a capacitor 失效
    具有电容器的半导体存储器件的制造方法

    公开(公告)号:US06333226B1

    公开(公告)日:2001-12-25

    申请号:US09425172

    申请日:1999-10-22

    IPC分类号: H01L218242

    CPC分类号: H01L27/10852 H01L27/10817

    摘要: Disclosed herein is a semiconductor memory device. In the semiconductor memory device, a transfer transistor having a drain region and a source region is formed on an Si semiconductor substrate. A lower end of a storage node is electrically connected to the drain region through a drain contact hole defined in an interlayer insulator. The storage node has an on-film extending portion which extends on an upper surface of the interlayer insulator, and a fin-shaped electrode portion which protrudes from the on-film extending portion. Structurally, the fin-shaped electrode portion is provided within a capacitor region so as to extend within a region smaller than the capacitor region and is spaced away from the on-film extending portion on the side of a bit line contact hole defined in the interlayer insulator.

    摘要翻译: 这里公开了一种半导体存储器件。 在半导体存储器件中,在Si半导体衬底上形成具有漏极区域和源极区域的转移晶体管。 存储节点的下端通过限定在层间绝缘体中的漏极接触孔电连接到漏极区域。 存储节点具有在层间绝缘体的上表面上延伸的膜上延伸部分和从膜上延伸部分突出的鳍状电极部分。 在结构上,鳍状电极部分设置在电容器区域内,以便在小于电容器区域的区域内延伸,并且与位于中间层中限定的位线接触孔侧的膜上延伸部分间隔开 绝缘子。

    Process for synthesizing metallocene compounds
    84.
    发明授权
    Process for synthesizing metallocene compounds 失效
    合成茂金属化合物的方法

    公开(公告)号:US5892075A

    公开(公告)日:1999-04-06

    申请号:US936169

    申请日:1997-09-23

    IPC分类号: C07F17/00 C07F7/00

    CPC分类号: C07F17/00 Y10S526/943

    摘要: The object of the invention resides in the development of an improved process for synthesizing metallocene compounds useful as olefin polymerization catalysts.A new process for synthesizing metallocene compounds of formulae (IV) and (IV') comprises a reaction of formula (I) with formula (II) or (II') to afford formula (III) or (III'), and then a reaction of a halogenating agent.In formulae (IV) and (IV') described below, M.sup.1 is a group IV transition-metal atom, L.sup.1 and L.sup.2 can be each other identical or different and are substituted or unsubstituted cyclopentadienyl, substituted or unsubstituted indenyl or substituted or unsubstituted fluorenyl groups, B is a hydrocarbon having 1-20 carbon atoms, silylene having 1-20 carbon atoms, oligosilylene or germylene groups, binding to L.sup.1 and L.sup.2, Y can be identical or different and is each independently of one another a halogen atom. Further, M.sup.1 can be coordinated with an ether or an amine at any coordination number. ##STR1##

    摘要翻译: 本发明的目的在于开发可用作烯烃聚合催化剂的金属茂化合物的改进方法。 用于合成式(IV)和(IV')的茂金属化合物的新方法包括式(I)与式(II)或(II')的反应,得到式(III)或(III'),然后 卤化剂的反应。 在下述式(IV)和(IV')中,M1是IV族过渡金属原子,L1和L2可以彼此相同或不同,并且是取代或未取代的环戊二烯基,取代或未取代的茚基或取代或未取代的芴基 B是具有1-20个碳原子的烃,具有1-20个碳原子的亚甲硅基,低级亚烯基或亚甲硅烷基,与L1和L2结合,Y可以相同或不同,并且各自独立地为卤素原子。 此外,M1可以任何配位数与醚或胺配位。 反应方案2

    Protecting film for wafer and method for grinding surface of wafer with
the same
    86.
    发明授权
    Protecting film for wafer and method for grinding surface of wafer with the same 失效
    晶圆保护膜及其研磨方法

    公开(公告)号:US5601732A

    公开(公告)日:1997-02-11

    申请号:US555786

    申请日:1995-11-09

    申请人: Masahiro Yoshida

    发明人: Masahiro Yoshida

    摘要: Upon grinding a back of a substrate, a protecting tape made of a material soluble to IPA (isopropanol), for example, a vinyl acetate thermoplastic adhesive is appended on the surface of a pattern-formed layer of a wafer, grinding the back, dipping the wafer in a cleaning vessel containing IPA, and dissolving and removing the protecting tape from the wafer, thereby giving no damages to the wafer, and reducing the number of operation steps.

    摘要翻译: 在研磨基材的背面后,将由可溶于IPA(异丙醇)的材料制成的保护带,例如乙酸乙烯酯热塑性粘合剂附着在晶片的图案形成层的表面上,研磨背面,浸渍 在包含IPA的清洁容器中的晶片,并且从晶片上溶解并除去保护带,从而不会损坏晶片,并且减少操作步骤的数量。

    Processing device for sheet-like media
    87.
    发明授权
    Processing device for sheet-like media 失效
    片状介质处理装置

    公开(公告)号:US5528788A

    公开(公告)日:1996-06-25

    申请号:US469857

    申请日:1995-06-06

    CPC分类号: B08B3/08 B08B3/10

    摘要: A processing device for processing sheet-like media via immersion in a special fluid, for example, for renewing a copy sheet by removing printed material such as toner therefrom. The processing device has a tank accommodating a fluid therein; a sheet feeding device for feeding a sheet into the fluid in the tank, a sheet accommodating device for accommodating a sheet, a sensing device for outputting a signal responsive to a state of the sheet in the sheet accommodating device, and a changing device for changing a relative position between the tank and the sheet accommodating device, the relative position including a retracted position where the sheet accommodating device is positioned outside the tank and an operating position where the sheet accommodating device is positioned within the fluid in the tank, the changing device changing the relative position in response to the signal outputted by the sensing device. The processing device permits a jammed sheet to be easily removed from the device, usually without it being necessary for an operator to touch the fluid in the tank.

    摘要翻译: 一种用于通过浸入特殊流体来处理片状介质的处理装置,例如通过从其中去除诸如调色剂的印刷材料来更新复印纸。 处理装置具有容纳流体的罐; 用于将片材供给到罐中的流体中的片材进给装置,用于容纳片材的片材容纳装置,用于响应于片材容纳装置中的片状态输出信号的感测装置,以及用于改变 所述罐与所述纸张容纳装置之间的相对位置,所述相对位置包括所述纸张容纳装置位于所述储存箱外部的缩回位置以及所述纸张容纳装置位于所述储存器的流体内的操作位置,所述变更装置 响应于由感测装置输出的信号改变相对位置。 处理装置允许卡住的片材容易地从装置移除,通常不需要操作者接触罐中的流体。

    Semiconductor memory device
    88.
    发明授权

    公开(公告)号:US5497353A

    公开(公告)日:1996-03-05

    申请号:US413411

    申请日:1995-03-30

    CPC分类号: G11C7/18 G11C7/1075 G11C8/10

    摘要: A multiport memory is provided which permits both random access and serial access. In order to reduce parasitic capacitance and improve operating speed, the serial input/output lines are each divided into two parts at their middle points. Sense amplifiers for the serial input/output lines are provided at upper and lower ends of the serial access memory elements to respectively amplify signals from the divided lines. Additional features are provided for improving both the serial and random operation. For example, during the serial read mode, the column selector for random access is simultaneously operated, and read data passing through the random access column selector is used as head data for the serial output operation to be delivered through the serial output circuit. Also, a serial selector can be controlled by a select signal formed by a Gray Code counter to improve operating speed. Further features included a redundancy system for relief of defective bits, the use of common bit lines to improve integration density and an improved refreshing arrangement to reduce power consumption during the refresh mode.

    Field effect transistor device with contact in groove
    90.
    发明授权
    Field effect transistor device with contact in groove 失效
    场效应晶体管器件与沟槽接触

    公开(公告)号:US5324981A

    公开(公告)日:1994-06-28

    申请号:US46920

    申请日:1993-04-14

    摘要: A high power FET device includes a plated heat sink, a rear surface electrode disposed between a substrate and the heat sink, a via-hole extending through the substrate and containing a metal plating for electrically connecting the rear surface electrode and an element, such as the source electrode, of the FET device. A metallic layer extending from the rear surface to the front surface of the device protects the side walls of the substrate during handling. The side wall protection layer extends onto portions of the front surface of the substrate as a measurement electrode. The arrangement gives access to the source, drain, and gate electrodes of the device from the front surface for measuring the electrical characteristics of the device while it is still part of a wafer containing a large number of devices. Each device includes a separation groove outwardly spaced from the device and containing a metallic layer which becomes the side wall protection layer after dicing. Preferably, the separation grooves are wider and deeper than the via-holes.

    摘要翻译: 高功率FET器件包括电镀散热器,设置在基板和散热片之间的背面电极,延伸穿过基板的通孔,并容纳用于电连接背面电极和元件的金属镀层,例如 FET器件的源电极。 从设备的后表面延伸到前表面的金属层在处理期间保护基板的侧壁。 侧壁保护层作为测量电极延伸到基板的前表面的部分上。 该布置允许从前表面访问器件的源极,漏极和栅电极,用于测量器件的电特性,同时它仍然是包含大量器件的晶片的一部分。 每个装置包括与装置向外间隔的分离槽,并且包含在切割之后成为侧壁保护层的金属层。 优选地,分离槽比通孔更宽和更深。