公开(公告)号：USD551105S1

公开(公告)日：2007-09-18

申请号：US29239834

申请日：2005-10-05

申请人： Dierk Brasse ,  Werner Weber

设计人： Dierk Brasse ,  Werner Weber

公开(公告)号：US20050133375A1

公开(公告)日：2005-06-23

申请号：US11017793

申请日：2004-12-22

申请人： Gunter Schmid ,  Hagen Klauk ,  Marcus Halik ,  Ute Zschieschang ,  Werner Weber ,  Andreas Mueller-Hipper

发明人： Gunter Schmid ,  Hagen Klauk ,  Marcus Halik ,  Ute Zschieschang ,  Werner Weber ,  Andreas Mueller-Hipper

IPC分类号： C25D1/04 ,  C25D5/02 ,  C25D17/12

CPC分类号： G06K19/07779 ,  C25D1/003 ,  C25D1/04 ,  C25D5/022 ,  C25D17/12 ,  G06K19/07783

摘要： A method is described for producing a structured metal layer used, for example, as an antenna for RF ID tags. The structured metal layer is electrodeposited on a cathode, on the surface of which conducting and non-conducting regions are defined. Applied to the deposited metal layer in a residual volume is an adhesive with which the structured metal layer can be made to adhere firmly on a carrier layer.

摘要翻译： 描述了用于制造用于例如RF ID标签的天线的结构化金属层的方法。 结构化金属层电沉积在阴极上，其表面上限定了导电和非导电区域。 以残留体积施加到沉积的金属层上的是粘结剂，结构化金属层可以通过该粘合剂牢固地粘附在载体层上。

公开(公告)号：US20050099209A1

公开(公告)日：2005-05-12

申请号：US10600750

申请日：2003-06-19

申请人： R. Luyken ,  Markus Seitz ,  Jon Preece ,  Werner Weber ,  Gunter Schmid

发明人： R. Luyken ,  Markus Seitz ,  Jon Preece ,  Werner Weber ,  Gunter Schmid

IPC分类号： C07D213/22 ,  G11C13/02 ,  H01L27/28 ,  H01L51/30 ,  H03D13/00

CPC分类号： H01L51/0591 ,  B82Y10/00 ,  C07D213/22 ,  G11C13/0009 ,  G11C13/0014 ,  H01L27/28 ,  H01L51/0067 ,  H01L51/0072 ,  H01L51/0595

摘要： The circuit element has a first layer composed of an electrically insulating substrate material and a first electrically conductive material which is in the form of at least one discrete area such that it is embedded in the substrate material and/or is applied to the substrate material. Furthermore, it has a second layer having a second electrically conductive material, and a monomolecular layer composed of redox-active bispyridinium molecules, which is arranged between the first layer and the second layer. The bispyridinium molecules are immobilized on the electrically conductive material which is in the form of at least one discrete area, and make electrical contact with the second electrical material of the second layer. Furthermore, electrically inert molecules are immobilized on the first layer, which molecules form a matrix which surrounds the at least one discrete area with the monomolecular layer composed of bispyridinium molecules.

摘要翻译： 电路元件具有由电绝缘衬底材料和至少一个离散区域形式的第一导电材料构成的第一层，使得其嵌入在衬底材料中和/或施加到衬底材料上。 此外，它具有第二层，其具有第二导电材料和由氧化还原活性双吡啶鎓分子组成的单分子层，其被布置在第一层和第二层之间。 双吡啶鎓分子被固定在导电材料上，该导电材料为至少一个离散区域的形式，并与第二层的第二电气材料电接触。 此外，电惰性分子固定在第一层上，该分子形成一个矩阵，该基体围绕至少一个离散的区域，单分子层由双吡啶鎓分子构成。

公开(公告)号：US06833731B1

公开(公告)日：2004-12-21

申请号：US10070025

申请日：2002-05-14

申请人： Christl Lauterbach ,  Georg Braun ,  Udo Ollert ,  Werner Weber

发明人： Christl Lauterbach ,  Georg Braun ,  Udo Ollert ,  Werner Weber

IPC分类号： H03K1900

CPC分类号： G01F15/06 ,  H03K3/356086 ,  H03K3/45

摘要： A supply voltage is needed in conventional electronic circuits used for processing signals, such as counting pulses. The supply voltage supplies the logic circuit components. Especially apparatuses which have to be operated over a longer period of time or/and in remote sites of use and are dependent upon a supply voltage are impaired with the dependency-related disadvantages, such as the necessity of expensive EEPROMs or significantly increased maintenance expenditure. The present invention relates to an electronic circuit which is provided with an input (5) for inputting at least one information signal, an energy means (2) for converting the energy that is present in the at least one information signal into a supply voltage, a control means (3) for generating at least one switch-on control signal when the information signal is input and a signal processing means (4) for storing information which is represented by the at least one information signal and/or for evaluating information which is represented by the at least one information signal and for storing the secondary information which is obtained by the evaluation. At least one ferroelectric flipflop (26) is used. The signal processing means (4) can be activated by the at least one switch-on control signal for evaluating and/or storing purposes. The at least one information signal can be or is the only energy source for the electronic circuit (1) during the evaluation and/or storing process.

摘要翻译： 在用于处理信号的常规电子电路中需要电源电压，例如计数脉冲。 电源电压供给逻辑电路元件。 特别是必须在更长的时间段内或/和远程使用场所操作并且取决于电源电压的装置会受到依赖性相关缺点的损害，例如昂贵的EEPROM的必要性或显着增加的维护费用。 本发明涉及一种电子电路，其具有用于输入至少一个信息信号的输入端（5），用于将存在于至少一个信息信号中的能量转换为电源电压的能量装置（2） 用于当输入信息信号时产生至少一个接通控制信号的控制装置（3）和用于存储由至少一个信息信号表示的信息和/或用于评估信息的信息的信号处理装置（4） 由所述至少一个信息信号表示，并且用于存储通过评估获得的次要信息。 至少使用一个铁电触发器（26）。 信号处理装置（4）可以被至少一个接通控制信号激活，用于评估和/或存储目的。 在评估和/或存储过程期间，至少一个信息信号可以是或是电子电路（1）的唯一能量源。

公开(公告)号：US06822916B2

公开(公告)日：2004-11-23

申请号：US09796207

申请日：2001-06-01

申请人： Alexander Frey ,  Werner Weber ,  Till Schlösser

发明人： Alexander Frey ,  Werner Weber ,  Till Schlösser

IPC分类号： G11C700

CPC分类号： H01L27/10894 ,  G11C11/4091 ,  H01L27/10876 ,  H01L27/10897

摘要： As a consequence of DRAM memory cell miniaturization, the available space for read/write amplifiers decreases in width from hitherto 4 bit line grids to 2 bit lines grids. Conventionally previously known read/write amplifiers cannot be accommodated on this reduced, still available space. Therefore, it has not been possible hitherto to provide read/write amplifiers arranged beside one another which would manage with the novel DRAM memory cell spacings. The principle underlying the invention is based on replacing at least some of the transistors of conventional design which are usually used for read/write circuits by “vertical transistors” in which the differently doped regions are arranged one above the other or practically one above the other. Compared with the use of conventional transistors, the use of vertical transistors saves enough space to ensure an arrangement of a read/write circuit in the grid even with a reduced grid width.

摘要翻译： 作为DRAM存储单元小型化的结果，用于读/写放大器的可用空间从迄今为止的4位线栅格宽度减小到2位线栅格。 常规的已知的读/写放大器不能适应这个缩小的仍然可用的空间。 因此，到目前为止还不可能提供一个旁边配置的读/写放大器，这些放大器将利用新颖的DRAM存储器单元间隔进行管理。 本发明的原理是基于将通常用于读/写电路的常规设计的至少一些晶体管替换为“垂直晶体管”，其中不同掺杂区域一个在另一个上方布置或实际上一个在另一个之上 。 与使用常规晶体管相比，垂直晶体管的使用节省了足够的空间，以确保即使在减小的栅格宽度的情况下也能在网格中布置读/写电路。

公开(公告)号：US06539506B1

公开(公告)日：2003-03-25

申请号：US09431529

申请日：1999-11-01

申请人： Stefan Lammers ,  Werner Weber

发明人： Stefan Lammers ,  Werner Weber

IPC分类号： G11C2900

CPC分类号： G11C29/72 ,  G11C29/44

摘要： A read/write memory includes a monolithically integrated self-test device which iteratively enables a defect test with a redundancy analysis, without significant external test aids. The test is achieved essentially by virtue of the fact that word lines to be repaired are stored and excluded from further examinations and in each case the line having the most defects not previously detected is always determined and examined first, until either the number of repair lines no longer suffices or no more defects occur. An associated test method is also provided.

摘要翻译： 读/写存储器包括一个单片集成的自检设备，它可以通过冗余分析迭代地启用缺陷测试，而无需大量的外部测试帮助。 测试基本上是由于要修复的字线被存储并排除在进一步检查之外，并且在每种情况下，首先确定和检查具有最初缺陷的线，直到修复线的数目 不再足够或没有更多的缺陷发生。 还提供了相关的测试方法。

公开(公告)号：US06452850B1

公开(公告)日：2002-09-17

申请号：US09799940

申请日：2001-03-06

申请人： Alexander Frey ,  Werner Weber

发明人： Alexander Frey ,  Werner Weber

IPC分类号： G11C700

CPC分类号： G11C11/4091 ,  G11C7/065

摘要： A description is given of a sense amplifier subcircuit (10), for example an N latch section or a P latch section, for a DRAM memory for amplifying voltage signals read from a bit line (50), having at least two evaluation transistors (20; 30), the gate (21) of one evaluation transistor (20) being connected or connectable to at least one bit line (50) and the gate (31) of another evaluation transistor (30) being connected or connectable to at least one reference bit line (51) and the drains (23, 33) of the evaluation transistors (20; 30) being connected or connectable to the bit lines (51, 50) and the sources (22, 32) of the evaluation transistors (20; 30) being connected or connectable to a (NCS/PCS) lead (11).

摘要翻译： 给出了用于放大从具有至少两个评估晶体管（20）的位线（50）读取的电压信号的DRAM存储器的读出放大器子电路（10），例如N个锁存部分或P锁存部分， ; 30），一个评估晶体管（20）的栅极（21）被连接或连接到至少一个位线（50），并且另一个评估晶体管（30）的栅极（31）被连接或连接到至少一个 评估晶体管（20,30）的参考位线（51）和漏极（23,33）被连接或连接到评估晶体管（20,50）的位线（51,50）和源极（22,32） ; 30）被连接或可连接到（NCS / PCS）引线（11）。

公开(公告)号：US06445609B2

公开(公告)日：2002-09-03

申请号：US09801715

申请日：2001-03-09

申请人： Alexander Frey ,  Werner Weber ,  Till Schlösser

发明人： Alexander Frey ,  Werner Weber ,  Till Schlösser

IPC分类号： G11C1194

CPC分类号： H01L27/10882 ,  G11C11/4097 ,  H01L27/0207 ,  H01L27/10829 ,  H01L27/10885 ,  H01L27/10897

摘要： A DRAM memory (50) having a number of DRAM memory cells (51) is described, the memory cells (51) in each case having a storage capacitor (52) and a selection transistor (12) which are formed in the area of an at least essentially rectangular cell area (59), the cell areas (59) having a greater extent in the longitudinal direction (L) than in the width direction (B) and which are wired or can be wired to the cell periphery via a word line (56, 57) and a bit line (55). The word lines (56, 57) and the bit line (55) are conducted over the memory cells (51) and are at least essentially oriented perpendicularly to one another. To achieve, with increasing miniaturization of the DRAM memory patterns, during the transition from so-called “folded” bit line architectures to so-called “open” bit line architectures that the bit line grid, and thus also the grid of corresponding read/write amplifiers, varies linearly in scale with the longitudinal extent (L) of the memory cells (51), it is provided according to the invention that the bit lines (55) are now oriented perpendicularly to the longitudinal extent (L) of the memory cells (51) in the direction of the lateral extent (B) of the memory cells (51)

摘要翻译： 描述了具有多个DRAM存储单元（51）的DRAM存储器（50），每个情况下的存储单元（51）具有存储电容器（52）和选择晶体管（12） 至少基本上矩形的单元区域（59），所述单元区域（59）在纵向方向（L）上比在宽度方向（B）上具有更大的程度，并且它们被布线或可以经由字连接到单元周边 线（56,57）和位线（55）。 字线（56,57）和位线（55）在存储器单元（51）上传导，并且至少基本上彼此垂直定向。 为了实现随着DRAM存储器模式的小型化，在从所谓的“折叠”位线结构转变到所谓的“开放”位线架构，即位线格栅，从而也是对应读/ 写放大器随着存储器单元（51）的纵向延伸（L）而在尺度上线性变化，根据本发明，提供了位线（55）垂直于存储器的纵向延伸（L）定向 在存储单元（51）的横向范围（B）的方向上的单元（51）

公开(公告)号：US5734318A

公开(公告)日：1998-03-31

申请号：US681732

申请日：1996-07-29

申请人： Werner Nitschke ,  Hermann Maier ,  Werner Weber

发明人： Werner Nitschke ,  Hermann Maier ,  Werner Weber

IPC分类号： B60R21/16 ,  B60R21/01 ,  G01R31/28 ,  B60R21/32

CPC分类号： B60R21/0173 ,  G01R31/2829

摘要： An electronic device includes an acceleration-sensitive sensor, an electronic circuit arrangement for analyzing the output signal from the sensor, an ignition output element, an ignition element, and a safety device for the vehicle's occupants. To test the operating readiness of the ignition element, an oscillator circuit is also provided, which applies an output signal to the ignition element. The resulting voltage drop obtained across the ignition element is compared by means of a window comparator to threshold values.

摘要翻译： 电子设备包括加速度敏感传感器，用于分析来自传感器的输出信号的电子电路装置，点火输出元件，点火元件和用于车辆乘客的安全装置。 为了测试点火元件的操作准备状态，还提供了振荡器电路，其向点火元件施加输出信号。 通过点火元件获得的所得电压降通过窗口比较器与阈值进行比较。

公开(公告)号：US5697296A

公开(公告)日：1997-12-16

申请号：US639425

申请日：1996-04-29

申请人： Norbert Thunker ,  Martin Mayer ,  Werner Weber

发明人： Norbert Thunker ,  Martin Mayer ,  Werner Weber

IPC分类号： B41F13/24 ,  B41F13/28 ,  B41F13/36 ,  B41F7/02

CPC分类号： B41F13/28

摘要： A positioning device for a rubber-blanket cylinder which is supported in double-excentric bearing rings allows a positional adjustment of the rubber-blanket cylinder relative to a plate cylinder and a printing substrate supported on an impression cylinder. The plate cylinder and the impression cylinder have stationary axes of rotation relative to the frame of the printing unit. A printing gap is adjusted by the positioning device to varying printing substrate thickness, and in one terminal position, the rubber-blanket cylinder is fully disengaged from the other cylinders. The rubber-blanket cylinder is shifted along a positioning path with one segment following an arc of a circle which is concentric with the plate cylinder. The parameters of the bearing and the adjusting devices are defined such that the positioning path is traversed while the respective inner and outer bearing rings rotate continuously.

摘要翻译： 用于橡胶橡皮滚筒的定位装置，其被支撑在双偏心轴承环中，允许橡胶橡皮滚筒相对于支撑在压印滚筒上的印版滚筒和印刷基板的位置调整。 印版滚筒和压印滚筒相对于印刷单元的框架具有固定的旋转轴线。 通过定位装置调节打印间隙以改变印刷基板厚度，并且在一个端子位置，橡胶橡皮布滚筒与其它滚筒完全脱离。 橡胶橡皮滚筒沿着定位路径移动，其中一个区段跟随与印版滚筒同心的圆弧。 轴承和调节装置的参数被定义为使得定位路径在相应的内外轴承环连续旋转的同时被横动。