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公开(公告)号:US20220147799A1
公开(公告)日:2022-05-12
申请号:US17500429
申请日:2021-10-13
Inventor: Changhyun KIM , Houk JANG , Henry Julian HINTON , Hyeonjin SHIN , Minhyun LEE , Donhee HAM
Abstract: Disclosed is a neural computer including an image sensor capable of controlling a photocurrent. The neural computer according to an embodiment includes a preprocessor configured to receive an image and generate a feature map for the received image; a flattening unit configured to transform the feature map generated by the preprocessor into tabular data to provide data output; and an image classifier configured to classify images received through the preprocessor by using the data output by the flattening unit as an input value. The preprocessor includes an optical signal processor configured to receive the image and generate the feature map.
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公开(公告)号:US20220140100A1
公开(公告)日:2022-05-05
申请号:US17405619
申请日:2021-08-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yeonchoo CHO , Kyung-Eun BYUN , Hyeonjin SHIN
IPC: H01L29/45
Abstract: Disclosed is a semiconductor device including a surface-treated semiconductor layer. The semiconductor device includes a metal layer, a semiconductor layer electrically contacting the metal layer and having a surface treated with an element having an electron affinity of about 4 eV or greater, and a two-dimensional (2D) material layer disposed between the metal layer and the semiconductor layer and having a 2D crystal structure.
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83.
公开(公告)号:US20220109051A1
公开(公告)日:2022-04-07
申请号:US17515713
申请日:2021-11-01
Applicant: Samsung Electronics Co., Ltd. , THE UNIVERSITY OF CHICAGO , Center for Technology Licensing at Cornell University
Inventor: Minhyun LEE , Jiwoong PARK , Saien XIE , Jinseong HEO , Hyeonjin SHIN
Abstract: Provided are a superlattice structure including a two-dimensional material and a device including the superlattice structure. The superlattice structure may include at least two different two-dimensional (2D) materials bonded to each other in a lateral direction, and an interfacial region of the at least two 2D materials may be strained. The superlattice structure may have a bandgap adjusted by the interfacial region that is strained. The at least two 2D materials may include first and second 2D materials. The first 2D material may have a first bandgap in an intrinsic state thereof. The second 2D material may have a second bandgap in an intrinsic state thereof. An interfacial region of the first and second 2D materials and an adjacent region may have a third bandgap between the first bandgap and the second bandgap.
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公开(公告)号:US20220068704A1
公开(公告)日:2022-03-03
申请号:US17411467
申请日:2021-08-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Sanghoon AHN , Woojin LEE , Kyung-Eun BYUN , Junghoo SHIN , Hyeonjin SHIN , Yunseong LEE
IPC: H01L21/768
Abstract: Provided is a method of forming an interconnect structure. The method includes preparing a substrate including a first metal layer and a first insulating layer, selectively forming a carbon layer having an sp2 bonding structure on the first metal layer, selectively forming a second insulating layer on the first insulating layer, forming a third insulating layer to cover the second insulating layer, and forming a second metal layer electrically connected to the first metal layer.
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85.
公开(公告)号:US20210375977A1
公开(公告)日:2021-12-02
申请号:US17313464
申请日:2021-05-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun LEE , Minsu SEOL , Hyeonjin SHIN
IPC: H01L27/146 , H04N5/33
Abstract: An image sensor includes a visible light sensor portion and an infrared sensor portion arranged on the visible light sensor portion. The visible light sensor portion includes a first sensor layer and a first signal wiring layer, wherein a plurality of visible light sensing elements are arrayed in the first sensor layer and the first signal wiring layer is configured to process a signal output from the first sensor layer. The infrared sensor portion includes a second sensor layer in which a plurality of infrared sensing elements are arrayed, and a second signal wiring layer configured to process a signal output from the second sensor layer. The infrared sensor portion and the visible light sensor portion form a single monolithic structure which is effective in obtaining high resolution.
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公开(公告)号:US20210327817A1
公开(公告)日:2021-10-21
申请号:US17362308
申请日:2021-06-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunjae SONG , Seunggeol NAM , Yeonchoo CHO , Seongjun PARK , Hyeonjin SHIN , Jaeho LEE
IPC: H01L23/532 , H01L21/768 , H01L23/522
Abstract: Example embodiments relate to a layer structure having a diffusion barrier layer, and a method of manufacturing the same. The layer structure includes first and second material layers and a diffusion barrier layer therebetween. The diffusion barrier layer includes a nanocrystalline graphene (nc-G) layer. In the layer structure, the diffusion barrier layer may further include a non-graphene metal compound layer or a graphene layer together with the nc-G layer. One of the first and second material layers is an insulating layer, a metal layer, or a semiconductor layer, and the remaining layer may be a metal layer.
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公开(公告)号:US20210226011A1
公开(公告)日:2021-07-22
申请号:US16928508
申请日:2020-07-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun LEE , Minsu SEOL , Yeonchoo CHO , Hyeonjin SHIN
IPC: H01L29/10 , H01L21/02 , H01L29/66 , H01L29/417 , H01L29/78 , H01L29/40 , H01L29/423
Abstract: Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material.
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公开(公告)号:US20210210346A1
公开(公告)日:2021-07-08
申请号:US16923478
申请日:2020-07-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Kyungeun BYUN , Hyeonjin SHIN , Soyoung LEE , Changseok LEE
Abstract: A graphene structure and a method of forming the graphene structure are provided. The graphene structure includes directly grown graphene that is directly grown on a surface of a substrate and has controlled surface energy.
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公开(公告)号:US20210159183A1
公开(公告)日:2021-05-27
申请号:US17165246
申请日:2021-02-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Eun BYUN , Keunwook SHIN , Yonghoon KIM , Hyeonjin SHIN , Hyunjae SONG , Changseok LEE , Changhyun KIM , Yeonchoo CHO
IPC: H01L23/532 , H01L21/768 , H01L23/522
Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.
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公开(公告)号:US20210125929A1
公开(公告)日:2021-04-29
申请号:US17082494
申请日:2020-10-28
Applicant: Samsung Electronics Co., Ltd. , UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
Inventor: Hyeonjin SHIN , Minhyun LEE , Changseok LEE , Hyeonsuk SHIN , Seokmo HONG
IPC: H01L23/532 , H01L23/522
Abstract: An interconnect structure and an electronic apparatus including the interconnect structure are provided. The interconnect structure includes a conductive layer; a dielectric layer configured to surround at least a part of the conductive layer; and a diffusion barrier layer disposed between the conductive layer and the dielectric layer and configured to limit and/or prevent a conductive material of the conductive layer from diffusing into the dielectric layer, and at least one of the dielectric layer and the diffusion barrier layer includes a boron nitride layer of a low dielectric constant.
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