公开(公告)号：US20240297221A1

公开(公告)日：2024-09-05

申请号：US18405389

申请日：2024-01-05

Applicant: Samsung Electronics Co., Ltd. ,  University-Industry Cooperation Group Of Kyung Hee University

Inventor： Changseok LEE ,  Seunghyun LEE ,  Minsu SEOL ,  Dohee KIM ,  Junseong BAE ,  Hyeyoon RYU ,  Sangwon KIM ,  Kyung-Eun BYUN

IPC: H01L29/16 ,  H01L29/167 ,  H01L29/417 ,  H01L29/778

CPC classification number: H01L29/1606 ,  H01L29/167 ,  H01L29/41725 ,  H01L29/778

Abstract: A transistor structure may include a semiconductor structure may include a substrate; a source electrode and a drain electrode spaced apart from each other on the substrate; a channel layer connected to the source electrode and the drain electrode; a gate insulating layer on the channel layer; and a gate electrode on the gate insulating layer. The channel layer may include a two-dimensional semiconductor material. The source electrode and the drain electrode each may include a graphene layer and a metal layer. The graphene layer may be formed by as-growing on the substrate. The graphene layer and the metal layer may be side by side in a vertical direction with respect to a surface of the substrate.

公开(公告)号：US20230157022A1

公开(公告)日：2023-05-18

申请号：US17986371

申请日：2022-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Changhyun KIM ,  Sehun PARK ,  Hyunwoo KIM ,  Kyung-Eun BYUN ,  Dongjin YUN ,  Changseok LEE

IPC: H01L27/11582 ,  G06N3/063

CPC classification number: H01L27/11582 ,  G06N3/0635

Abstract: A vertical nonvolatile memory device may include a channel layer extending in a first direction; a plurality of gate electrodes and a plurality of spacers each extending in a second direction crossing the first direction, the plurality of gate electrodes and the plurality of spacers being alternately arranged with each other in the first direction; and a gate insulating layer extending in the first direction between the channel layer and the plurality of gate electrodes. Each of the plurality of gate electrodes may include a metal-doped graphene.

公开(公告)号：US20210206643A1

公开(公告)日：2021-07-08

申请号：US17138194

申请日：2020-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok LEE ,  Changhyun KIM ,  Kyung-Eun BYUN ,  Keunwook SHIN ,  Hyeonjin SHIN ,  Eunkyu LEE

IPC: C01B32/186 ,  C01B32/194 ,  C23C16/02 ,  C23C16/04 ,  C23C16/26 ,  C23C16/513

Abstract: Provided is a method of selectively growing graphene. The method includes forming an ion implantation region and an ion non-implantation region by implanting ions locally into a substrate; and selectively growing graphene in the ion implantation region or the ion non-implantation region.

公开(公告)号：US20190161351A1

公开(公告)日：2019-05-30

申请号：US16183146

申请日：2018-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae SONG ,  Keunwook SHIN ,  Hyeonjin SHIN ,  Changseok LEE ,  Changhyun KIM ,  Kyungeun BYUN ,  Seungwon LEE ,  Eunkyu LEE

IPC: C01B32/186 ,  H01L23/532 ,  H01L21/285 ,  H01L21/768 ,  C23C16/26 ,  C23C16/50

Abstract: Provided are nanocrystalline graphene and a method of forming the nanocrystalline graphene through a plasma enhanced chemical vapor deposition process. The nanocrystalline graphene may have a ratio of carbon having an sp2 bonding structure to total carbon within the range of about 50% to 99%. In addition, the nanocrystalline graphene may include crystals having a size of about 0.5 nm to about 100 nm.

公开(公告)号：US20170033003A1

公开(公告)日：2017-02-02

申请号：US15172908

申请日：2016-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae SONG ,  Seunggeol NAM ,  Seongjun PARK ,  Keunwook SHIN ,  Hyeonjin SHIN ,  Jaeho LEE ,  Changseok LEE ,  Yeonchoo CHO

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L29/45

CPC classification number: H01L21/76846 ,  H01L21/28525 ,  H01L21/28568 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L29/45

Abstract: A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device.

Abstract translation: 多层结构包括第一材料层，第二材料层和扩散阻挡层。 第二材料层连接到第一材料层。 第二材料层与第一材料层间隔开。 扩散阻挡层在第一材料层和第二材料层之间。 扩散阻挡层可以包括二维（2D）材料。 2D材料可以是非石墨烯材料，例如具有2D晶体结构的金属硫族化物基材料。 第一材料层可以是半导体或绝缘体，第二材料层可以是导体。 多层结构的至少一部分可以构成电子设备的互连。

公开(公告)号：US20150204557A1

公开(公告)日：2015-07-23

申请号：US14595550

申请日：2015-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joongki MOON ,  Changseok LEE ,  Youngjun CHOI

IPC: F24F11/00 ,  G05D23/19

CPC classification number: F24F11/001 ,  F24F11/30 ,  F24F11/52 ,  F24F11/56 ,  F24F11/62 ,  F24F2110/00 ,  F24F2120/20

Abstract: A method and an apparatus for controlling an air conditioner are provided. The method includes sensing, by an air conditioner control apparatus, a user action requesting a temperature control, checking whether one of a common control mode in which a setting temperature is controlled at a first temperature control interval and a minute control mode in which the setting temperature is controlled at a second temperature control interval, which is less than the first temperature control interval, is selected in response to the sensed user action, calculating the setting temperature based on the user action and a result of the checking, and transmitting the calculated setting temperature to the air conditioner.

Abstract translation: 提供了一种用于控制空调的方法和装置。 该方法包括：通过空调控制装置检测请求温度控制的用户动作，检查在第一温度控制间隔中控制了设定温度的共同控制模式和其中设定的分钟控制模式之一 根据感测到的用户动作来选择温度低于第一温度控制间隔的第二温度控制间隔，基于用户动作和检查结果计算设定温度，并且发送所计算的 空调设定温度。

公开(公告)号：US20230123234A1

公开(公告)日：2023-04-20

申请号：US17703201

申请日：2022-03-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Kyung-Eun BYUN ,  Sangsoo LEE ,  Changhyun KIM ,  Changseok LEE

IPC: H01L29/786 ,  H01L29/16 ,  H01L27/11597 ,  H01L27/11582

Abstract: Provided is a thin film structure including a substrate, a metal layer on the substrate and spaced apart from the substrate, and a two-dimensional material layer between the substrate and the metal layer. The two-dimensional material layer may be configured to limit and/or block an electron transfer between the substrate and the metal layer. A resistivity of a metal layer on the two-dimensional material layer may be lowered by the two-dimensional material layer.

公开(公告)号：US20230081960A1

公开(公告)日：2023-03-16

申请号：US17697400

申请日：2022-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun BYUN ,  Sangwon KIM ,  Changhyun KIM ,  Keunwook SHIN ,  Changseok LEE

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/417 ,  H01L29/10 ,  H01L29/423

Abstract: A vertical channel transistor includes a first source/drain electrode; a second source/drain electrode spaced apart from the first source/drain electrode in a first direction; a first channel pattern between the first source/drain electrode and the second source/drain electrode; a first gate electrode on a side surface of the first channel pattern; a first gate insulation layer between the first channel pattern and the first gate electrode; and a first graphene insertion layer between the first source/drain electrode and the first channel pattern.

公开(公告)号：US20230022023A1

公开(公告)日：2023-01-26

申请号：US17548997

申请日：2021-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok LEE ,  Sangwon KIM ,  Keunwook SHIN

IPC: H01L21/285 ,  H01L29/40

Abstract: A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.

公开(公告)号：US20230017244A1

公开(公告)日：2023-01-19

申请号：US17552756

申请日：2021-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Hyeonjin SHIN ,  Alum JUNG ,  Changseok LEE

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  C01B32/186 ,  C23C16/26 ,  C23C16/505 ,  C23C16/511 ,  C23C16/02

Abstract: A method of forming nanocrystalline graphene according to an embodiment may include: arranging a substrate having a pattern in a reaction chamber; injecting a reaction gas into the reaction chamber, where the reaction gas includes a carbon source gas, an inert gas, and a hydrogen gas that are mixed; generating a plasma of the reaction gas in the reaction chamber; and directly growing the nanocrystalline graphene on a surface of the pattern using the plasma of the reaction gas at a process temperature. The pattern may include a first material and the substrate may include a second material different from the first material.