Metablock Size Reduction Using on Chip Page Swapping Between Planes
    81.
    发明申请
    Metablock Size Reduction Using on Chip Page Swapping Between Planes 有权
    使用片上页面交换平面之间的元块大小缩小

    公开(公告)号:US20130173847A1

    公开(公告)日:2013-07-04

    申请号:US13341543

    申请日:2011-12-30

    IPC分类号: G06F12/00

    摘要: Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).

    摘要翻译: 本文公开了用于将数据存储在存储器件中的方法和系统。 使用平面交错并行写入多页数据。 例如,在四平面写入中,按照以下顺序写入第一组四页:0,1,2,3。在平面交织之后的第二组四页被写入随后的后续步骤:7, 写入数据后,读取写入数据的页面,如果需要,页面交换,然后写入存储器的另一部分(如MLC)。

    Methods for forcing an update block to remain sequential
    83.
    发明授权
    Methods for forcing an update block to remain sequential 有权
    强制更新块保持顺序的方法

    公开(公告)号:US08275953B2

    公开(公告)日:2012-09-25

    申请号:US11725720

    申请日:2007-03-19

    IPC分类号: G06F12/06

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: A method for operating a memory system is provided. In this method, a sequential update block and preexisting data associated with the sequential update block are provided. Here, an option to convert the sequential update block to a chaotic update block also is provided. A write command is received to write data following a previous write command, where the write command and the previous write command have a discontinuity in logical addresses. If a logical address of the write command is different from logical addresses of the preexisting data, then the data are written to the sequential update block. If the logical address of the write command matches one of the logical addresses of the preexisting data, then the sequential update block is converted to a chaotic update block.

    摘要翻译: 提供了一种用于操作存储器系统的方法。 在该方法中,提供顺序更新块和与顺序更新块相关联的预先存在的数据。 这里,还提供将顺序更新块转换为混沌更新块的选项。 接收写入命令以在先前的写入命令之后写入数据,其中写入命令和先前的写入命令在逻辑地址中具有不连续性。 如果写命令的逻辑地址与预先存在的数据的逻辑地址不同,则将数据写入顺序更新块。 如果写入命令的逻辑地址与预先存在的数据的逻辑地址之一匹配,则将顺序更新块转换为混沌更新块。

    Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques
    84.
    发明申请
    Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques 审中-公开
    非易失性记忆的磨损调平:经验计数和被动技术的维护

    公开(公告)号:US20120191927A1

    公开(公告)日:2012-07-26

    申请号:US13433584

    申请日:2012-03-29

    IPC分类号: G06F12/00

    摘要: Wear leveling techniques for re-programmable non-volatile memory systems, such as a flash EEPROM system, are described. One set of techniques uses “passive” arrangements, where, when a blocks are selected for writing, blocks with relatively low experience count are selected. This can be done by ordering the list of available free blocks based on experience count, with the “coldest” blocks placed at the front of the list, or by searching the free blocks to find a block that is “cold enough”. In another, complementary set of techniques, usable for more standard wear leveling operations as well as for “passive” techniques and other applications where the experience count is needed, the experience count of a block or meta-block is maintained as a block's attribute along its address in the data management structures, such as address tables.

    摘要翻译: 描述了用于可重新编程的非易失性存储器系统(例如闪存EEPROM系统)的磨损均衡技术。 一组技术使用“被动”布置,其中当选择块用于写入时,选择具有相对较低经验计数的块。 这可以通过根据经验计数排序可用空闲块的列表,放置在列表前面的“最冷”块,或通过搜索空闲块来查找“足够冷”的块。 在另一种可用于更标准的磨损均衡操作以及需要经验计数的“被动”技术和其他应用程序的技术的补充技术中,块或元块的体验计数被保持为块的属性 其地址在数据管理结构中,如地址表。

    Non-Volatile Memory with Multi-Gear Control Using On-Chip Folding of Data
    85.
    发明申请
    Non-Volatile Memory with Multi-Gear Control Using On-Chip Folding of Data 有权
    使用片上数据折叠的多档位控制的非易失性存储器

    公开(公告)号:US20110153913A1

    公开(公告)日:2011-06-23

    申请号:US12642611

    申请日:2009-12-18

    IPC分类号: G06F12/00 G06F12/02

    摘要: A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes. The modes include a first mode, where the binary write operations to the first section of the memory are interleaved with folding operations at a first rate, and a second mode, where the number of folding operations relative to the number of the binary write operations to the first section of the memory are performed at a higher than in the first mode. The memory system then operates according to determined mode. The memory system may also include a third mode, where folding operations are background operations executed when the memory system is not receiving data from the host.

    摘要翻译: 介绍了一种存储系统及其操作方法。 存储器系统包括控制器和非易失性存储器电路,其中非易失性存储器电路具有数据以二进制格式存储的第一部分和第二部分,其中数据以多状态格式存储 。 存储器系统从主机接收数据,并且对所述非易失性存储器电路的第一部分执行所接收数据的二进制写操作。 存储系统随后将数据的部分从非易失性存储器的第一部分折叠到非易失性存储器的第二部分,其中折叠操作包括从第一部分读取数据的部分,将数据重写成第二部分 使用多状态编程操作的非易失性存储器的一部分。 控制器根据多种模式之一确定操作存储器系统。 这些模式包括第一模式,其中对存储器的第一部分的二进制写入操作以第一速率进行折叠操作和第二模式,其中相对于二进制写入操作的数量的折叠操作的数量 存储器的第一部分在高于第一模式下执行。 然后,存储器系统根据确定的模式进行操作。 存储器系统还可以包括第三模式,其中折叠操作是当存储器系统未从主机接收数据时执行的背景操作。

    Method And System For Virtual Fast Access Non-Volatile RAM
    86.
    发明申请
    Method And System For Virtual Fast Access Non-Volatile RAM 有权
    虚拟快速访问非易失性RAM的方法和系统

    公开(公告)号:US20100023672A1

    公开(公告)日:2010-01-28

    申请号:US11939318

    申请日:2007-11-13

    IPC分类号: G06F12/00 G06F12/02

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: A method of writing data to a non-volatile memory with minimum units of erase of a block, a page being a unit of programming of a block, may read a page of stored data addressable in a first increment of address from the memory into a page buffer, the page of stored data comprising an allocated data space addressable in a second increment of address, pointed to by an address pointer, and comprising obsolete data. The first increment of address is greater than the second increment of address. A portion of stored data in the page buffer may be updated with the data to form an updated page of data. Storage space for the updated page of data may be allocated. The updated page of data may be written to the allocated storage space. The address pointer may be updated with a location of the allocated storage space.

    摘要翻译: 一种将块的擦除的最小单位写入数据到非易失性存储器的方法,作为块的编程单元的页面可以将以地址的第一增量寻址的存储数据页从存储器读取为 页面缓冲器,存储数据的页面包括以地址指针指向的地址的第二增量可寻址的分配的数据空间,并且包括过时的数据。 地址的第一个增量大于地址的第二个增量。 页面缓冲器中存储的数据的一部分可以用数据更新以形成更新的数据页面。 可以分配更新的数据页面的存储空间。 更新的数据页可以写入分配的存储空间。 可以用分配的存储空间的位置更新地址指针。

    Memory system for data storage and retrieval
    87.
    发明授权
    Memory system for data storage and retrieval 有权
    用于数据存储和检索的内存系统

    公开(公告)号:US07634624B2

    公开(公告)日:2009-12-15

    申请号:US10256891

    申请日:2002-09-27

    IPC分类号: G06F13/00

    摘要: According to a first aspect of an embodiment of the invention, there is provided a method of data storage and retrieval for use in a solid state memory system, having a non-volatile memory, wherein data is written to the non-volatile memory in the form of at least one logical sector the method comprising: monitoring the logical sector data which is to be written to the non-volatile memory, detecting the presence of a pattern in the logical sector data, upon detecting a repetitive pattern recording the repetitive pattern of the logical sector in a sector address table in the non-volatile memory without making a record of the logical sector data in the non- volatile memory.

    摘要翻译: 根据本发明的实施例的第一方面,提供了一种在具有非易失性存储器的固态存储器系统中使用的数据存储和检索方法,其中数据被写入到非易失性存储器 至少一个逻辑扇区的形式,该方法包括:在检测到记录重复模式的重复模式时,监视要写入非易失性存储器的逻辑扇区数据,检测逻辑扇区数据中的模式的存在 非易失性存储器中的扇区地址表中的逻辑扇区,而不在非易失性存储器中记录逻辑扇区数据。

    Non-Volatile Memories With Versions of File Data Identified By Identical File ID and File Offset Stored in Identical Location Within a Memory Page
    88.
    发明申请
    Non-Volatile Memories With Versions of File Data Identified By Identical File ID and File Offset Stored in Identical Location Within a Memory Page 审中-公开
    具有通过存储在存储器页面中的相同位置存储的相同文件ID和文件偏移所识别的文件数据的版本的非易失性存储器

    公开(公告)号:US20090210614A1

    公开(公告)日:2009-08-20

    申请号:US12404260

    申请日:2009-03-13

    IPC分类号: G06F12/00 G06F12/02

    CPC分类号: G06F12/0292 G06F2212/2022

    摘要: In the file storage system, each portion belonging to a data file is identified by its file ID and an offset along the data file, where the offset is a constant for the file and every file data portion is always kept at the same position within a memory page to be read or programmed in parallel. In this way, every time a page containing a file portion is read and copy to another page, the data in it is always page-aligned, and each bit within the file portion can always be manipulated by the same sense amplifier and same set data latches within the same memory column. In a preferred implementation, the page alignment is such that (offset within a page)=(data offset within a file) MOD (page size). Any gaps that may exist in page can be padded with any existing page-aligned valid data.

    摘要翻译: 在文件存储系统中,属于数据文件的每个部分由其文件ID和沿着数据文件的偏移来标识,其中偏移量是文件的常数,并且每个文件数据部分总是保持在一个 存储器页面被并行读取或编程。 以这种方式,每次包含文件部分的页面被读取并复制到另一个页面时,其中的数据总是页面对齐的,并且文件部分中的每一位可以总是由相同的读出放大器和相同的设置数据 锁存在同一个内存列中。 在优选实现中,页面对齐使得(页面内的偏移量)=(文件内的数据偏移量)MOD(页面大小)。 页面中可能存在的任何间隙可以用任何现有的页面对齐的有效数据进行填充。

    Methods of end of life calculation for non-volatile memories
    89.
    发明授权
    Methods of end of life calculation for non-volatile memories 有权
    非易失性存储器寿命计算方法

    公开(公告)号:US07523013B2

    公开(公告)日:2009-04-21

    申请号:US11383384

    申请日:2006-05-15

    IPC分类号: G06F3/01

    摘要: A system and methods are given for providing information on the amount of life remaining for a memory having a limited lifespan, such as a flash memory card. For example, it can provide a user with the amount of the memory's expected remaining lifetime in real time units (i.e., hours or days) or as a percentage of estimated initial life. An end of life warning can also be provided. In a particular embodiment, the amount of remaining life (either as a percentage or in real time units) can be based on the average number of erases per block, but augmented by the number of spare blocks or other parameters, so that an end of life warning is given if either the expected amount of remaining life falls below a certain level or the number of spare blocks falls below a safe level.

    摘要翻译: 给出了提供关于具有有限寿命的存储器(例如闪存卡)的剩余寿命的信息的系统和方法。 例如,它可以向用户提供实时单位(即,小时或天)中的存储器的预期剩余寿命的量,或作为估计的初始寿命的百分比。 也可以提供生命警告的结束。 在特定实施例中,剩余寿命的量(以百分比或实时单位计)可以基于每个块的平均擦除次数,但是增加了备用块的数量或其他参数,使得结束 如果预期的剩余生命量低于一定水平或备用块数量低于安全水平,则会发出生命警告。

    Erased Sector Detection Mechanisms
    90.
    发明申请
    Erased Sector Detection Mechanisms 有权
    擦除部门检测机制

    公开(公告)号:US20090006929A1

    公开(公告)日:2009-01-01

    申请号:US12208054

    申请日:2008-09-10

    IPC分类号: H03M13/05 G06F11/10

    摘要: The present invention presents a non-volatile memory and method for its operation that allows instant and accurate detection of erased sectors when the sectors contain a low number of zero bits, due to malfunctioning cells or other problems, and the sector can still be used as the number of corrupted bits is under the ECC correction limit. This method allows the storage system to become tolerant to erased sectors corruption, as such sectors can be used for further data storage if the system can correct this error later in the written data by ECC correction means.

    摘要翻译: 本发明提出了一种用于其操作的非易失性存储器和方法,其允许当由于单元故障或其他问题而扇区包含低数量的零位时能够即时和准确地检测已擦除的扇区,并且该扇区仍然可以用作 损坏的位的数量在ECC校正限制之下。 这种方法允许存储系统变得容忍擦除扇区损坏,因为如果系统可以通过ECC校正装置在写入的数据中稍后校正该错误,则可以将这些扇区用于进一步的数据存储。