公开(公告)号：US20220029001A1

公开(公告)日：2022-01-27

申请号：US17157444

申请日：2021-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chiang Chang ,  Ming-Hua Yu ,  Li-Li Su

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/20

Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.

公开(公告)号：US11031398B2

公开(公告)日：2021-06-08

申请号：US16669595

申请日：2019-10-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Tsz-Mei Kwok ,  Ming-Hua Yu

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/08 ,  H01L29/165 ,  H01L29/66 ,  H01L21/306 ,  H01L21/311 ,  H01L21/8238

Abstract: A semiconductor device includes a substrate; an isolation structure over the substrate; two first fins in an N-type region of the semiconductor device; and two second fins in a P-type region of the semiconductor device. Each of the two first fins has a channel region and two source/drain (S/D) regions sandwiching the channel region. The semiconductor device further includes a gate stack engaging the channel regions of the two first fins; and four S/D features over the S/D regions of the two first fins. Each of the four S/D features includes a lower portion and an upper portion over the lower portion. Each of the lower portions of the four S/D features has a cross-sectional profile that is wider at its bottom than at its top. The upper portions of the four S/D features merge into two merged S/D features with one on each side of the gate stack.

公开(公告)号：US10811537B2

公开(公告)日：2020-10-20

申请号：US16035476

申请日：2018-07-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Yu Lin ,  Ming-Hua Yu ,  Tze-Liang Lee ,  Chan-Lon Yang

IPC: H01L29/78 ,  H01L29/167 ,  H01L29/66 ,  H01L29/10 ,  H01L29/06 ,  H01L23/544 ,  H01L21/762 ,  H01L21/02 ,  H01L21/265 ,  H01L21/324

Abstract: A device includes a semiconductor substrate, an isolation structure, and an epitaxial fin portion. The semiconductor substrate has an implanted region. The implanted region has a bottom fin portion thereon, in which a depth of the implanted region is smaller than a thickness of the semiconductor substrate. The isolation structure surrounds the bottom fin portion. The epitaxial fin portion is disposed over a top surface of the bottom fin portion, in which the implanted region of the semiconductor substrate includes oxygen and has an oxygen concentration lower than about 1·E+19 atoms/cm3.

公开(公告)号：US20190109194A1

公开(公告)日：2019-04-11

申请号：US16206500

申请日：2018-11-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tetsuji Ueno ,  Ming-Hua Yu ,  Chan-Lon Yang

IPC: H01L29/167 ,  H01L21/02 ,  C30B29/06 ,  C23C16/02 ,  C30B25/18 ,  C23C16/44 ,  H01L29/66

Abstract: A method and structure for providing a two-step defect reduction bake, followed by a high-temperature epitaxial layer growth. In various embodiments, a semiconductor wafer is loaded into a processing chamber. While the semiconductor wafer is loaded within the processing chamber, a first pre-epitaxial layer deposition baking process is performed at a first pressure and first temperature. In some cases, after the first pre-epitaxial layer deposition baking process, a second pre-epitaxial layer deposition baking process is then performed at a second pressure and second temperature. In some embodiments, the second pressure is different than the first pressure. By way of example, after the second pre-epitaxial layer deposition baking process and while at a growth temperature, a precursor gas may then be introduced into the processing chamber to deposit an epitaxial layer over the semiconductor wafer.

公开(公告)号：US20180337182A1

公开(公告)日：2018-11-22

申请号：US16047141

申请日：2018-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Li-Wei Chou ,  Ming-Hua Yu

IPC: H01L27/092 ,  H01L29/417 ,  H01L29/36 ,  H01L29/161 ,  H01L29/08 ,  H01L29/06 ,  H01L21/8238 ,  H01L21/306 ,  H01L21/02

CPC classification number: H01L27/0924 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/36 ,  H01L29/41783 ,  H01L29/41791

Abstract: A semiconductor device and method of forming the same are disclosed. The method of forming a semiconductor device includes providing a substrate, an isolation structure over the substrate, and at least two fins extending from the substrate and through the isolation structure; etching the at least two fins, thereby forming at least two trenches; growing first epitaxial features in the at least two trenches; growing second epitaxial features over the first epitaxial features in a first growth condition; and after the second epitaxial features reach a target critical dimension, growing the second epitaxial features in a second growth condition different from the first growth condition.

公开(公告)号：US10026843B2

公开(公告)日：2018-07-17

申请号：US14954661

申请日：2015-11-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Yu Lin ,  Ming-Hua Yu ,  Tze-Liang Lee ,  Chan-Lon Yang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/167 ,  H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L21/324 ,  H01L21/762 ,  H01L23/544

Abstract: A method for manufacturing an active region of a semiconductor device includes forming an implanted region in a substrate. The implanted region is adjacent to a top surface of the substrate. A clean treatment is performed on the top surface of the substrate. The top surface of the substrate is baked. An epitaxial layer is formed on the top surface of the substrate.

公开(公告)号：US20180076203A1

公开(公告)日：2018-03-15

申请号：US15816386

申请日：2017-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Tsz-Mei Kwok ,  Ming-Hua Yu

IPC: H01L27/092 ,  H01L29/165 ,  H01L21/311 ,  H01L29/06 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/306 ,  H01L29/08

Abstract: A semiconductor device includes a substrate; an isolation structure over the substrate; and two fins in a first region of the semiconductor device extending from the substrate and through the isolation structure. Each of the two fins has a channel region and two source/drain (S/D) regions sandwiching the channel region. The semiconductor device further includes a gate stack over the isolation structure and engaging the channel regions of the two fins; and four S/D features over the S/D regions of the two fins. Each of the four S/D features includes a lower portion and an upper portion over the lower portion. Each of the lower portions of the four S/D features has a cross-sectional profile that is wider at its bottom than at its top. The upper portions of the four S/D features merge into two merged S/D features with one on each side of the gate stack.

公开(公告)号：US20170186748A1

公开(公告)日：2017-06-29

申请号：US15277478

申请日：2016-09-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Li-Wei Chou ,  Ming-Hua Yu

IPC: H01L27/092 ,  H01L29/36 ,  H01L29/161 ,  H01L29/417 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/06 ,  H01L21/306

CPC classification number: H01L27/0924 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/30625 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/36 ,  H01L29/41783 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a substrate, an isolation structure over the substrate, two fins over the substrate and protruding out of the isolation structure, and an epitaxial feature over the two fins. The epitaxial feature includes two lower portions and one upper portion. The two lower portions are over the two fins respectively. The upper portion is over the two lower portions and connects the two lower portions. The upper portion has a different dopant concentration than the two lower portions. A top surface of the upper portion is substantially flat.