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    SEMICONDUCTOR DEVICE AND METHODS OF FORMING
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHODS OF FORMING 有权

    公开(公告)号：US20240371996A1

    公开(公告)日：2024-11-07

    申请号：US18775943

    申请日：2024-07-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hung-Tai Chang ,  Han-Yu Tang ,  Ming-Hua Yu ,  Yee-Chia Yeo

    IPC: H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

    Abstract: In an embodiment, a device includes a first fin extending from a substrate. The device also includes a first gate stack over and along sidewalls of the first fin. The device also includes a first gate spacer disposed along a sidewall of the first gate stack. The device also includes and a first source/drain region in the first fin and adjacent the first gate spacer, the first source/drain region including a first epitaxial layer on the first fin, the first epitaxial layer having a first dopant concentration of boron. The device also includes and a second epitaxial layer on the first epitaxial layer, the second epitaxial layer having a second dopant concentration of boron, the second dopant concentration being greater than the first dopant concentration.

    SEMICONDUCTOR DEVICE AND METHOD
    3.
    发明公开
    SEMICONDUCTOR DEVICE AND METHOD 审中-公开

    公开(公告)号：US20230261052A1

    公开(公告)日：2023-08-17

    申请号：US17650712

    申请日：2022-02-11

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Che-Yu Lin ,  Ming-Hua Yu ,  Yee-Chia Yeo

    IPC: H01L29/08 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02 ,  H01L29/78

    CPC classification number: H01L29/0847 ,  H01L29/66795 ,  H01L29/045 ,  H01L21/0262 ,  H01L29/785 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02609

    Abstract: A method includes forming a fin protruding from a substrate; forming an isolation region surrounding the fin; forming a gate structure extending over the fin and the isolation region; etching the fin adjacent the gate structure to form a recess; forming a source/drain region in the recess, including performing a first epitaxial process to grow a first semiconductor material in the recess, wherein the first epitaxial process preferentially forms facet planes of a first crystalline orientation; and performing a second epitaxial process to grow a second semiconductor material on the first semiconductor material, wherein the second epitaxial process preferentially forms facet planes of a second crystalline orientation, wherein a top surface of the second semiconductor material is above a top surface of the fin; and forming a source/drain contact on the source/drain region.

    Semiconductor devices and methods of manufacture
    4.
    发明授权
    Semiconductor devices and methods of manufacture 有权

    公开(公告)号：US11532731B2

    公开(公告)日：2022-12-20

    申请号：US17167731

    申请日：2021-02-04

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Siang Yang ,  Ming-Hua Yu

    IPC: H01L29/66 ,  H01L27/092 ,  H01L21/8234 ,  H01L29/78

    Abstract: Semiconductor devices and methods of forming semiconductor devices are described herein. A method includes forming a first fin and a second fin in a substrate. A low concentration source/drain region is epitaxially grown over the first fin and over the second fin. The material of the low concentration region has less than 50% by volume of germanium. A high concentration contact landing region is formed over the low concentration regions. The material of the high concentration contact landing region has at least 50% by volume germanium. The high concentration contact landing region has a thickness of at least 1 nm over a top surface of the low concentration source/drain region.

    Source/Drain Formation with Reduced Selective Loss Defects
    6.
    发明申请
    Source/Drain Formation with Reduced Selective Loss Defects 有权

    公开(公告)号：US20220328660A1

    公开(公告)日：2022-10-13

    申请号：US17809963

    申请日：2022-06-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chih-Chiang Chang ,  Ming-Hua Yu ,  Li-Li Su

    IPC: H01L29/66 ,  H01L21/20 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78

    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.

    CONFINED SOURCE/DRAIN EPITAXY REGIONS AND METHOD FORMING SAME
    8.
    发明申请
    CONFINED SOURCE/DRAIN EPITAXY REGIONS AND METHOD FORMING SAME 有权

    公开(公告)号：US20210376073A1

    公开(公告)日：2021-12-02

    申请号：US17398741

    申请日：2021-08-10

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Jeng-Wei Yu ,  Tsz-Mei Kwok ,  Tsung-Hsi Yang ,  Li-Wei Chou ,  Ming-Hua Yu

    IPC: H01L29/06 ,  H01L29/786 ,  H01L29/78 ,  H01L29/66

    Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.

    Method of forming shaped source/drain epitaxial layers of a semiconductor device
    9.
    发明授权
    Method of forming shaped source/drain epitaxial layers of a semiconductor device 有权

    公开(公告)号：US11056578B2

    公开(公告)日：2021-07-06

    申请号：US16725655

    申请日：2019-12-23

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Yi-Jing Lee ,  Ming-Hua Yu

    IPC: H01L29/66 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/04 ,  H01L27/092

    Abstract: In a method for manufacturing a semiconductor device, an isolation insulating layer is formed over a fin structure. A first portion of the fin structure is exposed from and a second portion of the fin structure is embedded in the isolation insulating layer. A dielectric layer is formed over sidewalls of the first portion of the fin structure. The first portion of the fin structure and a part of the second portion of the fin structure in a source/drain region are removed, thereby forming a trench. A source/drain epitaxial structure is formed in the trench using one of a first process or a second process. The first process comprises an enhanced epitaxial growth process having an enhanced growth rate for a preferred crystallographic facet, and the second process comprises using a modified etch process to reduce a width of the source/drain epitaxial structure.

    Structure and method for semiconductor device
    10.
    发明授权
    Structure and method for semiconductor device 有权

    公开(公告)号：US10727229B2

    公开(公告)日：2020-07-28

    申请号：US15816386

    申请日：2017-11-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yi-Jing Lee ,  Tsz-Mei Kwok ,  Ming-Hua Yu

    IPC: H01L29/66 ,  H01L29/165 ,  H01L29/06 ,  H01L29/08 ,  H01L27/092 ,  H01L21/306 ,  H01L21/311 ,  H01L21/8238

    Abstract: A semiconductor device includes a substrate; an isolation structure over the substrate; and two fins in a first region of the semiconductor device extending from the substrate and through the isolation structure. Each of the two fins has a channel region and two source/drain (S/D) regions sandwiching the channel region. The semiconductor device further includes a gate stack over the isolation structure and engaging the channel regions of the two fins; and four S/D features over the S/D regions of the two fins. Each of the four S/D features includes a lower portion and an upper portion over the lower portion. Each of the lower portions of the four S/D features has a cross-sectional profile that is wider at its bottom than at its top. The upper portions of the four S/D features merge into two merged S/D features with one on each side of the gate stack.

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