公开(公告)号：US10128237B2

公开(公告)日：2018-11-13

申请号：US15191598

申请日：2016-06-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsueh Wen Tsau ,  Chia-Ching Lee ,  Chung-Chiang Wu ,  Da-Yuan Lee

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L21/02 ,  H01L21/321 ,  H01L21/28 ,  H01L29/49 ,  H01L29/51

Abstract: A method of forming a semiconductor device includes forming a plurality of fins on a substrate, forming a polysilicon gate structure, and replacing the polysilicon gate structure with a metal gate structure. Replacing the polysilicon gate structure includes depositing a work function metal layer over the plurality of fins, forming a metal oxide layer over the work function metal layer, and depositing a first metal layer over the metal oxide layer. A first portion of the metal oxide layer is formed within an area between adjacent fins from among the plurality of fins. An example benefit includes reduced diffusion of unwanted and/or detrimental elements from the first metal layer into its underlying layers and consequently, the reduction of the negative impact of these unwanted and/or detrimental elements on the semiconductor device performance.

公开(公告)号：US09978601B2

公开(公告)日：2018-05-22

申请号：US15192570

申请日：2016-06-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yen Tsai ,  Hsin-Yi Lee ,  Chung-Chiang Wu ,  Da-Yuan Lee ,  Weng Chang ,  Ming-Hsing Tsai

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/768 ,  C23C14/58 ,  C23C16/56 ,  C23C16/455

CPC classification number: H01L21/28105 ,  C23C14/58 ,  C23C14/5846 ,  C23C14/5873 ,  C23C16/45525 ,  C23C16/56 ,  H01L21/02697 ,  H01L21/28088 ,  H01L21/28097 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/76838 ,  H01L21/76886

Abstract: A method and structure for providing a pre-deposition treatment (e.g., of a work-function layer) to accomplish work function tuning. In various embodiments, a gate dielectric layer is formed over a substrate, and a work-function metal layer is deposited over the gate dielectric layer. In some embodiments, a first in-situ process including a pre-treatment process of the work-function metal layer is performed. By way of example, the pre-treatment process removes an oxidized layer of the work-function metal layer to form a treated work-function metal layer. In some embodiments, after performing the first in-situ process, a second in-situ process including a deposition process of another metal layer over the treated work-function metal layer is performed.

公开(公告)号：US09935173B1

公开(公告)日：2018-04-03

申请号：US15363455

申请日：2016-11-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Chiang Wu ,  Chia-Ching Lee ,  Hsueh-Wen Tsau ,  Chun-Yuan Chou ,  Ching-Hwanq Su

IPC: H01L21/8234 ,  H01L29/49 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/78 ,  H01L29/66 ,  H01L21/28 ,  H01L21/762 ,  H01L29/06

CPC classification number: H01L29/4966 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/76254 ,  H01L21/823431 ,  H01L21/823437 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: Structures and formation methods of a semiconductor device structure are provided. A method for forming a semiconductor device structure includes patterning a semiconductor substrate to form a fin structure. The method also includes forming a sacrificial material over the fin structure. The method further includes forming spacer elements adjoining sidewalls of the sacrificial material. Furthermore, the method includes removing the sacrificial material so that a trench is formed between the spacer elements. The method also includes forming a gate dielectric layer in the trench. The method further includes forming a work function layer in the trench to cover the gate dielectric layer. In addition, the method includes depositing a tungsten bulk layer with a precursor to fill the trench. The precursor includes a tungsten-containing material that is substantially free of fluoride.

公开(公告)号：US20170373058A1

公开(公告)日：2017-12-28

申请号：US15191598

申请日：2016-06-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsueh Wen TSAU ,  Chia-Ching Lee ,  Chung-Chiang Wu ,  Da-Yuan Lee

IPC: H01L27/088 ,  H01L29/51 ,  H01L21/28 ,  H01L21/02 ,  H01L21/8234 ,  H01L21/321 ,  H01L29/66 ,  H01L29/49

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7848

Abstract: A method of forming a semiconductor device includes forming a plurality of fins on a substrate, forming a polysilicon gate structure, and replacing the polysilicon gate structure with a metal gate structure. Replacing the polysilicon gate structure includes depositing a work function metal layer over the plurality of fins, forming a metal oxide layer over the work function metal layer, and depositing a first metal layer over the metal oxide layer. A first portion of the metal oxide layer is formed within an area between adjacent fins from among the plurality of fins. An example benefit includes reduced diffusion of unwanted and/or detrimental elements from the first metal layer into its underlying layers and consequently, the reduction of the negative impact of these unwanted and/or detrimental elements on the semiconductor device performance.